SEMICONDUCTOR
3-340
November 1996
HA5022
Dual, 125MHz, Video Current
Feedback Amplifier with Disable
Features
• Dual Version of HA-5020
• Individual Output Enable/Disable
• Input Offset Voltage. . . . . . . . . . . . . . . . . . . . . . . .800µV
• Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . 125MHz
• Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475V/µs
• Differential Gain. . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03%
• Differential Phase. . . . . . . . . . . . . . . . . . . . 0.03 Degrees
• Supply Current (per Amplifier) . . . . . . . . . . . . . . .7.5mA
• ESD Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . .4000V
• Guaranteed Specifications at ±5V Supplies
Applications
• Video Multiplexers; Video Switching and Routing
• Video Gain Block
• Video Distribution Amplifier/RGB Amplifier
• Flash A/D Driver
• Current to Voltage Converter
• Medical Imaging
• Radar and Imaging Systems
Description
The HA5022 is a dual version of the popular Harris HA-
5020. It features wide bandwidth and high slew rate, and is
optimized for video applications and gains between 1 and
10. It is a current feedback amplifier and thus yields less
bandwidth degradation at high closed loop gains than volt-
age feedback amplifiers.
The low differential gain and phase, 0.1dB gain flatness, and
ability to drive two back terminated 75Ωcables, make this
amplifier ideal for demanding video applications.
The HA5022 also features a disable function that signifi-
cantly reduces supply current while forcing the output to a
true high impedance state. This functionality allows 2:1 video
multiplex ers to be implemented with a single IC.
The current feedback design allows the user to take advan-
tage of the amplifier’s bandwidth dependency on the feed-
back resistor. By reducing RF, the bandwidth can be
increased to compensate for decreases at higher closed
loop gains or heavy output loads.
Pinout
HA5022
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER TEMP.
RANGE (oC) PACKAGE PKG.
NO.
HA5022IP -40 to 85 16 Ld PDIP E16.3
HA5022IB -40 to 85 16 Ld SOIC M16.15
HA5022EVAL High Speed Op Amp DIP Evaluation Board
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
-IN1
+IN1
DIS1
V-
DIS2
+IN2
NC
-IN2
OUT1
NC
V+
NC
NC
OUT2
NC
NC
+
-
+
-
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1996 File Number 3392.4
3-341
Absolute Maximum Ratings Thermal Information
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . . 36V
DC Input Voltage (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . ±VSUPPLY
Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V
Output Current (Note 4) . . . . . . . . . . . . . . . . Short Circuit Protected
ESD Rating (Note 3)
Human Body Model (Per MIL-STD-883 Method 3015.7) . . 2000V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Supply Voltage Range (Typical) . . . . . . . . . . . . . . . . . ±4.5V to ±15V
Thermal Resistance (Typical, Note 2) θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Maximum Junction Temperature (Note 1) . . . . . . . . . . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package, Note 1) . .150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation, including output load, must be designed to maintain junction temperature below 175oC for die, and below
150oC for plastic packages. See Application Information section for safe operating area information.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
3. The non-inverting input of unused amplifiers must be connected to GND.
4. Output is protected for short circuits to ground. Brief short circuits to ground will not degrade reliability, however, continuous (100% duty
cycle) output current should not exceed 15mA for maximum reliability.
Electrical Specifications VSUPPLY = ±5V, RF = 1kΩ, AV = +1, R L = 400 Ω, CL≤10pF, Unless Otherwise Specified
PARAMETER TEST CONDITIONS
(NO TE 11)
TEST
LEVEL TEMP.
(oC) MIN TYP MAX UNITS
INPUT CHARACTERISTICS
Input Offset Voltage (VIO) A 25 - 0.8 3 mV
A Full - - 5 mV
Delta VIO Between Channels A Full - 1.2 3.5 mV
Average Input Offset Voltage Drift B Full - 5 - µV/oC
VIO Common Mode Rejection Ratio Note 5 A 25 53 - - dB
A Full 50 - - dB
VIO Power Supply Rejection Ratio ±3.5V ≤ VS≤±6.5V A 25 60 - - dB
A Full 55 - - dB
Input Common Mode Range Note 5 A Full ±2.5 - - V
Non-Inverting Input (+IN) Current A 25 - 3 8 µA
A Full - - 20 µA
+IN Common Mode Rejection
(+IBCMR =) Note 5 A 25 - - 0.15 µA/V
A Full - - 0.5 µA/V
+IN Power Supply Rejection ±3.5V ≤ VS≤±6.5V A 25 - - 0.1 µA/V
A Full - - 0.3 µA/V
Inverting Input (-IN) Current A 25, 85 - 4 12 µA
A -40 - 10 30 µA
Delta -IN BIAS Current Between Channels A 25, 85 - 6 15 µA
A -40 - 10 30 µA
-IN Common Mode Rejection Note 5 A 25 - - 0.4 µA/V
A Full - - 1.0 µA/V
1
+RIN
HA5022
3-342
-IN Power Supply Rejection ±3.5V ≤ VS≤±6.5V A 25 - - 0.2 µA/V
A Full - - 0.5 µA/V
Input Noise Voltage f = 1kHz B 25 - 4.5 - nV/√Hz
+Input Noise Current f = 1kHz B 25 - 2.5 - pA/√Hz
-Input Noise Current f = 1kHz B 25 - 25.0 - pA/√Hz
TRANSFER CHARACTERISTICS
Transimpedance Note 16 A 25 1.0 - - MΩ
A Full 0.85 - - MΩ
Open Loop DC Voltage Gain RL = 400Ω, VOUT = ±2.5V A 25 70 - - dB
A Full 65 - - dB
Open Loop DC Voltage Gain RL = 100Ω, VOUT = ±2.5V A 25 50 - - dB
A Full 45 - - dB
OUTPUT CHARACTERISTICS
Output Voltage Swing RL = 150ΩA25±2.5 ±3.0 - V
A Full ±2.5 ±3.0 - V
Output Current RL = 150ΩB Full ±16.6 ±20.0 - mA
Output Current, Short Circuit VIN = ±2.5V, VOUT = 0V A Full ±40 ±60 - mA
Output Current, Disabled VOUT = ±2.5V, VIN = 0V,
DISABLE = 0V A Full - - 2 µA
Output Disable Time Note 12 B 25 - 40 - µs
Output Enable Time Note 13 B 25 - 40 - ns
Output Capacitance, Disabled Note 14 B 25 - 15 - pF
POWER SUPPLY CHARACTERISTICS
Supply Voltage Range A 25 5 - 15 V
Quiescent Supply Current A Full - 7.5 10 mA/Op Amp
Supply Current, Disabled DISABLE = 0V A Full - 5 7.5 mA/Op Amp
Disable Pin Input Current DISABLE = 0V A Full - 1.0 1.5 mA
Minimum Pin 8 Current to Disable Note 6 A Full 350 - - µA
Maximum Pin 8 Current to Enable Note 7 A Full - - 20 µA
AC CHARACTERISTICS (AV = +1)
Slew Rate Note 8 B 25 275 400 - V/µs
Full Power Bandwidth Note 9 B 25 22 28 - MHz
Rise Time Note 10 B 25 - 6 - ns
Fall Time Note 10 B 25 - 6 - ns
Propagation Delay Note 10 B 25 - 6 - ns
Overshoot B 25 - 4.5 - %
-3dB Bandwidth VOUT = 100mV B 25 - 125 - MHz
Settling Time to 1% 2V Output Step B 25 - 50 - ns
Settling Time to 0.25% 2V Output Step B 25 - 75 - ns
Electrical Specifications VSUPPLY = ±5V, RF = 1kΩ, AV = +1, R L = 400 Ω, CL≤10pF, Unless Otherwise Specified (Continued)
PARAMETER TEST CONDITIONS
(NO TE 11)
TEST
LEVEL TEMP.
(oC) MIN TYP MAX UNITS
HA5022
3-343
AC CHARACTERISTICS (AV = +2, RF = 681Ω)
Slew Rate Note 8 B 25 - 475 - V/µs
Full Power Bandwidth Note 9 B 25 - 26 - MHz
Rise Time Note 10 B 25 - 6 - ns
Fall Time Note 10 B 25 - 6 - ns
Propagation Delay Note 10 B 25 - 6 - ns
Overshoot B 25 - 12 - %
-3dB Bandwidth VOUT = 100mV B 25 - 95 - MHz
Settling Time to 1% 2V Output Step B 25 - 50 - ns
Settling Time to 0.25% 2V Output Step B 25 - 100 - ns
Gain Flatness 5MHz B 25 - 0.02 - dB
20MHz B 25 - 0.07 - dB
AC CHARACTERISTICS (AV = +10, RF = 383Ω)
Slew Rate Note 8 B 25 350 475 - V/µs
Full Power Bandwidth Note 9 B 25 28 38 - MHz
Rise Time Note 10 B 25 - 8 - ns
Fall Time Note 10 B 25 - 9 - ns
Propagation Delay Note 10 B 25 - 9 - ns
Overshoot B 25 - 1.8 - %
-3dB Bandwidth VOUT = 100mV B 25 - 65 - MHz
Settling Time to 1% 2V Output Step B 25 - 75 - ns
Settling Time to 0.1% 2V Output Step B 25 - 130 - ns
VIDEO CHARACTERISTICS
Differential Gain (Note 15) RL = 150ΩB 25 - 0.03 - %
Differential Phase (Note 15) RL = 150ΩB 25 - 0.03 - Degrees
NOTES:
5. VCM = ±2.5V. At -40oC Product is tested at VCM = ±2.25V because short test duration does not allow self heating.
6. RL = 100Ω, VIN = 2.5V. This is the minimum current which must be pulled out of theDisable pin in order to disable the output. The output
is considered disabled when -10mV ≤ VOUT ≤ +10mV.
7. VIN = 0V. This is the maximum current that can be pulled out of the Disable pin with the HA5022 remaining enabled. The HA5022 is
considered disabled when the supply current has decreased by at least 0.5mA.
8. VOUT switches from -2V to +2V, or from +2V to -2V. Specification is from the 25% to 75% points.
9. .
10. RL = 100Ω, V OUT = 1V. Measured from 10% to 90% points for rise/fall times; from 50% points of input and output for propagation delay.
11. A. Production Tested; B. Typical or Guaranteed Limit based on characterization; C. Design Typical for information only.
12. VIN = +2V, DISABLE = +5V to 0V. Measured from the 50% point of DISABLE to VOUT = 0V.
13. VIN = +2V, DISABLE = 0V to +5V. Measured from the 50% point of DISABLE to VOUT = 2V.
14. VIN = 0V, Force VOUT from 0V to ±2.5V, tR = tF = 50ns, DISABLE = 0V.
15. Measured with a VM700A video tester using an NTC-7 composite VITS.
16. VOUT =±2.5V. At -40oC Product is tested at VOUT = ±2.25V because short test duration does not allow self heating.
Electrical Specifications VSUPPLY = ±5V, RF = 1kΩ, AV = +1, R L = 400 Ω, CL≤10pF, Unless Otherwise Specified (Continued)
PARAMETER TEST CONDITIONS
(NO TE 11)
TEST
LEVEL TEMP.
(oC) MIN TYP MAX UNITS
FPBW Slew Rate
2πVPEAK
----------------------------- ;V
PEAK 2V==
HA5022
3-344
Test Circuits and Waveforms
FIGURE 1. TEST CIRCUIT FOR TRANSIMPEDANCE MEASUREMENTS
FIGURE 2. SMALL SIGNAL PULSE RESPONSE CIRCUIT FIGURE 3. LARGE SIGNAL PULSE RESPONSE CIRCUIT
FIGURE 4. SMALL SIGNAL RESPONSE FIGURE 5. LARGE SIGNAL RESPONSE
+
-
50Ω
50Ω
DUT
HP4195
NETWORK
ANALYZER
VIN VOUT
RL
RF, 1kΩ
100Ω
50Ω
+
-DUT
VIN VOUT
RL
RF, 681Ω
400Ω
50Ω
+
-DUT
RI
681Ω
Vertical Scale: VIN = 100mV/Div., VOUT = 100mV/Div.
Horizontal Scale: 20ns/Div. Vertical Scale: VIN = 1V/Div., VOUT = 1V/Div.
Horizontal Scale: 50ns/Div.
HA5022
3-345
HA5022
Schematic Diagram
(One Amplifier of Two)
R2
800 R5
2.5K R6
15K D2
QP2
R1
60K
QN1
R3
6K
QN2
D1
QN3
QN4
R4
800
R7
15K
DIS
QN7
R9
820
QP4
QN6
QP3
R8
1.25K
QN5
+IN
QP7
R13
1K
R12
280
QP6
QN8
QP5
R10
820
QN9 QN11
QN10
QP10
QP8 QP9
R11
1K
R14
280 QN14
R16
400
R22
280
QN16
R17
280 R18
280
QP11
R15
400 R19
400
QP14
QN12
QP12
-IN
QN13
QP13 C2
R23
400 R26
200
R24
140
R20
140
QP15
C1
QN17
R25
20
QN18
R25
140
R21
140
R26
200
QP16
R27
200
R33
2K
QP18
QN20
QP17
R28
20
QN15
R30
7
QN19
OUT
QN21
R32
5
R29
9.5
QP19
QP20
R31
5
V+
V-
QP1
R33
800
1.4pF
1.4pF
3-346
Application Information
Optimum Feedback Resistor
The plots of inver ting and non-inverting frequency response,
see Figure 11 and Figure 12 in the Typical Performance
Curves section, illustrate the performance of the HA5022 in
various closed loop gain configurations. Although the band-
width dependency on closed loop gain isn’t as se v ere as that
of a voltage feedback amplifier, there can be an appreciable
decrease in bandwidth at higher gains. This decrease may
be minimized by taking advantage of the current feedback
amplifier’s unique relationship between bandwidth and RF.
All current feedback amplifiers require a feedback resistor,
even for unity gain applications, and RF, in conjunction with
the internal compensation capacitor, sets the dominant pole
of the frequency response. Thus , the amplifier’s bandwidth is
inversely proportional to RF. The HA5022 design is opti-
mized for a 1000Ω RF at a gain of +1. Decreasing RF in a
unity gain application decreases stability, resulting in exces-
sive peaking and overshoot. At higher gains the amplifier is
more stable, so RF can be decreased in a trade-off of stabil-
ity for bandwidth.
The table below lists recommended RF values for various
gains, and the expected bandwidth.
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip resistors
and chip capacitors is strongly recommended. If leaded
components are used the leads must be kept short espe-
cially for the power supply decoupling components and
those components connected to the inverting input.
Attention must be given to decoupling the power supplies. A
large value (10µF) tantalum or electrolytic capacitor in paral-
lel with a small value (0.1µF) chip capacitor works well in
most cases.
A ground plane is strongly recommended to control noise.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and possible instability. It is
recommended that the ground plane be removed under
traces connected to -IN, and that connections to -IN be kept
as short as possible to minimize the capacitance from this
node to ground.
Driving Capacitive Loads
Capacitive loads will degrade the amplifier’s phase margin
resulting in frequency response peaking and possible oscil-
lations. In most cases the oscillation can be avoided by plac-
ing an isolation resistor (R) in series with the output as
shown in Figure 6.
The selection criteria for the isolation resistor is highly
dependent on the load, but 27Ω has been determined to be
a good starting value.
Power Dissipation Considerations
Due to the high supply current inherent in quad amplifiers,
care must be tak en to insure that the maxim um junction tem-
perature (TJ, see Absolute Maximum Ratings) is not
exceeded. Figure 7 shows the maximum ambient tempera-
ture versus supply voltage for the available package styles
(PDIP, SOIC). At VS = ±5V quiescent operation both pack-
age styles may be operated over the full industrial range of -
40oC to 85oC. It is recommended that thermal calculations,
which take into account output power, be performed by the
designer.
Enable/Disable Function
When enabled the amplifier functions as a normal current
f eedbac k amplifier with all of the data in the electrical specifi-
cations table being valid and applicable. When disabled the
amplifier output assumes a true high impedance state and
the supply current is reduced significantly.
GAIN
(ACL)R
F
(Ω)BANDWIDTH
(MHz)
-1 750 100
+1 1000 125
+2 681 95
+5 1000 52
+10 383 65
-10 750 22
VIN VOUT
CL
RT
+
-
RI
RF
R
FIGURE 6. PLACEMENT OF THE OUTPUT ISOLATION
RESISTOR, R
140
130
120
110
100
90
80 5 7 9 111315
MAX. AMBIENT TEMPERATURE
SUPPLY VOLTAGE (±V)
PDIP
SOIC
FIGURE 7. MAXIMUM OPERATING AMBIENT TEMPERATURE
vs SUPPLY VOLTAGE
HA5022
3-347
The circuit shown in Figure 8 is a simplified schematic of the
enable/disable function. The large value resistors in series
with the DISABLE pin makes it appear as a current source to
the driver. When the driv er pulls this pin lo w current flo ws out
of the pin and into the driver. This current, which may be as
large as 350µA when external circuit and process variables
are at their extremes, is required to insure that point “A”
achieves the proper potential to disable the output. The
driver must have the compliance and capability of sinking all
of this current.
When VCC is +5V the DISABLE pin may be driven with a
dedicated TTL gate. The maximum low level output voltage
of the TTL gate, 0.4V, has enough compliance to insure that
the amplifier will always be disabled even though D1 will not
turn on, and the TTL gate will sink enough current to keep
point “A” at its proper voltage . When VCC is g reater than +5V
the DISABLE pin should be driven with an open collector
device that has a breakdown rating greater than VCC.
Ref erring to Figure 8, it can be seen that R6 will act as a pull-
up resistor to +VCC if the DISABLE pin is left open. In those
cases where the enable/disable function is not required on
all circuits some circuits can be permanently enabled by let-
ting the DISABLE pin float. If a driver is used to set the
enable/disable level, be sure that the driver does not sink
more than 20µA when the DISABLE pin is at a high level.
TTL gates, especially CMOS versions, do not violate this cri-
teria so it is permissible to control the enable/disable func-
tion with TTL.
Typical Applications
Two Channel Video Multiplexer
Referring to the amplifier U1A in Figure 9, R1 terminates the
cable in its characteristic impedance of 75Ω, and R4 back
terminates the cable in its characteristic impedance. The
amplifier is set up in a gain configuration of +2 to yield an
overall network gain of +1 when driving a double terminated
cable. The value of R3 can be changed if a different network
gain is desired. R5 holds the disable pin at ground thus
inhibiting the amplifier until the switch, S1, is thrown to posi-
tion 1. At position 1 the switch pulls the disable pin up to the
plus supply rail thereby enabling the amplifier. Since all of
the actual signal switching takes place within the amplifier,
it’s differential gain and phase parameters, which are 0.03%
and 0.03 degrees respectively, determine the circuit’s perfor-
mance. The other circuit, U1B, operates in a similar manner.
When the plus supply rail is 5V the disable pin can be driven
by a dedicated TTL gate as discussed earlier. If a multiplex er
IC or its equivalent is used to select channels its logic must
be break before make. When these conditions are satisfied
the HA5022 is often used as a remote video multiplexer, and
the multiplexer may be extended by adding more amplifier
ICs.
Low Impedance Multiplexer
Two common problems surface when you try to multiplex
multiple high speed signals into a low impedance source
such as an A/D conv erter . The first problem is the lo w source
impedance which tends to make amplifiers oscillate and
causes gain errors. The second problem is the multiplexer
which supplies no gain, introduces all kinds of distor tion and
limits the frequency response. Using op amps which ha v e an
enable/disable function, such as the HA5022, eliminates the
multiplexer problems because the external mux chip is not
needed, and the HA5022 can drive low impedance (large
capacitance) loads if a series isolation resistor is used.
Referring to Figure 10, both inputs are terminated in their
characteristic impedance; 75Ω is typical for video applica-
tions. Since the drivers usually are terminated in their char-
acteristic impedance the input gain is 0.5, thus the
amplifiers, U2, are configured in a gain of +2 to set the circuit
gain equal to one. Resistors R2 and R3 determine the ampli-
fier gain, and if a different gain is desired R2 should be
changed according to the equation G = (1 + R3/R2). R3 sets
the frequency response of the amplifier so you should refer
to the manufacturers data sheet before changing its value.
R5, C1 and D1 are an asymmetrical charge/discharge time
circuit which configures U1 as a break before make switch to
prevent both amplifiers from being active simultaneously. If
this design is extended to more channels the drive logic
must be designed to be break before make. R4 is enclosed
in the feedback loop of the amplifier so that the large open
loop amplifier gain of U2 will present the load with a small
closed loop output impedance while keeping the amplifier
stable for all values of load capacitance.
The circuit shown in Figure 10 was tested for the full range of
capacitor values with no oscillations being observed; thus,
problem one has been solved.The frequency and gain char-
acteristics of the circuit are now those of the amplifier inde-
pendent of any multiplexing action; thus, problem two has
been solved. The multiplexer transition time is approximately
15µs with the component values shown.
R6
15K
R7
15K
V+
ENABLE/DISABLE INPUT
D1
QP3
R8
QP18
A
R33
R10
FIGURE 8. SIMPLIFIED SCHEMATIC OF ENABLE/DISABLE
FUNCTION
HA5022
3-348
FIGURE 9. TWO CHANNEL HIGH IMPEDANCE MULTIPLEXER
FIGURE 10. LOW IMPEDANCE MULTIPLEXER
VIDEO INPUT #1
VIDEO INPUT #2
R1
75
R3
681
R2
681
R4
75
R5
2000
+
-
U1A
3
24
1
U1B
8
97
10
R9
75
R10
2000R7
681
R8
681
R6
75
+5V IN +5V
0.1µF10µF
-5V IN -5V
0.1µF10µF
+
+
1
R11
100
VIDEO OUTPUT
TO 75Ω LOAD
+5V
S1
2
3
ALL
OFF
NOTES:
17. U1 is HA5022.
18. All resistors in Ω.
19. S1 is break before make.
20. Use ground plane.
INPUT B
+
-
-5V
+
-
+5V
INHIBIT
CHANNEL
SWITCH
INPUT A
R1A
75
R1B
75
D1A
1N4148
U1C
U1A U1B U1D
R6
100K
R5A
2000
C1A
0.047µF
R5B
2000
D1B
1N4148
R1A
681
1
234
16
R3A
681
R4A
27
0.01µF
R2B
681 R4B
27
R3B
681
0.01µF
OUTPUT
7
6513
10
U2B
U2A
C1B
0.047µFNOTES:
21. U2: HA5022.
22. U1: CD4011.
HA5022
3-349
Typical P erformance Curves
VSUPPLY = ±5V, A V = +1, R F = 1kΩ, RL = 400 Ω, TA = 25oC , Unless Otherwise Specified
FIGURE 11. NON-INVERTING FREQUENCY RESPONSE FIGURE 12. INVERTING FREQUENCY RESPONSE
FIGURE 13. PHASE RESPONSE AS A FUNCTION OF
FREQUENCY FIGURE 14. BAND WIDTH AND GAIN PEAKING vs FEEDB A CK
RESISTANCE
FIGURE 15. BAND WIDTH AND GAIN PEAKING vs FEEDB A CK
RESISTANCE FIGURE 16. B AND WIDTH AND GAIN PEAKING vs LO AD
RESISTANCE
5
4
3
2
1
0
-1
-2
-3
-4
-5
NORMALIZED GAIN (dB)
FREQUENCY (MHz)
2 10 100 200
VOUT = 0.2VP-P
CL = 10pF AV = +1, RF = 1kΩ
AV = 2, RF = 681Ω
AV = 5, RF = 1kΩ
AV = 10, RF = 383Ω
5
4
3
2
1
0
-1
-2
-3
-4
-5 2 10 100 200
FREQUENCY (MHz)
NORMALIZED GAIN (dB)
VOUT = 0.2VP-P
CL = 10pF
RF = 750Ω
AV = -1
AV = -2
AV = -10
AV = -5
FREQUENCY (MHz)
2 10 100 200
0
-45
-90
-135
-100
-225
-270
-315
-360
180
135
90
0
-45
-90
-135
45
-180
NONINVERTING PHASE (DEGREES)
INVERTING PHASE (DEGREES)
VOUT = 0.2VP-P
CL = 10pF
AV = +10, RF = 383Ω
AV = -10, RF = 750Ω
AV = -1, RF = 750Ω
AV = +1, RF = 1kΩ
FEEDBACK RESISTOR (Ω)
500 700 900 1100 1300 1500
140
130
120 10
5
0
-3dB BANDWIDTH (MHz)
GAIN PEAKING (dB)
VOUT = 0.2VP-P
CL = 10pF
-3dB BANDWIDTH
GAIN PEAKING
AV = +1
FEEDBACK RESISTOR (Ω)
-3dB BANDWIDTH (MHz)
GAIN PEAKING (dB)
100
95
90
0
350 500 650 800 950 1100
-3dB BANDWIDTH
GAIN PEAKING
VOUT = 0.2VP-P
CL = 10pF
AV = +2
5
10
LOAD RESISTOR (Ω)
-3dB BANDWIDTH (MHz)
GAIN PEAKING (dB)
130
120
110
100
90
800 200 400 600 800 1000
6
4
2
0
VOUT = 0.2VP-P
CL = 10pF
-3dB BANDWIDTH
GAIN PEAKING
AV = +1
HA5022
3-350
FIGURE 17. BANDWIDTH vs FEEDBACK RESISTANCE FIGURE 18. SMALL SIGNAL O VERSHOO T vs LO AD
RESISTANCE
FIGURE 19. DIFFERENTIAL GAIN vs SUPPLY VOLTAGE FIGURE 20. DIFFERENTIAL PHASE vs SUPPLY VOLTAGE
FIGURE 21. DISTORTION vs FREQUENCY FIGURE 22. REJECTION RATIOS vs FREQUENCY
Typical P erformance Curves
VSUPPLY = ±5V, A V = +1, R F = 1kΩ, RL = 400 Ω, TA = 25oC , Unless Otherwise Specified (Continued)
80
60
40
20
0200 350 500 650 800 950
-3dB BANDWIDTH (MHz)
FEEDBACK RESISTOR (Ω)
VOUT = 0.2VP-P
CL = 10pF
AV = +10
LOAD RESISTANCE (Ω)
0 200 400 600 800 1000
16
6
0
OVERSHOOT (%)
VOUT = 0.1VP-P
CL = 10pF
VSUPPLY = ±5V, AV = +2
VSUPPLY = ±15V, AV = +1
VSUPPLY = ±5V, AV = +1
VSUPPLY = ±15V, AV = +2
12
SUPPLY VOLTAGE (±V)
3 5 7 9 11 13 15
0.10
0.08
0.06
0.04
0.02
0.00
DIFFERENTIAL GAIN (%)
FREQUENCY = 3.58MHz
RL = 75Ω
RL = 150Ω
RL = 1kΩ
0.08
0.06
0.04
0.02
0.003 5 7 9 11 13 15
SUPPLY VOLTAGE (±V)
DIFFERENTIAL PHASE (DEGREES)
RL = 1kΩ
RL = 75Ω
RL = 150Ω
FREQUENCY = 3.58MHz
-40
-50
-60
-70
-80
-900.3 1 10
FREQUENCY (MHz)
DISTORTION (dBc)
VOUT = 2.0VP-P
CL = 30pF
HD3
HD2
3RD ORDER IMD
HD2
HD3
FREQUENCY (MHz)
0
-10
-20
-30
-40
-50
-60
-70
-80
REJECTION RATIO (dB)
0.001 0.01 0.1 1 10 30
AV = +1
CMRR
POSITIVE PSRR
NEGATIVE PSRR
HA5022
3-351
FIGURE 23. PROPAGATION DELAY vs TEMPERATURE FIGURE 24. PROPAGATION DELAY vs SUPPLY VOLTAGE
FIGURE 25. SLEW RATE vs TEMPERATURE FIGURE 26. NON-INVERTING GAIN FLATNESS vs FREQUENCY
FIGURE 27. INVERTING GAIN FLATNESS vs FREQUENCY FIGURE 28. INPUT NOISE CHARACTERISTICS
Typical P erformance Curves
VSUPPLY = ±5V, A V = +1, R F = 1kΩ, RL = 400 Ω, TA = 25oC , Unless Otherwise Specified (Continued)
TEMPERATURE (oC)
-50 -25 0 25 50 75 100 125
8.0
7.5
7.0
6.5
6.0
PROPAGATION DELAY (ns)
RL = 100Ω
VOUT = 1.0VP-P
AV = +1
SUPPLY VOLTAGE (±V)
PROPAGATION DELAY (ns)
12
10
8
6
43 5 7 9 11 13 15
RLOAD = 100Ω
VOUT = 1.0VP-P
AV = +10, RF = 383Ω
AV = +2, RF = 681Ω
AV = +1, RF =1kΩ
TEMPERATURE (oC)
-50 -25 0 25 50 75 100 125
500
450
400
350
300
250
200
150
100
SLEW RATE (V/µs)
VOUT = 20VP-P
+ SLEW RATE
- SLEW RATE
FREQUENCY (MHz)
51015202530
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
NORMALIZED GAIN (dB)
VOUT = 0.2VP-P
CL = 10pF
AV= +2, RF = 681Ω
AV= +5, RF = 1kΩ
AV = +1, RF = 1kΩ
AV = +10, RF = 383Ω
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
NORMALIZED GAIN (dB)
FREQUENCY (MHz)
51015202530
V
OUT = 0.2VP-P
CL = 10pF
AV = -1
AV = -2
AV = -5
AV = -10
RF = 750Ω
FREQUENCY (kHz)
0.01 0.1 1 10 100
VOLTAGE NOISE (nV/√Hz)
CURRENT NOISE (pA/√Hz)
100
80
60
40
20
0
1000
800
600
400
200
0
AV = +10, RF = 383Ω
-INPUT NOISE CURRENT
+INPUT NOISE CURRENT
INPUT NOISE VOLTAGE
HA5022
3-352
FIGURE 29. INPUT OFFSET VOLTAGE vs TEMPERATURE FIGURE 30. +INPUT BIAS CURRENT vs TEMPERATURE
FIGURE 31. -INPUT BIAS CURRENT vs TEMPERATURE FIGURE 32. TRANSIMPEDANCE vs TEMPERATURE
FIGURE 33. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 34. REJECTION RATIO vs TEMPERATURE
Typical P erformance Curves
VSUPPLY = ±5V, A V = +1, R F = 1kΩ, RL = 400 Ω, TA = 25oC , Unless Otherwise Specified (Continued)
1.5
1.0
0.5
0.0-60 -40 -20 0 40 60 80 100 120 14020
VIO (mV)
TEMPERATURE (oC)
2
0
-2
-4-60 -40 -20 0 40 60 80 100 120 14020
BIAS CURRENT (µA)
TEMPERATURE (oC)
22
20
18
16
-60 -40 -20 0 40 60 80 100 120 14020
TEMPERATURE (oC)
BIAS CURRENT (µA)
TEMPERATURE (oC)
4000
3000
2000
1000
TRANSIMPEDANCE (kΩ)
-60 -40 -20 0 40 60 80 100 120 14020
34 5 6 7 8 9 10 11 12 13 14 15
25
20
15
10
5
ICC (mA)
SUPPLY VOLTAGE (±V)
125oC
55oC
25oC
58
60
62
64
66
68
70
72
74
-100 -50 0 50 100 150
+PSRR
-PSRR
CMRR
200 250
TEMPERATURE (oC)
REJECTION RATIO (dB)
HA5022
3-353
FIGURE 35. SUPPLY CURRENT vs DISABLE INPUT VOLTAGE FIGURE 36. OUTPUT SWING vs TEMPERATURE
FIGURE 37. OUTPUT SWING vs LOAD RESISTANCE FIGURE 38. INPUT OFFSET VOLT A GE CHANGE BETWEEN
CHANNELS vs TEMPERATURE
FIGURE 39. INPUT BIAS CURRENT CHANGE BETWEEN
CHANNELS vs TEMPERATURE FIGURE 40. DISABLE SUPPLY CURRENT vs SUPPLY VOLTAGE
Typical P erformance Curves
VSUPPLY = ±5V, A V = +1, R F = 1kΩ, RL = 400 Ω, TA = 25oC , Unless Otherwise Specified (Continued)
10 2 3 4 5 6 7 8 9 10 11 12 13 14 15
DISABLE INPUT VOLTAGE (V)
40
30
20
10
0
SUPPLY CURRENT (mA)
+5V +10V +15V
4.0
3.8
3.6-60 -40 -20 0 40 60 80 100 120 14020
TEMPERATURE (oC)
OUTPUT SWING (V)
0.01 0.10 1.00 10.00
30
20
10
0
VOUT (VP-P)
LOAD RESISTANCE (kΩ)
VS = ±15V
VS = ±10V
VS = ±4.5V
-60 -40 -20 0 40 60 80 100 120 14020
1.2
1.1
1.0
0.9
0.8
VIO (mV)
TEMPERATURE (oC)
-60 -40 -20
1.5
1.0
0.5
0.0
TEMPERATURE (oC)
∆BIAS CURRENT (µA)
40 60 80 100 120 14020
03456789101112131415
30
25
20
15
10
5
SUPPLY VOLTAGE (±V)
ICC (mA)
-55oC
25oC
125oC
HA5022
3-354
FIGURE 41. CHANNEL SEPARATION vs FREQUENCY FIGURE 42. ENABLE/DISABLE TIME vs OUTPUT VOLTAGE
FIGURE 43. DISABLE FEEDTHROUGH vs FREQUENCY FIGURE 44. TRANSIMPEDANCE vs FREQUENCY
FIGURE 45. TRANSIMPEDENCE vs FREQUENCY
Typical P erformance Curves
VSUPPLY = ±5V, A V = +1, R F = 1kΩ, RL = 400 Ω, TA = 25oC , Unless Otherwise Specified (Continued)
-30
-40
-50
-60
-70
-800.1 1 10 30
SEPARATION (dB)
FREQUENCY (MHz)
AV = +1
VOUT = 2VP-P
DISABLE
ENABLE
ENABLE
DISABLE
ENABLE TIME (ns)
20
18
16
14
12
10
8
6
4
2
0
OUTPUT VOLTAGE (V)
-2.5 -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 2.5
32
30
28
26
24
22
20
18
16
14
12
DISABLE TIME (µs)
-20
-40
-50
-60
-70
-80
0.1 1 10 20
FEEDTHROUGH (dB)
FREQUENCY (MHz)
-30
-10
0DISABLE = 0V
VIN = 5VP-P
RF = 750Ω
-135
-90
-45
0
45
90
135
180
10
1
0.1
0.01
0.001
0.001 0.01 0.1 1 10 100
PHASE ANGLE (DEGREES)
TRANSIMPEDANCE (MΩ)
RL = 100Ω
FREQUENCY (MHz)
-135
-90
-45
0
45
90
135
180
10
1
0.1
0.01
0.001
0.001 0.01 0.1 1 10 100
PHASE ANGLE (DEGREES)
RL = 400Ω
FREQUENCY (MHz)
TRANSIMPEDANCE (MΩ)
HA5022
3-355
Die Characteristics
DIE DIMENSIONS:
1650µm x 2540µm x 483µm
METALLIZATION:
Type: Metal 1: AlCu (1%)
Thickness: Metal 1: 8kű0.4kÅ
Type: Metal 2: AlCu (1%)
Thickness: Metal 2: 16kű0.8kÅ
SUBSTRATE POTENTIAL (Powered Up):
V-
PASSIVATION:
Type: Nitride
Thickness: 4kű0.4kÅ
TRANSISTOR COUNT:
124
PROCESS:
High Frequency Bipolar Dielectric Isolation
Metallization Mask Layout
HA5022
-IN1
V+
OUT1
+IN2
DIS2
V-
NC
OUT2
-IN2
DIS1
+IN1
HA5022
