MC100EP17DTR2G - ON Semiconductor

November, 2008 − Rev. 8

1Publication Order Number:

MC10EP17/D

MC10EP17, MC100EP17

3.3V / 5V ECL Quad

Differential Driver/Receiver

Description

The MC10/100EP17 is a 4-bit differential line receiver based on the

EP17 device. The >3.0 GHz maximum frequency provided by the

high frequency outputs makes the device ideal for buffering of very

high speed oscillators.

The VBB pin, an internally generated voltage supply, is available to

this device only. For single-ended input conditions, the unused

differential input is connected to VBB as a switching reference voltage.

VBB may also rebias AC coupled inputs. When used, decouple VBB

and VCC via a 0.01 mF capacitor and limit current sourcing or sinking

to 0.5 mA. When not used, VBB should be left open.

The design incorporates two stages of gain, internal to the device,

making it an excellent choice for use in high bandwidth amplifier

applications.

Inputs of unused gates can be left open and will not affect the

operation of the rest of the device. All VCC and VEE pins must be

externally connected to power supply to guarantee proper operation.

The 100 Series contains temperature compensation.

Features

•220 ps Typical Propagation Delay

•Maximum Frequency >3.0 GHz Typical

•PECL Mode Operating Range: VCC = 3.0 V to 5.5 V

with VEE = 0 V

•NECL Mode Operating Range: VCC = 0 V

with VEE = −3.0 V to −5.5 V

•Open Input Default State

•Safety Clamp on Inputs

•Q Output Will Default LOW with Inputs Open or at VEE

•VBB Output

•Pb−Free Packages are Available*

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

TSSOP−20

DT SUFFIX

CASE 948E

MARKING

DIAGRAMS*

XXX = 10 or 100

A = Assembly Location

L, = Assembly Lot

WL = Wafer Lot

Y, YY = Year

W, WW = Work Week

G or G= Pb−Free Package

SO−20

DW SUFFIX

CASE 751D

MCXXXEP17

AWLYYWWG

http://onsemi.com

*For additional marking information, refer to

Application Note AND8002/D.

(Note: Microdot may be in either loca-

tion)

See detailed ordering and shipping information in the package

dimensions section on page 8 of this data sheet.

ORDERING INFORMATION

XXXX

EP17

ALYWG

QFN−20

MN SUFFIX

CASE 485E

MCXXX

EP17

ALYWG

MC10EP17, MC100EP17

http://onsemi.com

Figure 1. 20−Lead Pinout (Top View) and Logic Diagram

D1 D2 D3

1718 16 15 14 13 12

43 56789

Q1 Q1 Q2 Q2 Q3 Q3 VEE

1920

VCC Q0

D0 D2VCC D3 VBB

D[0:3]*, D[0:3]*

Q[0:3], Q[0:3] ECL Differential Data Outputs

FUNCTION

ECL Differential Data Inputs

VBB

VCC Positive Supply

Reference Voltage Output

VEE Negative Supply

Table 1. PIN DESCRIPTION

* Pins will default LOW when left open.

EP Exposed Pad

678910

20 19 18 17 16

Figure 1. QFN−20 Pinout (Top View)

VCC Q0VCC

VEE

D3 D3 VBB

Exposed Pad

NOTE: The Exposed Pad (EP) on package bottom must be attached to a heat−sinking conduit.

The Exposed Pad may only be electrically connected to VEE.

MC10/100EP17

Table 2. ATTRIBUTES

Characteristics Value

Internal Input Pulldown Resistor 75 kW

Internal Input Pullup Resistor N/A

ESD Protection Human Body Model

Machine Model

Charged Device Model

> 2 kV

> 100 V

> 2 kV

Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb Pkg Pb−Free Pkg

SOIC−20

TSSOP−20

QFN−20

Level 1

N/A

Level 3

Level 1

Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in

Transistor Count 259 Devices

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

1. For additional information, see Application Note AND8003/D.

MC10EP17, MC100EP17

http://onsemi.com

Table 3. MAXIMUM RATINGS

Symbol Parameter Condition 1 Condition 2 Rating Unit

VCC PECL Mode Power Supply VEE = 0 V 6 V

VEE NECL Mode Power Supply VCC = 0 V −6 V

VIPECL Mode Input Voltage

NECL Mode Input Voltage

VEE = 0 V

VCC = 0 V

VI v VCC

VI w VEE

−6

Iout Output Current Continuous

Surge

100

IBB VBB Sink/Source ± 0.5 mA

TAOperating Temperature Range −40 to +85 °C

Tstg Storage Temperature Range −65 to +150 °C

qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm

500 lfpm

20 TSSOP

140

100

°C/W

qJC Thermal Resistance (Junction−to−Case) Standard Board 20 TSSOP 23 to 41 °C/W

qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm

500 lfpm

20 SOIC

°C/W

qJC Thermal Resistance (Junction−to−Case) Standard Board 20 SOIC 30 to 35 °C/W

qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm

500 lfpm

QFN−20

°C/W

qJC Thermal Resistance (Junction−to−Case) Standard Board QFN−20 18 °C/W

Tsol Wave Solder Pb

Pb−Free

265

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

Table 4. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)

Symbol Characteristic

−40°C 25°C 85°C

Unit

Min Typ Max Min Typ Max Min Typ Max

IEE Power Supply Current 42 50 65 44 52 66 46 54 68 mA

VOH Output HIGH Voltage (Note 3) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mV

VOL Output LOW Voltage (Note 3) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV

VIH Input HIGH Voltage (Single−Ended) 2090 2415 2155 2480 2215 2540 mV

VIL Input LOW Voltage (Single−Ended) 365 1690 1430 1755 1490 1815 mV

VBB Output Voltage Reference 1790 1890 1990 1855 1955 2055 1915 2015 2115 mV

VIHCMR Input HIGH Voltage Common Mode

Range (Differential) (Note 4)

2.0 3.3 2.0 3.3 2.0 3.3 V

IIH Input HIGH Current 150 150 150 mA

IIL Input LOW Current 0.5 0.5 0.5 mA

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.

3. All loading with 50 W to VCC − 2.0 V.

4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential

input signal.

MC10EP17, MC100EP17

http://onsemi.com

Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)

Symbol Characteristic

−40°C 25°C 85°C

Unit

Min Typ Max Min Typ Max Min Typ Max

IEE Power Supply Current 42 50 65 44 52 66 46 54 68 mA

VOH Output HIGH Voltage (Note 6) 3865 3990 4115 3930 4055 4180 3990 4115 4240 mV

VOL Output LOW Voltage (Note 6) 3065 3190 3315 3130 3255 3380 3190 3315 3440 mV

VIH Input HIGH Voltage (Single−Ended) 3790 4115 3855 4180 3915 4240 mV

VIL Input LOW Voltage (Single−Ended) 3065 3390 3130 3455 3190 3515 mV

VBB Output Voltage Reference 3490 3590 3690 3555 3655 3755 3615 3715 3815 mV

VIHCMR Input HIGH Voltage Common Mode

Range (Differential) (Note 7)

2.0 5.0 2.0 5.0 2.0 5.0 V

IIH Input HIGH Current 150 150 150 mA

IIL Input LOW Current 0.5 0.5 0.5 mA

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.

6. All loading with 50 W to VCC − 2.0 V.

7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential

input signal.

Table 6. 10EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 8)

Symbol Characteristic

−40°C 25°C 85°C

Unit

Min Typ Max Min Typ Max Min Typ Max

IEE Power Supply Current 42 50 65 44 52 66 46 54 68 mA

VOH Output HIGH Voltage (Note 9) −1135 −1010 −885 −1070 −945 −820 −1010 −885 −760 mV

VOL Output LOW Voltage (Note 9) −1935 −1810 −1685 −1870 −1745 −1620 −1810 −1685 −1560 mV

VIH Input HIGH Voltage (Single−Ended) −1210 −885 −1145 −820 −1085 −760 mV

VIL Input LOW Voltage (Single−Ended) −1935 −1610 −1870 −1545 −1810 −1485 mV

VBB Output Voltage Reference −1510 −1410 −1310 −1445 −1345 −1245 −1385 −1285 −1185 mV

VIHCMR Input HIGH Voltage Common Mode

Range (Differential) (Note 10)

VEE + 2.0 0.0 VEE + 2.0 0.0 VEE + 2.0 0.0 V

IIH Input HIGH Current 150 150 150 mA

IIL Input LOW Current 0.5 0.5 0.5 mA

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

8. Input and output parameters vary 1:1 with VCC.

9. All loading with 50 W to VCC − 2.0 V.

10.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential

input signal.

MC10EP17, MC100EP17

http://onsemi.com

Table 7. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 11)

Symbol Characteristic

−40°C 25°C 85°C

Unit

Min Typ Max Min Typ Max Min Typ Max

IEE Power Supply Current 47 55 63 50 58 66 54 62 70 mA

VOH Output HIGH Voltage (Note 12) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV

VOL Output LOW Voltage (Note 12) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV

VIH Input HIGH Voltage (Single−Ended) 2075 2420 2075 2420 2075 2420 mV

VIL Input LOW Voltage (Single−Ended) 1355 1675 1355 1675 1355 1675 mV

VBB Output Voltage Reference 1775 1875 1975 1775 1875 1975 1775 1875 1975 mV

VIHCMR Input HIGH Voltage Common Mode

Range (Differential) (Note 13)

2.0 3.3 2.0 3.3 2.0 3.3 V

IIH Input HIGH Current 150 150 150 mA

IIL Input LOW Current 0.5 0.5 0.5 mA

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

11. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.

12.All loading with 50 W to VCC − 2.0 V.

13.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential

input signal.

Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 14)

Symbol Characteristic

−40°C 25°C 85°C

Unit

Min Typ Max Min Typ Max Min Typ Max

IEE Power Supply Current 47 55 63 50 58 66 54 62 70 mA

VOH Output HIGH Voltage (Note 15) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mV

VOL Output LOW Voltage (Note 15) 3055 3180 3305 3055 3180 3305 3055 3180 3305 mV

VIH Input HIGH Voltage (Single−Ended) 3775 4120 3775 4120 3775 4120 mV

VIL Input LOW Voltage (Single−Ended) 3055 3375 3055 3375 3055 3375 mV

VBB Output Voltage Reference 3475 3575 3675 3475 3575 3675 3475 3575 3675 mV

VIHCMR Input HIGH Voltage Common Mode

Range (Differential) (Note 16)

2.0 5.0 2.0 5.0 2.0 5.0 V

IIH Input HIGH Current 150 150 150 mA

IIL Input LOW Current 0.5 0.5 0.5 mA

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

14.Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.

15.All loading with 50 W to VCC − 2.0 V.

16.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential

input signal.

MC10EP17, MC100EP17

http://onsemi.com

Table 9. 100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 17)

Symbol Characteristic

−40°C 25°C 85°C

Unit

Min Typ Max Min Typ Max Min Typ Max

IEE Power Supply Current 47 55 63 50 58 66 54 62 70 mA

VOH Output HIGH Voltage (Note 18) −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV

VOL Output LOW Voltage (Note 18) −1945 −1820 −1695 −1945 −1820 −1695 −1945 −1820 −1695 mV

VIH Input HIGH Voltage (Single−Ended) −1225 −880 −1225 −880 −1225 −880 mV

VIL Input LOW Voltage (Single−Ended) −1945 −1625 −1945 −1625 −1945 −1625 mV

VBB Output Voltage Reference −1525 −1425 −1325 −1525 −1425 −1325 −1525 −1425 −1325 mV

VIHCMR Input HIGH Voltage Common Mode

Range (Differential) (Note 19)

VEE + 2.0 0.0 VEE + 2.0 0.0 VEE + 2.0 0.0 V

IIH Input HIGH Current 150 150 150 mA

IIL Input LOW Current 0.5 0.5 0.5 mA

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

17.Input and output parameters vary 1:1 with VCC.

18.All loading with 50 W to VCC − 2.0 V.

19.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential

input signal.

Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)

Symbol Characteristic

−40°C 25°C 85°C

Unit

Min Typ Max Min Typ Max Min Typ Max

fmax Maximum Frequency (Figure 2) > 3 > 3 > 3 GHz

tPLH,

tPHL

Propagation Delay to Output Differential

10 Series

100 Series

125

150

200

220

275

300

150

180

220

250

300

320

200

260

290

350

360

tJITTER CLOCK Random Jitter (RMS)

@ v 1.0 GHz

@ v 1.5 GHz

@ v 2.0 GHz

@ v 2.5 GHz

@ v 3.0 GHz

0.132

0.143

0.148

0.129

0.2

0.3

0.147

0.159

0.146

0.131

0.142

0.2

0.3

0.154

0.156

0.169

0.147

0.168

0.3

VPP Input Voltage Swing

(Differential Configuration)

150 800 1200 150 800 1200 150 800 1200 mV

Output Rise/Fall Times Q, Q

(20% − 80%)

100 160 220 100 170 230 120 190 250 ps

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

20.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.

MC10EP17, MC100EP17

http://onsemi.com

100

200

300

400

500

600

700

800

0 1000 2000 3000 4000 5000 6000

Figure 2. Fmax/Jitter

FREQUENCY (MHz)

(JITTER)

ÉÉÉÉÉÉÉÉ

VOUTpp (mV)

JITTEROUT ps (RMS)

ÉÉ

Figure 3. Typical Termination for Output Driver and Device Evaluation

(See Application Note AND8020/D − Termination of ECL Logic Devices.)

Driver

Device

Receiver

Device

Q D

Zo = 50 W

50 W50 W

VTT

VTT = VCC − 2.0 V

MC10EP17, MC100EP17

http://onsemi.com

ORDERING INFORMATION

Device Package Shipping†

MC10EP17DT TSSOP−20 75 Units / Rail

MC10EP17DTG TSSOP−20

(Pb−Free)

75 Units / Rail

MC10EP17DTR2 TSSOP−20 2500 / Tape & Reel

MC10EP17DTR2G TSSOP−20

(Pb−Free)

2500 / Tape & Reel

MC10EP17DW SOIC−20 38 Units / Rail

MC10EP17DWG SOIC−20

(Pb−Free)

38 Units / Rail

MC10EP17DWR2 SOIC−20 1000 / Tape & Reel

MC10EP17DWR2G SOIC−20

(Pb−Free)

1000 / Tape & Reel

MC10EP17MNG QFN−20

(Pb−Free)

92 Units / Rail

MC10EP17MNTXG QFN−20

(Pb−Free)

3000 / Tape & Reel

MC100EP17DT TSSOP−20 75 Units / Rail

MC100EP17DTG TSSOP−20

(Pb−Free)

75 Units / Rail

MC100EP17DTR2 TSSOP−20 2500 / Tape & Reel

MC100EP17DTR2G TSSOP−20

(Pb−Free)

2500 / Tape & Reel

MC100EP17DW SOIC−20 38 Units / Rail

MC100EP17DWG SOIC−20

(Pb−Free)

38 Units / Rail

MC100EP17DWR2 SOIC−20 1000 / Tape & Reel

MC100EP17DWR2G SOIC−20

(Pb−Free)

1000 / Tape & Reel

MC100EP17MNG QFN−20

(Pb−Free)

92 Units / Rail

MC100EP17MNTXG QFN−20

(Pb−Free)

3000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

Resource Reference of Application Notes

AN1405/D −ECL Clock Distribution Techniques

AN1406/D −Designing with PECL (ECL at +5.0 V)

AN1503/D −ECLinPSt I/O SPiCE Modeling Kit

AN1504/D −Metastability and the ECLinPS Family

AN1568/D −Interfacing Between LVDS and ECL

AN1672/D −The ECL Translator Guide

AND8001/D −Odd Number Counters Design

AND8002/D −Marking and Date Codes

AND8020/D −Termination of ECL Logic Devices

AND8066/D −Interfacing with ECLinPS

AND8090/D −AC Characteristics of ECL Devices

MC10EP17, MC100EP17

http://onsemi.com

PACKAGE DIMENSIONS

TSSOP−20

CASE 948E−02

ISSUE C

DIM

MIN MAX MIN MAX

INCHES

6.60 0.260

MILLIMETERS

B4.30 4.50 0.169 0.177

C1.20 0.047

D0.05 0.15 0.002 0.006

F0.50 0.75 0.020 0.030

G0.65 BSC 0.026 BSC

H0.27 0.37 0.011 0.015

J0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L6.40 BSC 0.252 BSC

M0 8 0 8

____

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH OR GATE BURRS SHALL NOT

EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION

SHALL NOT EXCEED 0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08

(0.003) TOTAL IN EXCESS OF THE K

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE

DETERMINED AT DATUM PLANE −W−.

ÍÍÍÍ

110

1120

PIN 1

IDENT

−T−

0.100 (0.004)

DGH

SECTION N−N

JJ1

−W−

SEATING

PLANE

−V−

−U−

0.10 (0.004) V S

20X REFK

L/2

U0.15 (0.006) T

DETAIL E

0.25 (0.010)

DETAIL E

6.40 0.252

--- ---

U0.15 (0.006) T

7.06

16X

0.36 16X

1.26

0.65

DIMENSIONS: MILLIMETERS

PITCH

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

MC10EP17, MC100EP17

http://onsemi.com

PACKAGE DIMENSIONS

B20X

H10X

18X A1

SEATING

PLANE

hX 45_

0.25 M

0.25 S

DIM MIN MAX

MILLIMETERS

A2.35 2.65

A1 0.10 0.25

B0.35 0.49

C0.23 0.32

D12.65 12.95

E7.40 7.60

e1.27 BSC

H10.05 10.55

h0.25 0.75

L0.50 0.90

q0 7

NOTES:

1. DIMENSIONS ARE IN MILLIMETERS.

2. INTERPRET DIMENSIONS AND TOLERANCES

PER ASME Y14.5M, 1994.

3. DIMENSIONS D AND E DO NOT INCLUDE MOLD

PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.

5. DIMENSION B DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE PROTRUSION

SHALL BE 0.13 TOTAL IN EXCESS OF B

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

SO−20 WB

CASE 751D−05

ISSUE G

MC10EP17, MC100EP17

http://onsemi.com

PACKAGE DIMENSIONS

0.10 (0.004) T

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A4.00 BSC 0.157 BSC

B4.00 BSC 0.157 BSC

C0.80 1.00 0.031 0.039

D0.23 0.35 0.009 0.014

G0.50 BSC 0.020 BSC

H1.38 1.43 0.054 0.056

J0.20 REF 0.008 REF

K0.00 0.05 0.000 0.002

L0.35 0.45 0.014 0.018

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION D APPLIES TO PLATED TERMINAL

AND IS MEASURED BETWEEN 0.25 AND 0.30 MM

FROM TERMINAL.

4. COPLANARITY APPLIES TO THE EXPOSED PAD

AS WELL AS THE TERMINALS.

−T−

−X−

NOTE 3

SEATING

PLANE

−Y−

0.25 (0.010) T

0.08 (0.003) T

20 16

E2.75 2.85 0.108 0.112

F2.75 2.85 0.108 0.112

M2.00 BSC 0.079 BSC

N2.00 BSC 0.079 BSC

P1.38 1.43 0.054 0.056

R0.60 0.80 0.024 0.031

QFN−20

CASE 485E−01

ISSUE O

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent

rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other

applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.

Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries,

affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury

or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an

Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5773−3850

MC10EP17/D

ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your loca

Sales Representative