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©2004 Fairchild Semiconductor Corporation HGT1S7N60A4S9A, HGTG7N60A4, HGTP7N60A4 Rev. B2
HGT1S7N60A4S9A, HGTG7N60A4
600V, SMPS Series N-Channel IGBT
The HGT1S7N6 0A4S9A , HGTG7N60A4 an d HGTP7N60A4
are MOS gated high voltage switching devices combining
the bes t featu res of MOSFETs and bipolar tr ansistors . These
devices have the high input impedance of a MOSFET and
the low on-state conduction loss of a bipolar transistor. The
much lower on-state voltage drop varies only moderately
between 25oC and 150oC.
This IGBT is ideal for many high voltage switching
applications operating at high frequencies where low
conduction losses are essential. This device has been
optimized for high frequency switch mode power supp lies.
Formerly Developmental Type TA49331.
Features
>100kHz Operation at 390V, 7A
200kHz Operation at 390V, 5A
600V Switching SOA Capability
Typical Fall Time . . . . . . . . . . . . . . . . . . . 75 ns at TJ = 125oC
Low Conduction Loss
SymbolOrdering Information
PART NUMBER PACKAGE BRAND
HGT1S7N60A4S9A TO-263AB G7N60A4
HGTG7N60A4 TO-247 G7N60A4
HGTP7N60A4 TO-220AB G7N60A4
NOTE: When ordering, use the entire part number .
C
E
G
Packaging JE DEC ST YLE TO-247 JEDEC TO-220AB
JEDEC TO-263AB
FAIRCHILD CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S . PATENTS
4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713
4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637
4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986
4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767
4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027
COLLECTOR
(BOTTOM SIDE METAL)
C
E
G
C
E
G
COLLECTOR
(FLANGE)
G COLLECTOR
(FLANGE)
E
Data Sheet September 2004
HGTP7N60A4
©2004 Fairchild Semiconductor Corporation HGT1S7N60A4S9A, HGTG7N60A4, HGTP7N60A4 Rev. B2
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified ALL TYPES UNITS
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BVCES 600 V
Collector Current Continuous
At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 34 A
At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110 14 A
Coll e c to r Curre n t Pu l s e d (Note 1 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ICM 56 A
Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES ±20 V
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM ±30 V
Switching Safe O perating Area at TJ = 150oC, Figure 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . .SSOA 35A at 600V
Single Pulse Avalanche Energy at TC = 25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 25mJ at 7A
Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD125 W
Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 W/oC
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC
Maximum Lead Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
P ackage Body for 10s, See Tech Brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TPKG 300
260
oC
oC
CAUTION: Stresses above those listed in “Device Maximum Ratings” may cause permanen t damage to the device. This is a stress only rating and operatio n of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. Pulse width limited by maximum junction tempera ture.
Electrical Specifications TJ = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Collector to Emitter Breakdown Voltage BVCES IC = 250µA, VGE = 0V 600 - - V
Emitter to Collector Breakdown Voltage BVECS IC = - 10mA , VGE = 0V 20 - - V
Collector to Emitter Leakage Current ICES VCE = 600V TJ = 25oC - - 250 µA
TJ = 125oC--2mA
Collector to Emitter Saturation Voltage VCE(SAT) IC = 7A,
VGE = 15V TJ = 25oC-1.92.7V
TJ = 125oC-1.62.2V
Gate to Emitter Threshold Voltage VGE(TH) IC = 250µA, VCE = 600V 4.5 5.9 7.0 V
Gate to Emitter Leakage Current IGES VGE = ±20V - - ±250 nA
Switching SOA SSOA TJ = 150oC, RG = 25Ω, VGE = 15V
L = 100µH, VCE = 600V 35 - - A
Pulsed Avalanche Energy EAS ICE = 7A, L = 500µH25--mJ
Gate to Emitter Plateau Voltage VGEP IC = 7A, VCE = 300V - 9.0 - V
On-State Gate Charge Qg(ON) IC = 7A,
VCE = 300V VGE = 15V - 37 45 nC
VGE = 20V - 48 60 nC
Current Turn-On Delay Time td(ON)I IGBT and Diode at TJ = 25oC
ICE = 7A
VCE = 390V
VGE = 15V
RG = 25
L = 1mH
Test Circuit (Figure 20)
-11- ns
Current Rise Time trI -11- ns
Current Turn-Off Delay Time td(OFF)I - 100 - ns
Current Fall Time tfI -45- ns
Turn-On Energy (Note 2) EON1 -55- µJ
Turn-On Energy (Note 2) EON2 - 120 150 µJ
Turn-Off Energy (Note 3) EOFF -6075µJ
HGT1S7N60A4S9A, HGTG7N 60A4, HGTP7N60A4
©2004 Fairchild Semiconductor Corporation HGT1S7N60A4S9A, HGTG7N60A4, HGTP7N60A4 Rev. B2
Current Turn-On Delay Time td(ON)I IGBT and Diode at TJ = 125oC
ICE = 7A
VCE = 390V
VGE = 15V
RG = 25
L = 1mH
Test Circuit (Figure 20)
-10- ns
Current Rise Time trI -7-ns
Current Turn-Off Delay Time td(OFF)I - 130 150 ns
Current Fall Time tfI -7585ns
Turn-On Energy (Note 2) EON1 -50- µJ
Turn-On Energy (Note 2) EON2 - 200 215 µJ
Turn-Off Energy (Note 3) EOFF - 125 170 µJ
Thermal Resistance Junction To Case RθJC --1.0
oC/W
NOTES:
2. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn-on loss of the IGBT only. EON2
is the turn-on loss when a typical diode is used in t he test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in
Figure 20.
3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending
at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement
of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
Electrical Specifications TJ = 25oC, Unless Otherwise Specified (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Typical Performance Curves Unless Otherwise Specified
FIGURE 1. DC COLLECT OR CURRENT vs CASE
TEMPERATURE FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
FIGURE 3. OPERA TING FRE QUENCY vs COLLECT OR T O
EMITTER CURRENT FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
TC, CASE TEMPERATURE (oC)
ICE, DC COLLECTOR CURRENT (A)
50
10
0
30
20
25
25 75 100 125 150
35 VGE = 15V
15
5
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
700
20
0
ICE, COLLECTOR TO EMITTER CURRENT (A)
300 400200100 500 600
0
30
10
40 TJ = 150oC, RG = 25, VGE = 15V, L = 100µH
fMAX, OPERATING FREQUENCY (kHz)
1
ICE, COLLECTOR TO EMITTER CURRENT (A)
30
200
20510
500
TJ = 125oC, RG = 25, L = 2mH, VCE = 390V
100 fMAX1 = 0.05 / (td(OFF)I + td(ON)I)
RØJC = 1.0oC/W, SEE NOTES
PC = CONDUCTION DISSIPATION
(DUTY FACTOR = 50%)
fMAX2 = (PD - PC) / (EON2 + EOFF)
TCVGE
15V
75oC
V
GE
, GATE TO EMITTER VOLTAGE (V)
I
SC
, PEAK SHORT CIRCUIT CURRENT (A )
t
SC
, SHORT CIRCUIT WITHSTAND TIME (
µ
s)
10 11 12 15
4
6
14
20
80
100
14016
13 14
8
10
12
40
60
120
V
CE
= 390V, R
G
= 25
, T
J
= 125
o
C
t
SC
I
SC
HGT1S7N60A4S9A, HGTG7N 60A4, HGTP7N60A4
©2004 Fairchild Semiconductor Corporation HGT1S7N60A4S9A, HGTG7N60A4, HGTP7N60A4 Rev. B2
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECT OR T O
EMITTER CURRENT FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECT OR TO
EMITTER CURRENT
FIGURE 9. TURN-ON DELAY TIME vs COLLECT OR TO
EMITTER CURRENT FIGURE 10. TURN-ON RISE TIME vs COLLECTO R T O
EMITTER CURRENT
Typical Performance Curves Unless Otherwise Specified (Continued)
01.0
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
ICE, COLL ECTOR TO EMI T TE R CU RR EN T (A)
0
5
10
1.5 2.0 3.0
25
20
TJ = 125oC
TJ = 150oC
PULSE DURATION = 250µs
DUTY CYCLE < 0.5%, VGE = 12V
30
TJ = 25oC
0.5 2.5
15
ICE, COLLECTOR TO EMITTER CURRENT (A)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
DUTY CYCLE < 0.5%, VGE = 15V
PULSE DURATION = 250µs
TJ = 150oC TJ = 25oC
0
5
10
25
20
30
15
0 1.0 1.5 2.0 3.00.5 2.5
TJ = 125oC
EON2, TURN-ON ENERGY LOSS (µJ)
300
ICE, COLLECTOR TO EMITTER CURRENT (A)
200
400
042 6 8 101214
TJ = 125oC, VGE = 12V, VGE = 15V
RG = 25, L = 1mH, VCE = 390V
TJ = 25oC, VGE = 12V, VGE = 15V
100
0
500
300
ICE, COLLECTOR TO EMITTER CURRENT (A)
EOFF, TURN-OFF ENERGY LOSS (µJ)
0
50
200
100
250
350
TJ = 25oC, VGE = 12V OR 15V
TJ = 125oC, VGE = 12V OR 15V
150
RG = 25, L = 1mH, VCE = 390V
42 6 8 1012140
ICE, COLLECTOR TO EMITTER CURRENT (A)
td(ON)I, TURN-ON DELAY TIME (ns)
8
14
16
TJ = 125oC, VGE = 15V
RG = 25, L = 1mH, VCE = 390V
12
10
TJ = 25oC, VGE = 15V
TJ = 125oC, VGE = 12V
TJ = 25oC, VGE = 12V
42681012140ICE, COLLECTOR TO EMITTER CURRENT (A)
trI, RISE TIME (ns)
0
20
10
40
30
RG = 25, L = 1mH, VCE = 390V
TJ = 25oC, VGE = 12V, VGE = 15V
TJ = 125oC, VGE = 12V, VGE = 15V
42681012140
HGT1S7N60A4S9A, HGTG7N 60A4, HGTP7N60A4
©2004 Fairchild Semiconductor Corporation HGT1S7N60A4S9A, HGTG7N60A4, HGTP7N60A4 Rev. B2
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR T O
EMITTER CURRENT FIGURE 12. FALL TIME vs COLLECT OR T O EMITT ER
CURRENT
FIGURE 13. TRANSFER CHARACTERISTIC FIGURE 14. GATE CHARGE WAVEFORMS
FIGURE 15. T O TAL SWIT CHING LOSS vs CASE
TEMPERATURE FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE
Typical Performance Curves Unless Otherwise Specified (Continued)
100
60
80
ICE, COLLECTOR TO EMITTER CURRENT (A)
td(OFF)I, TURN-OFF DELAY TIME (ns)
180
140
160
120
VGE = 15V, TJ = 125oC
RG = 25, L = 1mH, VCE = 390V
42681012140
VGE = 12V, TJ = 125oC
VGE = 15V, TJ = 25oC
VGE = 12V, TJ = 25oC
ICE, COLLECTOR TO EMITTER CURRENT (A)
tfI, FALL TIME (ns)
20
40
30
60
80
50
70
RG = 25, L = 1mH, VCE = 390V
90
TJ = 125oC, VGE = 12V OR 15V
TJ = 25oC, VGE = 12V OR 15V
42 6 8 1012140
ICE, COLLECTOR TO EMITTER CURRENT (A)
0
40
60
8 9 11 12 15
VGE, GATE TO EMITTER VOLTAGE (V)
14
80
100
120
7
PULSE DURATION = 250µs
DUTY CYCLE < 0.5%, VCE = 10V
TJ = 125oC TJ = -55oC
TJ = 25oC
20
1310
VGE, GATE TO EMITTER VOLTAGE (V)
QG, GATE CHARGE (nC)
0
3
IG(REF) = 1mA, RL = 43, TJ = 25oC
VCE = 200V
VCE = 400V
6
9
12
15
5101520 3025 35 400
VCE = 600V
ICE = 3.5A
0
200
50 75 100
TC, CASE TEMPERATURE (oC)
400
12525 150
800
ETOTAL, TOTAL SWITCHING ENERGY LOSS (µJ)
RG = 25, L = 1mH, VCE = 390V, VGE = 15V
600 ICE = 14A
ICE = 7A
ETOTAL = EON2 + EOFF
0.1 100
RG, GATE RESISTANCE ()
1
10 1000
ETOTAL, TOTAL SWITCHING EN ERGY L OSS ( mJ)
10 TJ = 125oC, L = 1mH, VCE = 390V, VGE = 15V
ETOTAL = EON2 + EOFF
ICE = 3.5A
ICE = 7A
ICE = 14A
HGT1S7N60A4S9A, HGTG7N 60A4, HGTP7N60A4
©2004 Fairchild Semiconductor Corporation HGT1S7N60A4S9A, HGTG7N60A4, HGTP7N60A4 Rev. B2
FIGURE 17. CAPA CITANCE vs COLL ECT OR T O EMITTE R
VOLTAGE FIGURE 18. COLLECT OR T O EMITTER ON- STA TE V OLT AGE
vs GATE TO EMITT ER VOLTAGE
FIGURE 19. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTIO N TO CASE
Test Circuit and Waveforms
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 21. SWITCHING TEST WAVEFORMS
Typical Performance Curves Unless Otherwise Specified (Continued)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
C, CAPACITANCE (nF)
0 20406080100
0
0.2
0.6
0.8
1.4
0.4
FREQUENCY = 1MHz
CIES
COES
CRES
1.2
1.0
VGE, GATE TO EMITTER VOLTAGE (V)
9
1.8 10 12
2.0
2.4
2.2
11 13 14 15 16
2.6
2.8
VCE, COLLE CTOR TO EMITTER VOLTAGE (V)
ICE = 14A
ICE = 7A
ICE = 3.5A
DUTY CYCLE < 0.5%, TJ = 25oC
PULSE DURATION = 250µs,
t1, RECTANGULAR PULSE DURATION (s)
ZθJC, NORMALIZED THERMAL RESPONSE
10-2
10-1
100
10-5 10-3 10-2 10-1 100101
10-4
t1
t2
PD
DUTY FACTOR, D = t1 / t2
PEAK TJ = (PD X ZθJC X RθJC) + TC
SINGLE PULSE
0.1
0.2
0.5
0.05
0.01
0.02
RG = 25
L = 1mH
VDD = 390V
+
-
RHRP660
tfI
td(OFF)I trI
td(ON)I
10%
90%
10%
90%
VCE
ICE
VGE
EOFF
EON2
HGT1S7N60A4S9A, HGTG7N 60A4, HGTP7N60A4
©2004 Fairchild Semiconductor Corporation HGT1S7N60A4S9A, HGTG7N60A4, HGTP7N60A4 Rev. B2
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
bui lt in the handlers body capacitance is not discharged
through the device. With proper handling and application
procedures, however, IGBTs are cu rrently being extensively
used in production b y nume rous equipment m anuf acturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
1. Prior to a ssemb ly into a c ircui t, all l eads s hould be k ept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as ECCOSORBD LD26 or equivalent.
2. When devi ces are remo v ed by ha nd from their carriers ,
the hand being u sed shoul d be grou nded b y any suitab le
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices sho uld n e v er b e ins erted into or r emo v e d from
circuits with power on.
5. Gate Voltage Rating - Ne ver e xc eed the gate- vol tage
rating of VGEM. Exceeding the rated V GE can result in
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gates of thes e de vices are
essentially capacitors. Circuits that leave the gate
open-circuited or floating should be avoided. These
conditions can result in turn-on of the device due to
voltage buildup on the input capacitor due to leakage
currents or pickup.
7. Gate Protection - The se de vices do no t hav e an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an e xternal Zener is recommended.
Operating Frequency Information
Operating frequency infor mation for a typical device
(Figure 3) is presented as a guide for esti mating device
performance for a specific application. Other typical
frequency vs collector current (ICE) plots are possible using
the inf o rmatio n shown fo r a typical unit in Fi gures 5, 6, 7 , 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows fMAX1 or fMAX2; whichever is smaller at each
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I).
Deadti me (the de nominato r) has bee n arbit rarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
are possible. td(OFF)I and td(ON)I are defined in Figure 21.
Device turn-off delay can establish an additional frequency
limiting condition for an application other than TJM.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The
allow able dissipation (PD) is defined by PD = (TJM - TC)/RθJC.
The sum of device switching and con duc ti on lo sses must
not exceed PD. A 50% duty factor was used ( Figure 3) and
the condu cti on lo sse s (PC) are approx imated by
PC=(V
CE x ICE)/2.
EON2 and EOFF are defined in the switching waveforms
shown in Figure 21. EON2 is the integral of the
instantaneous power loss (ICE x VCE) during turn-on and
EOFF is the integr al of the instan tan eou s po wer loss
(ICE xV
CE) during turn-off . All tai l los se s are incl ude d in the
calculation for E OFF; i.e., the collector current eq uals zero
(ICE = 0).
HGT1S7N60A4S9A, HGTG7N 60A4, HGTP7N60A4
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS P ATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT ST A TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
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