LP5990TM-1.2/NOPB - NATIONAL SEMICONDUCTOR

LP5990

LP5990 Micropower 200mA CMOS Low Dropout Voltage Regulator

Literature Number: SNVS438B

December 18, 2007

LP5990

Micropower 200mA CMOS Low Dropout Voltage Regulator

General Description

The LP5990 regulator is designed to meet the requirements

of portable, battery-powered systems providing an accurate

output voltage, low noise and low quiescent current.

The LP5990 will provide a 1.8V output from a low input voltage

of 2.2V and can provide 200mA to an external load.

When switched into shutdown mode via a logic signal at the

enable pin, the power consumption is reduced to virtually

zero.

Fast shut-down is achieved by the push pull architecture.

The LP5990 is designed to be stable with space saving 0402

ceramic capacitors as small as 1µF, this gives an

overall solution size of < 2.5mm 2.

Performance is specified for a -40°C to 125°C junction tem-

perature range.

The device is available in micro SMD Package (0.4mm pitch)

and is available with 1.2V,1.3V,1.8V,2.8V,3.0V,3.3V and 3.6V

outputs.Lower voltage options down to 0.8V are available on

request. For all other output voltage options please contact

your local NSC sales office.

Features

■Operation from 2.2V to 5.5V input

■±1% accuracy over temp range

■Output voltage from 0.8V to 3.6V in 50mV increments

■30 μA Quiescent current (enabled)

■10nA Quiescent current (disabled)

■160mV dropout at 200mA load

■60 μVRMSOutput voltage noise

■60 μs start-up time

■500μs shut-down time

■PSRR 55 dB at 10 kHz

■Stable with 0402 1.0µF ceramic capacitors

■Logic controlled enable

■Thermal–overload and short–circuit protection

Package

4-Bump micro SMD,0.4mm

pitch

(lead free)

866 µm x 917 µm

Applications

■Cellular phones

■Hand–held information appliances

Typical Application Circuit

20184801

LP5990 Micropower 200mA CMOS Low Dropout Voltage Regulator

Connection Diagrams

4-Bump Thin micro SMD Package, 0.4mm pitch

NS Package Number TMD04

20184802

The actual physical placement of the package marking will vary from part to part.

Pin Descriptions

Pin No. Symbol Name and Function

micro SMD

A2 VEN Enable input; disables the regulator when ≤ 0.35V. Enables the

regulator when ≥ 1.0V.

A1 GND Common ground.

B1 VOUT Output voltage. A 1.0 μF Low ESR capacitor should be connected to

this Pin. Connect this output to the load circuit.

B2 VIN Input voltage supply. A 1.0 µF capacitor should be connected at this

input.

Ordering Information

micro SMD Package (Lead Free)

Output Voltage

(V) Supplied As

250 Units Tape and Reel 3k Units Tape and Reel

1.2 LP5990TM-1.2/NOPB LP5990TMX-1.2/NOPB

1.3 LP5990TM-1.3/NOPB LP5990TMX-1.3/NOPB

1.8 LP5990TM-1.8/NOPB LP5990TMX-1.8/NOPB

2.8 LP5990TM-2.8/NOPB LP5990TMX-2.8/NOPB

3.0 LP5990TM-3.0/NOPB LP5990TMX-3.0/NOPB

3.3 LP5990TM-3.3/NOPB LP5990TMX-3.3/NOPB

3.6 LP5990TM-3.6/NOPB LP5990TMX-3.6/NOPB

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LP5990

Absolute Maximum Ratings (Notes 1, 2)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

VIN Pin: Input Voltage -0.3 to 6.0V

VOUT Pin: Output Voltage -0.3 to (VIN + 0.3V) to 6.0V

(max)

VEN Pin: Enable Input Voltage -0.3 to 6.0V (max)

Continuous Power Dissipation

(Note 3) Internally Limited

Junction Temperature (TJMAX)150°C

Storage Temperature Range -65 to 150°C

Maximum Lead Temperature

(Soldering, 10 sec.) 260°C

ESD Rating (Note 4)

Human Body Model 2 kV

Machine Model 200V

Operating Ratings (Note 1), (Note 2)

VIN: Input Voltage Range 2.2V to 5.5V

VEN: Enable Voltage Range 0 to 5.5V (max)

Recommended Load Current

(Note 5)

0 to 200 mA

Junction Temperature Range (TJ)-40°C to +125°C

Ambient Temperature Range (TA)

(Note 5)

-40°C to +85°C

Thermal Properties

Junction to Ambient Thermal Resistance θJA (Note 6)

JEDEC Board (microSMD)

(Note 14) 100.6°C/W

4L Cellphone Board (microSMD) 174.8°C/W

Electrical Characteristics

Limits in standard typeface are for TA = 25°C. Limits in boldface type apply over the full operating junction temperature range (-40°

C ≤ TJ ≤ +125°C). Unless otherwise noted, specifications apply to the LP5990 Typical Application Circuit (pg. 1) with: VIN = VOUT

(NOM) + 1.0V, or 2.2V, whichever is higher. VEN = 1.0V, CIN = COUT = 1.0 μF, IOUT = 1.0 mA. (Note 2), (Note 7)

Symbol Parameter Conditions Min Typ Max Units

VIN Input Voltage 2.2 5.5 V

ΔVOUT Output Voltage Tolerance VIN = (VOUT(NOM) + 1.0V) to 5.5V −1 1%

Line Regulation VIN = (VOUT(NOM) + 1.0V) to 5.5V, IOUT = 1

mA 1 mV

Load Regulation IOUT = 1 mA to 200 mA 5 15 mV

ILOAD Load Current (Note 8) 0 mA

Maximum Output Current 200

IQQuiescent Current (Note 10) VEN = 1.0V, IOUT = 0 mA 30 75

µA

VEN = 1.0V, IOUT = 200 mA 35

VEN = <0.35V (Disabled) 0.01

VDO Dropout Voltage(Note 9) IOUT = 200 mA 160 250 mV

ISC Short Circuit Current Limit (Note 11) 600 mA

PSRR Power Supply Rejection Ratio

(Note 13)

f = 10 kHz, IOUT = 200 mA 55 dB

enOutput Noise Voltage

(Note 13)

BW = 10 Hz to 100 kHz,

VIN = 4.2V, IOUT = 1 mA

V OUT = 1.8V 60 μVRMS

V OUT = 2.8V 85

TSHUTDOWN Thermal Shutdown Temperature 160 °C

Hysteresis 20

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LP5990

Electrical Characteristics (continued).

Limits in standard typeface are for TA = 25°C. Limits in boldface type apply over the full operating junction temperature range (-40°

C ≤ TJ ≤ +125°C). Unless otherwise noted, specifications apply to the LP5990 Typical Application Circuit (pg. 1) with: VIN = VOUT

(NOM) + 1.0V, or 2.2V, whichever is higher. VEN = 1.0V, CIN = COUT = 1.0 μF, IOUT = 1.0 mA. (Note 2), (Note 7)

Symbol Parameter Conditions Min Typ Max Units

Enable Input Thresholds

VIL Low Input Threshold (VEN) VIN = 2.2V to 5.5V 0.35 V

VIH High Input Threshold (VEN) VIN = 2.2V to 5.5V 1.0 V

IEN Input Current at VEN Pin

(Note 12)

VEN = 5.5V and VIN = 5.5V 25μA

VEN = 0.0V and VIN = 5.5V 0.001

Transient Characteristics

ΔVOUT Line Transient

(Note 13)

Trise = Tfall = 30μs. ΔVIN = 600 mV 4mV

Load Transient

(Note 13)

IOUT = 1 mA to 200 mA in 1 μs–50 mV

IOUT = 200 mA to 1 mA in 1 μs 50

TON Turn on Time To 98% of VOUT(NOM) 60 μs

TOFF Turn off Time from Enable 100mV of V OUT(NOM)I OUT= 0mA 500 μs

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation

of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,

see the Electrical Characteristics tables.

Note 2: All voltages are with respect to the potential at the GND pin.

Note 3: Internal thermal shutdown circuitry protects the device from permanent damage.

Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged

directly into each pin. MIL-STD-883 3015.7

Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be

derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power

dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the

following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). See applications section.

Note 6: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,

special care must be paid to thermal dissipation issues in board design.

Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.

Note 8: The device maintains a stable, regulated output voltage without a load current.

Note 9: Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its nominal value. This

parameter only applies to output voltages above 2.8V.

Note 10: Quiescent current is defined here as the difference in current between the input voltage source and the load at VOUT.

Note 11: Short Circuit Current is measured with VOUT pulled to 0V.

Note 12: There is a 3 MΩ resistor between VEN and ground on the device.

Note 13: This specification is guaranteed by design.

Note 14: Detailed description of the board can be found in JESD51-7

Output & Input Capacitor, Recommended Specifications

Symbol Parameter Conditions Min Nom Max Units

CIN Input Capacitance Capacitance for stability 0.3 1.0 µF

COUT Output Capacitance 0.3 1.0 10

ESR Output/Input Capacitance 5 500 mΩ

Note: The minimum capacitance should be greater than 0.3 µF over the full range of operating conditions. The capacitor tolerance should be 30% or better over

the full temperature range. The full range of operating conditions for the capacitor in the application should be considered during device selection to ensure this

minimum capacitance specification is met. X7R capacitors are recommended however capacitor types X5R, Y5V and Z5U may be used with consideration of the

application and conditions.

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LP5990

Typical Performance Characteristics. Unless otherwise specified,CIN = COUT = 1.0µF, VIN = VOUT

(NOM) + 1.0V, VEN = 1.0V, IOUT = 1mA , T A = 25°C.

Output Voltage Change vs Temperature

20184899

Ground Current vs Load Current

20184843

Ground Current vs V IN.I LOAD= 1mA

20184854

Ground Current vs VIN. I LOAD = 200mA

20184851

Dropout Voltage

20184889

Load Transient Response VOUT = 2.8V

20184887

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LP5990

Typical Performance Characteristics (continued). Unless otherwise specified,CIN = COUT =

1.0µF, VIN = VOUT(NOM) + 1.0V, VEN = 1.0V, IOUT = 1mA , T A = 25°C.

Load Transient Response. VOUT = 2.8V

20184886

Short Circuit Current

20184888

Line Transient Response

20184895

Line Transient Response

20184885

Start-up Time

20184893

Shutdown Characteristics

20184890

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LP5990

Typical Performance Characteristics (continued). Unless otherwise specified,CIN = COUT =

1.0µF, VIN = VOUT(NOM) + 1.0V, VEN = 1.0V, IOUT = 1mA , T A = 25°C.

Power Supply Rejection ratio

20184844

Output Noise Density

20184845

7 www.national.com

LP5990

Application Hints

POWER DISSIPATION AND DEVICE OPERATION

The permissible power dissipation for any package is a mea-

sure of the capability of the device to pass heat from the power

source, the junctions of the IC, to the ultimate heat sink, the

ambient environment. Thus the power dissipation is depen-

dent on the ambient temperature and the thermal resistance

across the various interfaces between the die and ambient

air. As stated in (Note 5) of the electrical characteristics, the

allowable power dissipation for the device in a given package

can be calculated using the equation:

The actual power dissipation across the device can be rep-

resented by the following equation:

PD = (VIN – VOUT) x IOUT

This establishes the relationship between the power dissipa-

tion allowed due to thermal consideration, the voltage drop

across the device, and the continuous current capability of the

device. These two equations should be used to determine the

optimum operating conditions for the device in the application.

EXTERNAL CAPACITORS

Like any low-dropout regulator, the LP5990 requires external

capacitors for regulator stability. The LP5990 is specifically

designed for portable applications requiring minimum board

space and smallest components. These capacitors must be

correctly selected for good performance.

INPUT CAPACITOR

An input capacitor is required for stability. The input capacitor

should be at least equal to or greater than the output capac-

itor. It is recommended that a 1.0 µF capacitor be connected

between the LP5990 input pin and ground.

This capacitor must be located a distance of not more than 1

cm from the input pin and returned to a clean analogue

ground. Any good quality ceramic, tantalum, or film capacitor

may be used at the input.

Important: To ensure stable operation it is essential that

good PCB practices are employed to minimize ground

impedance and keep input inductance low. If these conditions

cannot be met, or if long leads are to be used to connect the

battery or other power source to the LP5990, then it is rec-

ommended to increase the input capacitor to at least 2.2µF.

Also, tantalum capacitors can suffer catastrophic failures due

to surge current when connected to a low-impedance source

of power (like a battery or a very large capacitor). If a tantalum

capacitor is used at the input, it must be guaranteed by the

manufacturer to have a surge current rating sufficient for the

application. There are no requirements for the ESR (Equiva-

lent Series Resistance) on the input capacitor, but tolerance

and temperature coefficient must be considered when select-

ing the capacitor to ensure the capacitance will remain 0.3

μF over the entire operating temperature range.

OUTPUT CAPACITOR

The LP5990 is designed specifically to work with very small

ceramic output capacitors. A ceramic capacitor (dielectric

types X5R or X7R) 1.0 μF, and with ESR between 5 mΩ to

500 mΩ, is suitable in the LP5990 application circuit.

Other ceramic capacitors such as Y5V and Z5U are less suit-

able owing to their inferior temperature characteristics. (See

section in Capacitor Characteristics).

For this device the output capacitor should be connected be-

tween the VOUT pin and a good ground connection and should

be mounted within 1 cm of the device.

It may also be possible to use tantalum or film capacitors at

the device output, VOUT, but these are not as attractive for

reasons of size and cost (see the section Capacitor Charac-

teristics).

The output capacitor must meet the requirement for the min-

imum value of capacitance (0.3μF) and have an ESR value

that is within the range 5 mΩ to 500 mΩ for stability.

CAPACITOR CHARACTERISTICS

The LP5990 is designed to work with ceramic capacitors on

the input and output to take advantage of the benefits they

offer. For capacitance values in the range of 1.0 μF to 4.7

μF, ceramic capacitors are the smallest, least expensive and

have the lowest ESR values, thus making them best for elim-

inating high frequency noise. The ESR of a typical 1.0 μF

ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which

easily meets the ESR requirement for stability for the LP5990

For both input and output capacitors careful interpretation of

the capacitor specification is required to ensure correct device

operation. The capacitor value can change greatly depending

on the conditions of operation and capacitor type.

In particular the output capacitor selection should take ac-

count of all the capacitor parameters to ensure that the spec-

ification is met within the application.Capacitance value can

vary with DC bias conditions as well as temperature and fre-

quency of operation. Capacitor values will also show some

decrease over time due to aging. The capacitor parameters

are also dependant on particular case size with smaller sizes

giving poorer performance figures in general. As an example

Figure 1 shows a typical graph showing a comparison of ca-

pacitor case sizes in a Capacitance versus DC Bias plot. As

shown in the graph, as a result of the DC Bias condition, the

capacitance value may drop below the minimum capacitance

value given in the recommended capacitor table (0.3µF in this

case). Note that the graph shows the capacitance out of spec

for the 0402 case size capacitor at higher bias voltages. It is

therefore recommend that the capacitor manufacturer's spec-

ifications for the nominal value capacitor are consulted for all

conditions as some capacitors may not be suited in the ap-

plication.

The temperature performance of ceramic capacitors varies by

type and manufacturer. Most large value ceramic capacitors

(≥2.2 µF) are manufactured with Z5U or Y5V temperature

characteristics, which results in the capacitance dropping by

more than 50% as the temperature goes from 25°C to 85°C.

A better choice for temperature coefficient in a ceramic ca-

pacitor is X7R. This type of capacitor is the most stable and

holds the capacitance within ±15% over the temperature

range. Tantalum capacitors are less desirable than ceramic

for use as output capacitors because they are more expen-

sive when comparing equivalent capacitance and voltage

ratings in the 0.47 μF to 4.7 μF range.

Another important consideration is that tantalum capacitors

have higher ESR values than equivalent size ceramics. This

means that while it may be possible to find a tantalum capac-

itor with an ESR value within the stable range, it would have

to be larger in capacitance (which means bigger and more

costly) than a ceramic capacitor with the same ESR value. It

should also be noted that the ESR of a typical tantalum will

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LP5990

increase about 2:1 as the temperature goes from 25°C down

to −40°C, so some guard band must be allowed.

20184840

FIGURE 1. Graph Showing a Typical Variation in

Capacitance vs DC Bias

NO-LOAD STABILITY

The LP5990 will remain stable and in regulation with no ex-

ternal load.

ENABLE CONTROL

The LP5990 may be switched ON or OFF by a logic input at

the ENABLE pin, VEN . A high voltage at this pin will turn the

device on. When the enable pin is low, the regulator output is

off and the device typically consumes 3 nA. If the application

does not require the shutdown feature, the VEN pin should be

tied to VIN to keep the regulator output permanently on.

The signal source used to drive the VEN input must be able to

swing above and below the specified turn-on/off voltage

thresholds listed in the Electrical Characteristics section un-

der VIL and VIH.

micro SMD MOUNTING

The micro SMD package requires specific mounting tech-

niques, which are detailed in National Semiconductor Appli-

cation Note AN-1112.

For best results during assembly, alignment ordinals on the

PC board may be used to facilitate placement of the micro

SMD device.

micro SMD LIGHT SENSITIVITY

Exposing the micro SMD device to direct light may cause in-

correct operation of the device. Light sources such as halogen

lamps can affect electrical performance if they are situated in

proximity to the device.

Light with wavelengths in the red and infra-red part of the

spectrum have the most detrimental effect thus the fluores-

cent lighting used inside most buildings has very little effect

on performance.

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LP5990

Physical Dimensions inches (millimeters) unless otherwise noted

4-Bump Thin micro SMD

NS Package Number TMD04 CEA

The dimensions for X1, X2 and X3 are given as:

X1 = 0.866 mm ± 0.030 mm

X2 = 0.917 mm ± 0.030 mm

X3 = 0.600 mm ± 0.075 mm

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LP5990

Notes

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LP5990

Notes

LP5990 Micropower 200mA CMOS Low Dropout Voltage Regulator

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