1
2
5
4
3
VIN SW
FB
EN
GND
L1
4.7 or 10 µH VOUT
CIN
4.7 µF LM3670
VIN
2.5 V to 5.5 V
R1
R2
COUT
10 µF
1
2
5
43
VIN SW
FB
EN
GND
L1
10 µF VOUT
CIN
4.7 µF LM3670
VIN
2.5 V to 5.5 V
COUT
10 µF
Product
Folder
Sample &
Buy
Technical
Documents
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Software
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM3670
SNVS250F –NOVEMBER 2004–REVISED FEBRUARY 2016
LM3670 Miniature Step-Down DC-DC Converter for Ultralow Voltage Circuits
1
1 Features
1• Input Voltage Range: 2.5 V to 5.5 V
• Adjustable Output Voltages (VOUT): 0.7 V to 2.5 V
• Fixed Output Voltages: 1.2 V, 1.5 V, 1.6 V, 1.8 V,
1.875 V, 3.3V
• 15-µA Typical Quiescent Current
• 350-mA Maximum Load Capability
• 1-MHz PWM Fixed Switching Frequency (Typical)
• Automatic PFM and PWM Mode Switching
• Low Dropout Operation – 100% Duty Cycle Mode
• Internal Synchronous Rectification for High
Efficiency
• Internal Soft Start
• 0.1-µA Typical Shutdown Current
• Current Overload Protection
• Operates from a Single Li-Ion Cell or Three-Cell
NiMH/NiCd Batteries
• Only Three Tiny Surface-Mount External
Components Required (One Inductor, Two
Ceramic Capacitors)
2 Applications
• Mobile Phones and Handheld Devices
• PDAs
• Palm-Top PCs
• Portable Instruments
• Battery-Powered Devices
3 Description
The LM3670 step-down DC-DC converter is
optimized for powering ultralow voltage circuits from a
single Li-Ion cell or three-cell NiMH/NiCd batteries. It
provides up to 350-mA load current, over an input
voltage range from 2.5 V to 5.5 V. There are several
different fixed voltage output options available as well
as an adjustable output voltage version.
The device offers superior features and performance
for mobile phones and similar portable applications
with complex power management systems. Automatic
intelligent switching between pulse width modulation
(PWM) low-noise and pulse frequency modulation
(PFM) low-current mode offers improved system
control. During full-power operation, a fixed-frequency
1-MHz (typical) PWM mode drives loads from
approximately 70 mA to 350 mA maximum, with up to
95% efficiency. Hysteretic PFM mode extends the
battery life through reduction of the quiescent current
to 15 µA (typical) during light current loads and
system standby. Internal synchronous rectification
provides high efficiency (90% to 95% typical at loads
between 1 mA and 100 mA). In shutdown mode
(enable (EN) pin pulled low) the device turns off and
reduces battery consumption to 0.1 µA (typical).
The LM3670 is available in a 5-pin SOT-23 package.
A high switching frequency (1 MHz typical) allows use
of tiny surface-mount components. Only three
external surface-mount components, an inductor and
two ceramic capacitors, are required.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
LM3670 SOT-23 (5) 2.90 mm × 1.60 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
space
space
Typical Application: Fixed Output Typical Application: Adjustable Output Voltage
2
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description............................................................. 1
4 Revision History..................................................... 2
5 Connection Diagram.............................................. 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 7
7 Detailed Description............................................ 10
7.1 Overview................................................................. 10
7.2 Functional Block Diagram....................................... 10
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 12
8 Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Application ................................................. 14
9 Power Supply Recommendations...................... 18
10 Layout................................................................... 19
10.1 Layout Guidelines ................................................. 19
10.2 Layout Example .................................................... 20
11 Device and Documentation Support................. 21
11.1 Device Support .................................................... 21
11.2 Community Resources.......................................... 21
11.3 Trademarks........................................................... 21
11.4 Electrostatic Discharge Caution............................ 21
11.5 Glossary................................................................ 21
12 Mechanical, Packaging, and Orderable
Information........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (February 2013) to Revision F Page
• Changed "(0.7V min) to "0.7 V to 2.5 V" ................................................................................................................................ 1
• Added Device Information and Pin Configuration and Functions sections, ESD Ratings and Thermal Information
tables, Feature Description,Device Functional Modes,Application and Implementation,Power Supply
Recommendations,Layout,Device and Documentation Support, and Mechanical, Packaging, and Orderable
Information sections................................................................................................................................................................ 1
• Deleted phone and fax numbers of manufacturers from suggested inductors table ........................................................... 15
• Deleted phone and fax numbers of manufacturers from suggested capacitors table ......................................................... 16
• Deleted rest of text from paragraph beginning "For any output voltages...."........................................................................ 17
• Deleted row beginning with "1.24... "from Table 3 .............................................................................................................. 18
Changes from Revision D (February 2013) to Revision E Page
• Changed layout of National Data Sheet to TI format ........................................................................................................... 19
VIN
1GND
2
EN
3
FB
4
SW
5
3
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5 Connection Diagram
DBV Package
5-Pin SOT-23
Top View
Pin Functions
PIN TYPE DESCRIPTION
NUMBE
RNAME
1 VIN Power Power supply input. Connect to the input filter capacitor
(Typical Application: Fixed Output).
2 GND Ground Ground pin.
3 EN Digital Enable input.
4 FB Analog Feedback analog input. Connect to the output filter capacitor
(Typical Application: Fixed Output).
5 SW Analog Switching node connection to the internal PFET switch and NFET synchronous rectifier.
Connect to an inductor with a saturation current rating that exceeds the 750-mA maximum
switch peak current limit specification.
4
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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, contact the TI Sales Office/Distributors for availability and specifications.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
VIN pin: voltage to GND –0.2 6 V
EN pin: voltage to GND –0.2 6 V
FB, SW pins (GND −0.2) VIN + 0.2 V
Junction temperature, TJ-MAX –45 125 °C
Maximum lead temperature (soldering, 10 seconds) 260 °C
Storage temperature, Tstg –45 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-
C101(2) ±200
(1) All voltages are with respect to the potential at the GND pin.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)
MIN NOM MAX UNIT
Input voltage 2.5 5.5 A
Recommended load current 0 350 mA
Junction temperature, TJ–40 125 °C
Ambient temperature, TA–40 85 °C
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.4 Thermal Information
THERMAL METRIC(1) LM3670
UNITDBV (SOT-23)
5 PINS
RθJA Junction-to-ambient thermal resistance 163.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 114.3 °C/W
RθJB Junction-to-board thermal resistance 26.8 °C/W
ψJT Junction-to-top characterization parameter 12.4 °C/W
ψJB Junction-to-board characterization parameter 26.3 °C/W
5
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(1) The input voltage range recommended for the specified output voltages are given below: VIN = 2.5 V to 5.5 V for 0. 7 V ≤VOUT < 1.875
V, VIN =(VOUT + VDROPOUT) to 5.5 for 1.875 ≤VOUT ≤3.3 V, where VDROPOUT = ILOAD × (RDSON (P) + RINDUCTOR).
(2) Output voltage specification for the adjustable version includes tolerance of the external resistor divider.
6.5 Electrical Characteristics
Unless otherwise specified, limits for typical values are TJ= 25°C, and minimum and maximum limits apply over the full
operating junction temperature range (−40°C ≤TJ≤+125°C); VIN = 3.6 V, VOUT = 1.8 V, IOUT = 150 mA, EN = VIN.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage See(1) 2.5 5.5 V
VOUT
Fixed output voltage: 1.2 V
2.5 V ≤VIN ≤5.5 V
IOUT = 10 mA –2% 4%
2.5 V ≤VIN ≤5.5 V
0 mA ≤IOUT ≤150 mA –4.5% 4%
Fixed output voltage: 1.5 V
2.5 V ≤VIN ≤5.5 V
IOUT = 10 mA –2.5% 4%
2.5 V ≤VIN ≤5.5 V
0 mA ≤IOUT ≤350 mA –5% 4%
Fixed output voltage: 1.6 V, 1.875 V
2.5 V ≤VIN ≤5.5 V
IOUT = 10 mA –2.5% 4%
2.5 V ≤VIN ≤5.5V
0 mA ≤IOUT ≤350 mA –5.5% 4%
Fixed output voltage: 1.8 V
2.5 V ≤VIN ≤5.5 V
IOUT = 10 mA –1.5% 3%
2.5 V ≤VIN ≤5.5 V
0 mA ≤IOUT ≤350 mA –4.5% 3%
Fixed output voltage: 3.3 V
3.6 V ≤VIN ≤5.5 V
IOUT = 10 mA –2% 4%
3.6V ≤VIN ≤5.5V
0 mA ≤IOUT ≤350 mA –6% 4%
Adjustable output voltage(2)
2.5 V ≤VIN ≤5.5 V
IOUT = 10 mA –2.5% 4.5%
2.5 V ≤VIN ≤5.5 V
0 mA ≤IOUT ≤150 mA –4% 4.5%
Line_reg Line regulation 2.5 V ≤VIN ≤5.5 V
IOUT = 10 mA 0.26 %/V
Load_reg Load regulation 150 mA ≤IOUT ≤350 mA 0.0014 %/mA
VREF Internal reference voltage 0.5 V
IQ_SHDN Shutdown supply current TA= 85ºC 0.1 1 µA
IQDC bias current into VIN No load, device is not switching
(VOUT forced higher than
programmed output voltage) 15 30 µA
VUVLO Minimum VIN below which VOUT is
disabled TA=−40°C ≤TJ≤125°C 2.4 V
RDSON (P) Pin-pin resistance for PFET VIN = VGS= 3.6V 360 690 mΩ
RDSON (N) Pin-pin resistance for NFET VIN = VGS= 3.6 V 250 660 mΩ
ILKG (P) P channel leakage current VDS = 5.5 V, TA= 25°C 0.1 1 µA
ILKG (N) N channel leakage current VDS = 5.5 V, TA= 25°C 0.1 1.5 µA
ILIM Switch peak current limit 400 620 750 mA
6
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Electrical Characteristics (continued)
Unless otherwise specified, limits for typical values are TJ= 25°C, and minimum and maximum limits apply over the full
operating junction temperature range (−40°C ≤TJ≤+125°C); VIN = 3.6 V, VOUT = 1.8 V, IOUT = 150 mA, EN = VIN.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ηEfficiency
VIN = 3.6 V, VOUT = 1.8 V
ILOAD = 1 mA 91%
VIN = 3.6 V, VOUT = 1.8 V
ILOAD = 10 mA 94%
VIN = 3.6 V, VOUT = 1.8 V
ILOAD = 100 mA 94%
VIN = 3.6 V, VOUT = 1.8 V
ILOAD = 200 mA 94%
VIN = 3.6 V, VOUT = 1.8 V
ILOAD = 300 mA 92%
VIN = 3.6 V, VOUT = 1.8 V
ILOAD = 350 mA 90%
VIH Logic high input 1.3 V
VIL Logic low input 0.4 V
IEN Enable (EN) input current 0.01 1 µA
ƒOSC Internal oscillator frequency PWM mode 550 1000 1300 kHz
ILOAD (mA)
40
45
50
55
60
65
70
75
80
85
90
95
100
EFFICIENCY (%)
VIN = 5.0V
VIN = 2.7V
VIN = 3.7V
103
102
101
10-2 10-1 100
2.5 3 3.5 4 4.5 5 5.5 6
VIN (V)
75
80
85
90
95
100
70
EFFICIENCY (%)
ILOAD = 1 mA
ILOAD = 300 mA
ILOAD = 150 mA
0 50 100 150 200 250 300 350
ILOAD (mA)
1.7
1.72
1.74
1.76
1.78
1.8
1.82
1.84
1.86
1.88
1.9
VOUT (V)
PFM Mode
PWM Mode
-40
TEMPERATURE (°C)
1.77
1.78
1.79
1.80
1.81
1.82
1.83
VOUT (V)
806040200-20
IOUT = 10 mA
PFM mode
IOUT = 150 mA
PWM mode
VIN = 3.6V
VIN = 2.5V
VIN = 3.6V
VIN = 5.5V
2.5 3 3.5 4 4.5 5 5.5
VIN (V)
10
15
20
NO LOAD IQUIESCENT (PA)
TA = 85°C
TA = 25°C
TA = -40°C
-40 -20 0 20 40 60 80
TEMPERATURE (°C)
0
0.05
0.1
ISHUTDOWN (PA)
7
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6.6 Typical Characteristics
Unless otherwise stated, VIN = 3.6 V and VOUT= 1.8 V.
Figure 1. IQ(Non-Switching) vs VIN Figure 2. IQvs Temperature
Figure 3. VOUT vs VIN Figure 4. VOUT vs IOUT
Figure 5. Efficiency vs IOUT Figure 6. Efficiency vs VIN
VOUT (50 mV/Div)
ILOAD = 280 mA
TIME (100 Ps/DIV)
CURRENT LOAD STEP (3 mA - 280 mA)
ILOAD = 3 mA
VOUT (50 mV/Div)
ILOAD = 70 mA
TIME (100 Ps/DIV)
CURRENT LOAD STEP (0 mA - 70 mA)
ILOAD = 0 mA
Inductor Current = 200 mA/Div
VIN = 3.6V
VIN = 4.6V
TIME (100 ms/DIV)
LINE TRANSIENT
VOUT = 1.8V
(20 mV/Div)
VOUT = 1.8V
IOUT = 100 mA
VIN rise time = 10 ms
VIN = 3.6V
TIME (200 ms/DIV)
LINE TRANSIENT
VIN = 2.6V
(20 mV/Div)
2.5 3 3.5 4 4.5 5 5.5
VIN (V)
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
RDSon - N, P CHANNEL (:)
N FET P FET
TA = 85°C
TA = 25°C
TA = -40°C
-40 -20-10 0 10 20 30 40 50 60 70 80
TEMPERATURE (°C)
840
850
860
870
880
890
900
910
920
930
940
950
960
970
980
990
1000
1010
FREQUENCY (kHz)
-30
ILOAD = 150 mA
VIN = 2.5V
VIN = 5.5V VIN = 3.6V
8
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Typical Characteristics (continued)
Unless otherwise stated, VIN = 3.6 V and VOUT= 1.8 V.
Figure 7. Frequency vs Temperature Figure 8. RDSON vs. VIN P and N Channels
VIN = 2.6 V to 3.6 V ILOAD = 100 mA
Figure 9. Line Transient
VIN = 3.6 V to 4.6 V ILOAD = 100 mA
Figure 10. Line Transient
ILOAD = 3 mA to 280 mA
Figure 11. Load Transient
ILOAD = 0 mA to 70 mA
Figure 12. Load Transient
TIME (100 Ps/DIV)
CURRENT LOAD STEP (3 mA - 280 mA)
VIN (2V/Div)
VOUT (1V/Div)
(200 mA/
Div)
Inductor
Current
TIME (2 Ps/DIV)
PFM MODE
VSWITCH
(5V/Div)
VOUT
(20 mV/Div)
Inductor Current
(100 mA/Div)
TIME (1 Ps/DIV)
PWM MODE
VSWITCH
(5V/Div)
VOUT
(20 mV/Div)
Inductor Current
(200 mA/Div)
ILOAD = 150 mA
9
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Typical Characteristics (continued)
Unless otherwise stated, VIN = 3.6 V and VOUT= 1.8 V.
Figure 13. PFM Mode VSW, VOUT, IINDUCTOR vs Time Figure 14. PWM Mode VSW, VOUT, IINDUCTOR vs Time
ILOAD = 350 mA
Figure 15. Soft Start VIN, VOUT, IINDUCTOR vs Time
+
-
+
-
1 MHz
Oscillator
Soft
Start
Ramp
Generator
+
-
+
-
Thermal
Shutdown
Undervoltage
Lockout
VREF +
-
0.5V
Error
Amp Control Logic Driver
Current Limit
Comparator
Ref1
PFM Current
Comparator
Ref2
SW
Zero Crossing
Comparator
FB
EN VIN
PWM Comparator
pfm_low
pfm_hi
GND
Bandgap
+
-
Vcomp
1.0V
Frequency
Compensation
Adj Version
Fixed Version
10
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7 Detailed Description
7.1 Overview
The LM3670, a high-efficiency step-down DC-DC switching buck converter, delivers a constant voltage from
either a single Li-Ion or three-cell NiMH/NiCd battery to portable devices such as cell phones and PDAs. Using a
voltage mode architecture with synchronous rectification, the LM3670 can deliver up to 350 mA depending on the
input voltage and output voltage (voltage head room), and the inductor chosen (maximum current capability).
There are three modes of operation depending on the current required: pulse width modulation (PWM), pulse
frequency modulation (PFM), and shutdown. PWM mode handles current loads of approximately 70 mA or
higher. Lighter output current loads cause the device to automatically switch into PFM for reduced current
consumption (IQ= 15 µA typical) and a longer battery life. Shutdown mode turns off the device, offering the
lowest current consumption (ISHUTDOWN = 0.1 µA typical).
The LM3670 can operate up to a 100% duty cycle (PMOS switch always on) for low dropout control of the output
voltage. In this way the output voltage is controlled down to the lowest possible input voltage.
Additional features include soft-start, undervoltage lockout, current overload protection, and thermal overload
protection. As shown in Figure 17, only three external power components are required for implementation.
7.2 Functional Block Diagram
-VOUT
L
VIN-VOUT
L
11
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7.3 Feature Description
7.3.1 Circuit Operation
The LM3670 operates as follows. During the first portion of each switching cycle, the control block in the LM3670
turns on the internal PFET switch. This allows current to flow from the input through the inductor to the output
filter capacitor and load. The inductor limits the current to a ramp with a slope of:
(1)
by storing energy in a magnetic field. During the second portion of each cycle, the controller turns the PFET
switch off, blocking current flow from the input, and then turns the NFET synchronous rectifier on. The inductor
draws current from ground through the NFET to the output filter capacitor and load, which ramps the inductor
current down with a slope of:
(2)
The output filter stores charge when the inductor current is high, and releases it when low, smoothing the voltage
across the load.
7.3.2 Soft Start
The LM3670 has a soft-start circuit that limits in-rush current during start-up. Typical start-up times with a 10-µF
output capacitor and 350-mA load is 400 µs:
Table 1. Typical Start-Up Times for Soft Start
INRUSH CURRENT (mA) DURATION (µs)
0 32
70 224
140 256
280 256
620 until soft start ends
7.3.3 LDO - Low Dropout Operation
The LM3670 can operate at 100% duty cycle (no switching, PMOS switch is completely on) for low dropout
support of the output voltage. In this way the output voltage is controlled down to the lowest possible input
voltage.
The minimum input voltage needed to support the output voltage is
VIN_MIN = ILOAD × (RDSON,PFET + RINDUCTOR)+VOUT
where
• ILOAD = load current
• RDSON, PFET = the drain to source resistance of PFET switch in the triode region
• RINDUCTOR = the inductor resistance (3)
IPFM Peak = VIN
64:
117 mA + (typ)
IMODE < VIN
50:
26 mA + (typ)
12
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7.4 Device Functional Modes
7.4.1 PWM Operation
During PWM operation the converter operates as a voltage-mode controller with input voltage feed forward. This
allows the converter to achieve excellent load and line regulation. The DC gain of the power stage is proportional
to the input voltage. To eliminate this dependence, feed forward inversely proportional to the input voltage is
introduced.
7.4.1.1 Internal Synchronous Rectification
While in PWM mode, the LM3670 uses an internal NFET as a synchronous rectifier to reduce rectifier forward
voltage drop and associated power loss. Synchronous rectification provides a significant improvement in
efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier
diode.
7.4.1.2 Current Limiting
A current limit feature allows the LM3670 to protect itself and external components during overload conditions
PWM mode implements cycle-by-cycle current limiting using an internal comparator that trips at 620 mA (typical).
7.4.2 PFM Operation
At very light load, the converter enters PFM mode and operates with reduced switching frequency and supply
current to maintain high efficiency.
The part automatically transition into PFM mode when either of two conditions occurs for a duration of 32 or
more clock cycles:
1. The inductor current becomes discontinuous
2. The peak PMOS switch current drops below the IMODE level:
(4)
During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage
in PWM operation, allowing additional headroom for voltage drop during a load transient from light to heavy load.
The PFM comparator senses the output voltage via the feedback pin and control the switching of the output
FETs such that the output voltage ramps between 0.8% and 1.6% (typical) above the nominal PWM output
voltage. If the output voltage is below the high PFM comparator threshold, the PMOS power switch is turned on.
It remains on until the output voltage exceeds the ‘high’ PFM threshold or the peak current exceeds the IPFM level
set for PFM mode. The peak current in PFM mode is:
(5)
Once the PMOS power switch is turned off, the NMOS power switch is turned on until the inductor current ramps
to zero. When the NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output
voltage is below the high PFM comparator threshold (see Figure 16), the PMOS switch is again turned on and
the cycle is repeated until the output reaches the desired level. Once the output reaches the high PFM threshold,
the NMOS switch is turned on briefly to ramp the inductor current to zero and then both output switches are
turned off and the part enters an extremely low power mode. Quiescent supply current during this sleep mode is
less than 30 µA, which allows the part to achieve high efficiencies under extremely light load conditions. When
the output drops below the low PFM threshold, the cycle repeats to restore the output voltage to approximately
1.6% above the nominal PWM output voltage.
If the load current increases during PFM mode (see Figure 16) causing the output voltage to fall below the ‘low2’
PFM threshold, the part automatically transitions into fixed-frequency PWM mode.
High PFM Threshold
~1.016 × VOUT
Low1 PFM Threshold
~1.008 × VOUT
PFM Mode at Light Load
PWM Mode at
Moderateto-Heavy
Loads
Pfet on
until
Ipfm limit
reached
Nfet on
drains
inductor
current
until
I inductor = 0
High PFM
Voltage
Threshold
reached,
go into
sleep mode
Low PFM
Threshold,
turn on
PFET
Current load
increases,
draws VOUT
towards
Low2 PFM
Threshold
Low2 PFM Threshold,
switch back to PWM mode
Load current
increases
Low2 PFM Threshold
VOUT
Z-
Ax
is
Z-Axis
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Device Functional Modes (continued)
Figure 16. Operation in PFM Mode and Transition to PWM Mode
7.4.3 Shutdown
Setting the EN input pin low (< 0.4 V) places the LM3670 in shutdown mode. During shutdown the PFET switch,
NFET switch, reference, control and bias circuitry of the LM3671 are turned off. Setting EN high (> 1.3 V)
enables normal operation. It is recommended to set EN pin low to turn off the LM3671 during system power up
and undervoltage conditions when the supply is less than 2.5 V. Do not leave the EN pin floating.
VOUT = VIN-VOUT
2 L
ILOAD + ()VOUT
VIN
()(1
f)
*
IMAX = IRIPPLE
2
ILOAD +
1
2
5
43
VIN SW
FB
EN
GND
L1
10 µF VOUT
CIN
4.7 µF LM3670
VIN
2.5 V to 5.5 V
COUT
10 µF
14
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The external control of this device is very easy. First make sure the correct voltage been applied at VIN pin, then
simply apply the voltage at EN pin according to the Electrical Characteristics to enable or disable the output
voltage.
8.2 Typical Application
8.2.1 Typical Application: Fixed Output
Figure 17. LM3670 Typical Application, Fixed Output
8.2.1.1 Design Requirements
For typical CMOS voltage regulator applications, use the parameters listed in Table 2.
Table 2. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
Minimum input voltage 2.5 V
Minimum output voltage 1.2 V
Maximum load current 350 mA
8.2.1.2 Detailed Design Procedure
8.2.1.2.1 Inductor Selection
There are two main considerations when choosing an inductor: the inductor current must not saturate, and the
inductor current ripple is small enough to achieve the desired output voltage ripple.
There are two methods to choose the inductor current rating.
8.2.1.2.1.1 Method 1
The total current is the sum of the load and the inductor ripple current. This can be written as
(6)
where
• ILOAD = load current
• VIN = input voltage
VPP-RMS = VPP-C2 + VPP-ESR2
VOUT = VPP-ESR = IPP * RESR
VPP-C = f*8*C
IPP
IRMS OUTMAX * * (1 - )
VOUT
VIN
VOUT
VIN
= I
The worst case IRMS is:
= 2
IRMS IRMS (duty cycle = 50%)
) * (1
f)) * (L >= (VIN - VOUT
IPP
VOUT
VIN
15
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• L = inductor
• ƒ = switching frequency
• IRIPPLE = peak-to-peak current (7)
8.2.1.2.1.2 Method 2
A more conservative approach is to choose an inductor that can handle the current limit of 700 mA.
Given a peak-to-peak current ripple (IPP) the inductor needs to be at least
(8)
A 10-µH inductor with a saturation current rating of at least 800 mA is recommended for most applications.
Resistance of the inductor resistance must be less than around 0.3 Ωfor good efficiency. Table 3 lists suggested
inductors and suppliers. For low-cost applications, an unshielded bobbin inductor is suggested. For noise critical
applications, a toroidal or shielded-bobbin inductor must be used. A good practice is to lay out the board with
overlapping footprints of both types for design flexibility. This allows substitution of a low-noise toroidal inductor,
in the event that noise from low-cost bobbin models is unacceptable.
8.2.1.2.2 Input Capacitor Selection
A ceramic input capacitor of 4.7 µF is sufficient for most applications. A larger value may be used for improved
input voltage filtering. The input filter capacitor supplies current to the PFET switch of the LM3670 in the first half
of each cycle and reduces voltage ripple imposed on the input power source. The low equivalent series
resistance (ESR) of a ceramic capacitor provides the best noise filtering of the input voltage spikes due to this
rapidly changing current. Select an input filter capacitor with a surge current rating sufficient for the power-up
surge from the input power source. The power-up surge current is approximately the value of the capacitor (µF)
times the voltage rise rate (V/µs). The input current ripple can be calculated by :
(9)
Table 3. Suggested Inductors and Their Suppliers
MODEL VENDOR
IDC2512NB100M Vishay
DO1608C-103 Coilcraft
ELL6RH100M Panasonic
CDRH5D18-100 Sumida
8.2.1.2.3 Output Capacitor Selection
The output filter capacitor smooths out current flow from the inductor to the load, maintaining a steady output
voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with
sufficient capacitance and sufficiently low ESR to perform these functions.
The output ripple current can be calculated as:
Voltage peak-to-peak ripple due to capacitance =
Voltage peak-to-peak ripple due to ESR =
Voltage peak-to-peak ripple, root mean squared =
VOUT (50 mV/Div)
ILOAD = 0 mA
TIME (100 Ps/DIV)
CURRENT LOAD STEP (0 mA - 280 mA)
ILOAD = 280 mA
VOUT (50 mV/Div)
ILOAD = 350 mA
TIME (100 Ps/DIV)
CURRENT LOAD STEP (0 mA - 350 mA)
ILOAD = 0 mA
16
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Note that the output ripple is dependent on the current ripple and the equivalent series resistance of the output
capacitor (RESR).
Because these two components are out-of-phase the RMS value is used. The RESR is frequency dependent (as
well as temperature dependent); make sure the frequency of the RESR given is the same order of magnitude as
the switching frequency.
Table 4. Suggested Capacitors And Their Suppliers
MODEL TYPE VENDOR
10 µF for COUTVJ1812V106MXJAT Ceramic Vishay
LMK432BJ106MM Ceramic Taiyo-Yuden
JMK325BJ106MM Ceramic Taiyo-Yuden
4.7 µF for CIN VJ1812V475MXJAT Ceramic Vishay
EMK325BJ475MN Ceramic Taiyo-Yuden
C3216X5R0J475M Ceramic TDK
8.2.1.3 Application Curves
ILOAD = 0 mA to 280 mA
Figure 18. Load Transient
ILOAD = 0 mA to 350 mA
Figure 19. Load Transient
C1 =1
2 S R1 10 kHz
* * *
VOUT = R1
R2
VFB * + 1
( )
1
2
5
4
3
VIN SW
FB
EN
GND
L1
4.7 or 10 µH VOUT
CIN
4.7 µF LM3670
VIN
2.5 V to 5.5 V
R1
R2
COUT
10 µF
17
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8.2.2 Typical Application: Adjustable Output
Figure 20. LM3670 Typical Application: Adjustable Output
8.2.2.1 Design Requirements
For adjustable LM3670 option, use the design parameters in Table 5
Table 5. Design Parameters
DESIGN PARAMETER EXAMPLE VALUE
Input voltage range 2.5 V to 5.5
Input capacitor 4.7 µF
Output capacitor 10 µF
Inductor 4.7 µH or 10 µH
ADJ programmable output voltage 0.7 V to 2.5 V
8.2.2.2 Detailed Design Procedure
8.2.2.2.1 Output Voltage Selection for Adjustable LM3670
The output voltage of the adjustable parts can be programmed through the resistor network connected from VOUT
to VFB then to GND. VOUT is adjusted to make VFB equal to 0.5 V. The resistor from VFB to GND (R2) must be at
least 100 KΩto keep the current sunk through this network well below the 15-µA quiescent current level (PFM
mode with no switching) but large enough that it is not susceptible to noise. If R2is 200 KΩ, and VFB is 0.5 V,
then the current through the resistor feedback network is 2.5 µA (IFB =0.5V/R2). The output voltage formula is:
where
• VOUT = output voltage (V)
• VFB = feedback voltage (0.5 V typical)
• R1Resistor from VOUT to VFB (Ω)
• R2Resistor from VOUT to GND (Ω) (10)
For output voltage greater than or equal to 0.7 V a frequency zero must be added at 10 kHz for stability.
(11)
For any output voltages equal to 0.7 V or 2.5 V, a pole must also be placed at 10 kHz (see Table 6).
VOUT (50 mV/Div)
ILOAD = 50 mA
TIME (100 Ps/DIV)
CURRENT LOAD STEP (50 mA - 350 mA)
ILOAD = 350 mA
VOUT (50 mV/Div)
ILOAD = 300 mA
TIME (100 ms/DIV)
CURRENT LOAD STEP (100 mA - 300 mA)
ILOAD = 100 mA
Inductor Current = 200 mA/Div
18
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(1) (10 || 4.7)
Table 6. Adjustable LM3670 Configurations for Various VOUT
VOUT (V) R1 (KΩ) R2 (KΩ) C1 (pF) C2 (pF) L (µH) CIN (µF) COUT (µF)
0.7 80.6 200 200 150 4.7 4.7 10
0.8 120 200 130 none 4.7 4.7 10
0.9 160 200 100 none 4.7 4.7 10
1.0 200 200 82 none 4.7 4.7 10
1.1 240 200 68 none 4.7 4.7 10
1.2 280 200 56 none 4.7 4.7 10
1.24 221 150 75 120 4.7 4.7 10
1.5 402 200 39 none 10 4.7 10
1.6 442 200 39 none 10 4.7 10
1.7 487 200 33 none 10 4.7 10
1.875 549 200 30 none 10 4.7 14.7(1)
2.5 806 200 22 82 10 4.7 22
8.2.2.3 Application Curves
ILOAD = 50 mA to 350 mA
Figure 21. Load Transient
ILOAD = 100 mA to 300 mA
Figure 22. Load Transient
9 Power Supply Recommendations
The LM3670 is designed to operate from a stable input supply range of 2.5 V to 5.5 V.
19
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10 Layout
10.1 Layout Guidelines
PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance
of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss
in the traces, which can send erroneous signals to the DC-DC converter device, resulting in poor regulation or
instability.
Good layout for the LM3670 can be implemented by following a few simple design rules, as shown in Figure 23.
•Place the LM3670, inductor and filter capacitors close together and make the traces short. The traces
between these components carry relatively high switching currents and act as antennas. Following this rule
reduces radiated noise. Place the capacitors and inductor within 0.2 in. (5 mm) of the LM3670.
•Arrange the components so that the switching current loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor, through the LM3670 and inductor to the output filter
capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled
up from ground, through the LM3670 by the inductor, to the output filter capacitor and then back through
ground, forming a second current loop. Routing these loops so the current curls in the same direction
prevents magnetic field reversal between the two half-cycles and reduces radiated noise.
•Connect the ground pins of the LM3670, and filter capacitors together using generous component-side copper
fill as a pseudo-ground plane. Then, connect this to the ground-plane (if one is used) with several vias. This
reduces ground-plane noise by preventing the switching currents from circulating through the ground plane. It
also reduces ground bounce at the LM3670 by giving it a low-impedance ground connection.
•Use wide traces between the power components and for power connections to the DC-DC converter circuit.
This reduces voltage errors caused by resistive losses across the traces.
•Route noise sensitive traces, such as the voltage feedback path, away from noisy traces between the power
components. The voltage feedback trace must remain close to the LM3670 circuit, and be direct but must be
routed opposite to noisy components. This reduces EMI radiated onto the DC-DC converter’s own voltage
feedback trace.
•Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocks
and other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduced through
distance.
In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board,
arrange the CMOS digital circuitry around it (because this also generates noise), and then place sensitive pre-
amplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a metal
pan and, by using low-dropout linear regulators, power to the circuit is post-regulated to reduce conducted noise.
EN G
ND
S
W
GND
EN
POST
PIN
The light shaded area is the top surface ground. C , C , Feedback R
and C grounds all come to this area which is as far away from the SW pin
as possible to avoid the noise created at the SW pin.
Note that the top and bottom GND sides are kept away from the SW pin to
avoid picking up noise from the SW pin which swings from GND to V .
OUT IN
IN
EN post pin is connected to EN with a bottom side trace to
maintain unbroken ground plane on top of board
COUT
CIN
R1_fb C1_fb
R2_fb C2_fb
L1
EN,GND,V ,FB,SW are
the pads for the SOT-23-5
package
IN
FB
As many through holes
as possible here to
connect the top and
bottom ground planes
VIN
S
W
VOUT
The V , SW, V traces,
C , C traces & pads
should be thick - they are
high current paths
IN OUT
IN OUT
Bottom surface - the darker
shaded area is all GND EXCEPT
for area around SW to avoid
picking up switch noise.
If possible put the feedback Rs and Cs on the back side so the C
GND can move closer to the IC GND
OUT
SW node is switching
between V and GND at
1 MHz - VERY NOISY! -
keep all GNDs and GND
planes away!
IN
20
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10.2 Layout Example
Figure 23. LM3670 Layout
21
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM3670MF-1.2/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SCZB
LM3670MF-1.5/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 S82B
LM3670MF-1.6/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SDBB
LM3670MF-1.8/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SDCB
LM3670MF-1.875/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SEFB
LM3670MF-3.3/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SDEB
LM3670MF-ADJ/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SDFB
LM3670MFX-1.2/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SCZB
LM3670MFX-1.8/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SDCB
LM3670MFX-ADJ/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SDFB
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM3670MF-1.2/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LM3670MF-1.5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LM3670MF-1.6/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LM3670MF-1.8/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LM3670MF-1.875/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LM3670MF-3.3/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LM3670MF-ADJ/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LM3670MFX-1.2/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LM3670MFX-1.8/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LM3670MFX-ADJ/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Aug-2017
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM3670MF-1.2/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LM3670MF-1.5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LM3670MF-1.6/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LM3670MF-1.8/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LM3670MF-1.875/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LM3670MF-3.3/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LM3670MF-ADJ/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LM3670MFX-1.2/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0
LM3670MFX-1.8/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0
LM3670MFX-ADJ/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Aug-2017
Pack Materials-Page 2
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PACKAGE OUTLINE
C
0.22
0.08 TYP
0.25
3.0
2.6
2X 0.95
1.9
1.45
0.90
0.15
0.00 TYP
5X 0.5
0.3
0.6
0.3 TYP
8
0 TYP
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
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EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/E 09/2019
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
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EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
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