Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric 10 - 200 VDC (Commercial Grade) Overview KEMET's Commercial "L" Series with Tin/Lead Termination surface mount capacitors in C0G dielectric are designed to meet the needs of critical applications where tin/lead end metallization is required. KEMET's tin/lead electroplating process is designed to meet a 5% minimum lead content and address concerns for a more robust and reliable lead containing termination system. As the bulk of the electronics industry moves towards RoHS compliance, KEMET continues to provide tin/lead terminated products for military, aerospace and industrial applications and will ensure customers have a stable and long-term source of supply. KEMET's C0G dielectric features a 125C maximum operating temperature and is considered "stable." The Electronics Components, Assemblies & Materials Association (EIA) characterizes C0G dielectric as a Class I material. Components of this classification are temperature compensating and are suited for resonant circuit applications or those where Q and stability of capacitance characteristics are required. C0G exhibits no change in capacitance with respect to time and voltage and boasts a negligible change in capacitance with reference to ambient temperature. Capacitance change is limited to 30 ppm/C from -55C to +125C. Benefits * -55C to +125C operating temperature range * Reliable and robust termination system * EIA 0402, 0603, 0805, 1206, 1210, 1808, 1812, 1825, 2220, and 2225 case sizes * DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V, and 200 V * Capacitance offerings ranging from 0.5 pF up to 0.47 F * Available capacitance tolerances of 0.10 pF, 0.25 pF, 0.5 pF, 1%, 2%, 5%, 10%, and 20% Ordering Information C Ceramic 1206 C Case Size Specification/ (L" x W") Series 0402 0603 0805 1206 1210 1808 1812 1825 2220 2225 C = Standard 104 J 3 G Capacitance Code (pF) Capacitance Tolerance1 Voltage Dielectric 2 significant digits + number of zeros. Use 9 for 1.0 - 9.9 pF Use 8 for 0.5 - .99 pF e.g., 2.2 pF = 229 e.g., 0.5 pF = 508 B = 0.10 pF C = 0.25 pF D = 0.5 pF F = 1% G = 2% J = 5% K = 10% M = 20% A L TU Packaging/Grade Failure Rate/ Termination Finish2 (C-Spec)3 Design 8 = 10 V G = C0G 4 = 16 V 3 = 25 V 5 = 50 V 1 = 100 V 2 = 200 V Additional capacitance tolerance offerings may be available. Contact KEMET for details. Additional termination finish options may be available. Contact KEMET for details 3 Additional reeling or packaging options may be available. Contact KEMET for details. A = N/A L = SnPb (5% minimum) Blank = Bulk TU = 7" Reel Unmarked 1 2 (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com One world. One KEMET C1019_C0G_SnPb_SMD * 10/5/2012 1 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Dimensions - Millimeters (Inches) W 100% Tin or SnPb Plate L B T Nickel Plate Electrodes EIA Size Code Metric Size Code L Length 0402 0603 0805 1206 1210 1808 1812 1825 2220 2225 1005 1608 2012 3216 3225 4520 4532 4564 5650 5664 1.00 (.040) 0.05 (.002) 1.60 (.063) 0.15 (.006) 2.00 (.079) 0.20 (.008) 3.20 (.126) 0.20 (.008) 3.20 (.126) 0.20 (.008) 4.70 (.185) 0.50 (.020) 4.50 (.177) 0.30 (.012) 4.50 (.177) 0.30 (.012) 5.70 (.224) 0.40 (.016) 5.60 (.220) 0.40 (.016) Conductive Metalization W Width T Thickness 0.50 (.020) 0.05 (.002) 0.80 (.032) 0.15 (.006) 1.25 (.049) 0.20 (.008) 1.60 (.063) 0.20 (.008) 2.50 (.098) 0.20 (.008) See Table 2 for Thickness 2.00 (.079) 0.20 (.008) 3.20 (.126) 0.30 (.012) 6.40 (.252) 0.40 (.016) 5.00 (.197) 0.40 (.016) 6.40 (.248) 0.40 (.016) Ceramic Surface Mount S B Bandwidth 0.30 (.012) 0.10 (.004) 0.35 (.014) 0.15 (.006) 0.50 (0.02) 0.25 (.010) 0.50 (0.02) 0.25 (.010) 0.50 (0.02) 0.25 (.010) 0.60 (.024) 0.35 (.014) 0.60 (.024) 0.35 (.014) 0.60 (.024) 0.35 (.014) 0.60 (.024) 0.35 (.014) 0.60 (.024) 0.35 (.014) S Separation Minimum 0.30 (.012) 0.70 (.028) 0.75 (.030) N/A Mounting Technique Solder Reflow Only Solder Wave or Solder Reflow Solder Reflow Only Benefits cont'd * * * * * No piezoelectric noise Extremely low ESR and ESL High thermal stability High ripple current capability Preferred capacitance solution at line frequencies and into the MHz range * Negligible capacitance change with respect to temperature from -55C to +125C * * * * * * No capacitance change with respect to applied rated DC voltage No capacitance decay with time Non-polar device, minimizing installation concerns SnPb plated termination finish (5% minimum) Flexible termination option available upon request Available for other surface mount products, additional dielectrics and higher voltage ratings upon request Applications Typical applications include military, aerospace and other high reliability applications. Qualification/Certification Commercial Grade products are subject to internal qualification. Details regarding test methods and conditions are referenced in Table 4, Performance & Reliability. (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com C1019_C0G_SnPb_SMD * 10/5/2012 2 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Environmental Compliance These devices do not meet RoHS criteria due to the concentration of Pb containment in the termination finish Electrical Parameters/Characteristics Item Parameters/Characteristics Operating Temperature Range Capacitance Change with Reference to +25C and 0 VDC Applied (TCC) Aging Rate (Maximum % Capacitance Loss/Decade Hour) Dielectric Withstanding Voltage (DWV) Dissipation Factor (DF) Maximum Limit @ 25C Insulation Resistance (IR) Limit @ 25C -55C to +125C 30 ppm/C 0% 250% of rated voltage (5 1 seconds and charge/discharge not exceeding 50 mA) 0.1% 1,000 megohm microfarads or 100 G (Rated voltage applied for 120 5 seconds @ 25C) To obtain IR limit, divide M-F value by the capacitance and compare to G limit. Select the lower of the two limits. Capacitance and dissipation factor (DF) measured under the following conditions: 1 MHz 100 kHz and 1.0 Vrms 0.2 V if capacitance 1,000 pF 1 kHz 50 Hz and 1.0 Vrms 0.2 V if capacitance > 1,000 pF Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as Automatic Level Control (ALC). The ALC feature should be switched to "ON." Post Environmental Limits High Temperature Life, Biased Humidity, Moisture Resistance Dielectric Rated DC Voltage Capacitance Value Dissipation Factor (Maximum %) C0G All All 0.5 Capacitance Shift Insulation Resistance 0.3% or 0.25 pF 10% of Initial Limit (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com C1019_C0G_SnPb_SMD * 10/5/2012 3 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Table 1A - Capacitance Range/Selection Waterfall (0402 - 1206 Case Sizes) 5 1 2 8 4 3 5 1 2 8 4 3 5 1 2 8 4 3 5 1 2 Voltage DC 25 50 100 200 10 16 25 50 100 200 10 16 25 50 100 200 10 16 25 50 100 200 Series C0402 4 3 5 1 C0603 C0805 EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EC EC EC EC EC EC ED ED EB EB EB EC EC ED EB EB EB EB EB EB EE EE EF EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EC ED ED ED ED EE EC EC EC EE EE EF EC EC ED ED EB EB EB EB EB EB EB EB EB EC EE EE EH EH 200 8 EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EC EC EC EC EC EC ED ED EB EB EB EC EC ED EB EB EB EB EB EB EC EC ED 100 2 EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EC EC EC EC EC EC ED ED EB EB EB EC EC ED EB EB EB EB EB EB EC EC ED 50 1 EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EC EC EC EC EC EC ED ED EB EB EB EC EC ED EB EB EB EB EB EB EC EC ED 25 5 UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DD DD 16 3 DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DD DD DC DC DD DD DD DD DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DD DE DG 10 4 CB CB CB CB CB CB CB CB CB CB CB CB 200 8 DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DD DD DD DD DC DC DC DC DD DD DD DE DE DE DE DC DC DC DC DC DC DC DC DD DD DF 100 1 DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DD DD DD DD DC DC DC DC DD DD DD DE DE DE DE DC DC DC DC DC DC DC DC DC DC DD DF DG DG DG 50 2 DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DD DD DD DD DC DC DC DC DD DD DD DE DE DE DE DC DC DC DC DC DC DC DC DC DC DD DF DG DG DG 25 5 DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DC DD DD DD DD DC DC DC DC DD DD DD DE DE DE DE DC DC DC DC DC DC DC DC DC DC DD DF DG DG DG 16 3 CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB 10 4 CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB 200 8 CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB 100 Voltage DC Voltage Code CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB 50 BB BB BB BB BB BB BB BB BB BB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB CB 25 BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB 16 BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB 10 BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB 100 G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G G M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M 200 F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F F J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K Product Availability and Chip Thickness Codes - See Table 2 for Chip Thickness Dimensions BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB 50 D D D D D D D D D 25 Cap Code C C C C C C C C 16 Capacitance B B B B B B B C1206 3 10 508 - 758 109 - 169 189 - 439 479 - 919 10 110 120 130 - 330 360 - 620 680 - 910 101 111 - 181 201 - 331 361 - 561 621 681 751 821 911 102 112 122 132 152 162 182 202 222 242 272 302 332 362 392 432 472 512 562 622 682 752 822 912 103 123 153 183 223 273 333 393 473 563 C0805 4 Capacitance Tolerance 0.50 - 0.75 pF 1.0 - 1.6 pF 1.8 - 4.3 pF 4.7 - 9.1 pF 10 pF 11 pF 12 pF 13 - 33 pF 36 - 62 pF 68 - 91 pF 100 pF 110 - 180 pF 200 - 330 pF 360 - 560 pF 620 pF 680 pF 750 pF 820 pF 910 pF 1,000 pF 1,100 pF 1,200 pF 1,300 pF 1,500 pF 1,600 pF 1,800 pF 2,000 pF 2,200 pF 2,400 pF 2,700 pF 3,000 pF 3,300 pF 3,600 pF 3,900 pF 4,300 pF 4,700 pF 5,100 pF 5,600 pF 6,200 pF 6,800 pF 7,500 pF 8,200 pF 9,100 pF 10,000 pF 12,000 pF 15,000 pF 18,000 pF 22,000 pF 27,000 pF 33,000 pF 39,000 pF 47,000 pF 56,000 pF C0603 8 16 C0402 Voltage Code 10 Series Cap Capacitance Code 2 8 4 3 5 1 2 UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EB EC EC ED ED ED EE EC EC UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD UD C1206 UD = Under development KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage capability within the same form factor (configuration and dimensions). These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts. (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com Roll Over for Order Info. C1019_C0G_SnPb_SMD * 10/5/2012 4 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Table 1A - Capacitance Range/Selection Waterfall (0402 - 1206 Case Sizes) cont'd 2 8 4 3 5 1 2 8 4 3 5 1 2 8 4 3 5 Voltage DC 25 50 100 200 10 16 25 50 100 200 10 16 25 50 100 200 10 16 25 50 2 50 100 200 4 3 5 1 2 16 8 10 2 200 1 EH EH 100 5 EF EH EH 50 16 3 EF EH EH 25 10 4 200 8 100 1 50 2 C0402 25 16 5 10 3 100 4 Series 200 8 50 Voltage DC Voltage Code EF EH EH 25 Product Availability and Chip Thickness Codes - See Table 2 for Chip Thickness Dimensions F G J K M F G J K M F G J K M 25 Cap Code 1 200 1 100 5 16 Capacitance C1206 3 10 683 823 104 C0805 4 Capacitance Tolerance 68,000 pF 82,000 pF 0.10 F C0603 8 16 C0402 Voltage Code 10 Series Cap Capacitance Code 3 5 1 2 8 4 C0603 C0805 C1206 Table 1B - Capacitance Range/Selection Waterfall (1210 - 2225 Case Sizes) 200 2 200 100 1 KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE 200 50 5 100 2 100 1 50 3 50 2 200 100 1 C2225 3 5 1 2 5 1 2 C1808 GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB GB HB HB HB GB GB GD HB HB HB GB GB GH HB HB HB GB GB GJ HB HB HB JE JE GB GH UD HB HB HB JE JE 200 4 GB GB GB GB GB GB GB GB GB GB 100 200 8 LF LF LF LF LF LF LF LF LF LF LF LF LF 50 100 Voltage Code LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF 200 Voltage DC LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF LF 100 UD UD UD UD C1210 FB FB FB FB FB FB FB FB FB FB FB FB FB FC FE FE FE FE FG FC FC FF FF FF FF FF FG FG FG 50 FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FC FC FC FC FC FF FF FF FF FG FG FG FG FG FC FC 50 M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M 200 FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FF FB FB FB FB FC FC 200 K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K 100 FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FF FB FB FB FB FC FC Series 5 C2220 50 FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FF FB FB FB FB FC FC J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J J 2 50 100 D D D G D F G D F G D F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G F G 1 200 50 FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FB FF FB FB FB FB FC FC 100 C C C C C 5 C1825 5 1 2 Product Availability and Chip Thickness Codes See Table 2 for Chip Thickness Dimensions 50 Cap Code B B B B 2 25 Capacitance 109 - 169 189 - 439 479 - 919 100 - 120 130 - 330 360 - 620 680 - 910 101 - 301 331 - 431 471 - 911 102 112 122 132 152 162 182 202 222 242 272 302 332 362 392 432 472 512 562 622 682 752 822 1 16 1.0 - 1.6 pF 1.8 - 4.3 pF 4.7 - 9.1 pF 10 - 12 pF 13 - 33 pF 36 - 62 pF 68 - 91 pF 100 - 300 pF 330 - 430 pF 470 - 910 pF 1,000 pF 1,100 pF 1,200 pF 1,300 pF 1,500 pF 1,600 pF 1,800 pF 2,000 pF 2,200 pF 2,400 pF 2,700 pF 3,000 pF 3,300 pF 3,600 pF 3,900 pF 4,300 pF 4,700 pF 5,100 pF 5,600 pF 6,200 pF 6,800 pF 7,500 pF 8,200 pF 5 10 Capacitance Tolerance 2 100 1 50 5 C1812 200 3 100 4 50 8 Voltage DC 200 Voltage Code 25 Cap Code C1808 16 Capacitance C1210 10 Series 5 1 2 5 1 2 3 1 2 C1812 C1825 C2220 C2225 UD = Under development KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage capability within the same form factor (configuration and dimensions). These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts. (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com Roll Over for Order Info. C1019_C0G_SnPb_SMD * 10/5/2012 5 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Table 1B - Capacitance Range/Selection Waterfall (1210 - 2225 Case Sizes) cont'd C2225 200 KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE 200 2 100 1 100 5 50 2 50 1 200 50 3 100 C2220 2 200 100 1 50 200 5 100 200 5 1 2 5 1 2 C1808 5 1 2 C1812 JE JE JE JE JE JE JB JB JB JB JB JB JB JB JB JB JB JB JD JG JG 200 50 3 C1210 HE HE 100 200 4 HB HB HB HE HE HG 50 100 8 HB HB HB HB HB HB 200 50 Voltage Code UD UD UD UD UD UD UD UD UD UD UD UD UD 100 Voltage DC GH GG GB GB GB GB GB GB GB GB GB GB GD GH GN GB GB GB GB GB GB GB GB GB GB GB GB GB GB GD GH GK 50 UD UD UD UD UD UD UD UD UD UD M M M M M M M M M M M M M M M M M M M M M M 200 FE FF FB FB FB FB FB FB FE FE FF FG FH FM K K K K K K K K K K K K K K K K K K K K K K 100 FE FF FG FG FB FB FB FB FB FB FB FC FF FG FH FM Series C1825 2 50 FE FF FG FG FB FB FB FB FB FB FB FB FC FE FG FH FJ FK J J J J J J J J J J J J J J J J J J J J J J 100 100 FE FF FG FG FB FB FB FB FB FB FB FB FC FE FG FH FJ FK G G G G G G G G G G G G G G G G G G G G G G 1 50 50 FE FF FG FG FB FB FB FB FB FB FB FB FC FE FG FH FJ FK F F F F F F F F F F F F F F F F F F F F F F 5 5 1 2 Product Availability and Chip Thickness Codes See Table 2 for Chip Thickness Dimensions 25 Capacitance Cap Code 2 16 912 103 123 153 183 223 273 333 393 473 563 683 823 104 124 154 184 224 274 334 394 474 1 10 9,100 pF 10,000 pF 12,000 pF 15,000 pF 18,000 pF 22,000 pF 27,000 pF 33,000 pF 39,000 pF 47,000 pF 56,000 pF 68,000 pF 82,000 pF 0.10 F 0.12 F 0.15 F 0.18 F 0.22 F 0.27 F 0.33 F 0.39 F 0.47 F 5 200 Voltage DC Capacitance Tolerance C1812 2 100 1 50 5 200 3 25 Cap Code C1808 4 16 Capacitance C1210 8 10 Series Voltage Code 5 1 2 3 1 2 C1825 JE JE JE JE JB JB JB JB JB JB JB JB JB JB JB JD JD JF JG C2220 C2225 UD = Under development KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage capability within the same form factor (configuration and dimensions). These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts. (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com Roll Over for Order Info. C1019_C0G_SnPb_SMD * 10/5/2012 6 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Table 2 - Chip Thickness/Packaging Quantities Paper Quantity Plastic Quantity Thickness Code Case Size Thickness Range (mm) 7" Reel 13" Reel 7" Reel 13" Reel BB CB DC DD DE DF DG EB EC ED EE EF EH FB FC FE FF FG FH FM FJ FK LF GB GD GH GG GK GJ GN HB HE HG JB JD JE JF JG KE 0402 0603 0805 0805 0805 0805 0805 1206 1206 1206 1206 1206 1206 1210 1210 1210 1210 1210 1210 1210 1210 1210 1808 1812 1812 1812 1812 1812 1812 1812 1825 1825 1825 2220 2220 2220 2220 2220 2225 0.50 0.05 0.80 0.07 0.78 0.10 0.90 0.10 1.00 0.10 1.10 0.10 1.25 0.15 0.78 0.10 0.90 0.10 1.00 0.10 1.10 0.10 1.20 0.15 1.60 0.20 0.78 0.10 0.90 0.10 1.00 0.10 1.10 0.10 1.25 0.15 1.55 0.15 1.70 0.20 1.85 0.20 2.10 0.20 1.00 0.15 1.00 0.10 1.25 0.15 1.40 0.15 1.55 0.10 1.60 0.20 1.70 0.15 1.70 0.20 1.10 0.15 1.40 0.15 1.60 0.20 1.00 0.15 1.30 0.15 1.40 0.15 1.50 0.15 1.70 0.15 1.40 0.15 10,000 4,000 4,000 4,000 0 0 0 4,000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50,000 10,000 10,000 10,000 0 0 0 10,000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2,500 2,500 2,500 4,000 4,000 2,500 2,500 2,500 2,000 4,000 4,000 2,500 2,500 2,500 2,000 2,000 2,000 2,000 2,500 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 1,000 0 0 0 0 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 8,000 10,000 10,000 10,000 10,000 10,000 8,000 8,000 8,000 8,000 10,000 4,000 4,000 4,000 4,000 4,000 4,000 4,000 4,000 4,000 4,000 4,000 4,000 4,000 4,000 4,000 4,000 Thickness Code Case Size Thickness Range (mm) 7" Reel 13" Reel 7" Reel 13" Reel Paper Quantity Plastic Quantity Package quantity based on finished chip thickness specifications. (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com C1019_C0G_SnPb_SMD * 10/5/2012 7 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Table 3 - Chip Capacitor Land Pattern Design Recommendations per IPC-7351 EIA Size Code Metric Size Code 01005 Density Level A: Maximum (Most) Land Protrusion (mm) Density Level B: Median (Nominal) Land Protrusion (mm) Density Level C: Minimum (Least) Land Protrusion (mm) C Y X V1 V2 C Y X V1 V2 C Y X V1 V2 0402 0.33 0.46 0.43 1.60 0.90 0.28 0.36 0.33 1.30 0.70 0.23 0.26 0.23 1.00 0.50 0201 0603 0.38 0.56 0.52 1.80 1.00 0.33 0.46 0.42 1.50 0.80 0.28 0.36 0.32 1.20 0.60 0402 1005 0.50 0.72 0.72 2.20 1.20 0.45 0.62 0.62 1.90 1.00 0.40 0.52 0.52 1.60 0.80 0603 1608 0.90 1.15 1.10 4.00 2.10 0.80 0.95 1.00 3.10 1.50 0.60 0.75 0.90 2.40 1.20 0805 2012 1.00 1.35 1.55 4.40 2.60 0.90 1.15 1.45 3.50 2.00 0.75 0.95 1.35 2.80 1.70 1206 3216 1.60 1.35 1.90 5.60 2.90 1.50 1.15 1.80 4.70 2.30 1.40 0.95 1.70 4.00 2.00 1210 3225 1.60 1.35 2.80 5.65 3.80 1.50 1.15 2.70 4.70 3.20 1.40 0.95 2.60 4.00 2.90 1808 4520 2.30 1.75 2.30 7.40 3.30 2.20 1.55 2.20 6.50 2.70 2.10 1.35 2.10 5.80 2.40 1812 4532 2.15 1.60 3.60 6.90 4.60 2.05 1.40 3.50 6.00 4.00 1.95 1.20 3.40 5.30 3.70 1825 4564 2.15 1.60 6.90 6.90 7.90 2.05 1.40 6.80 6.00 7.30 1.95 1.20 6.70 5.30 7.00 2220 5650 2.75 1.70 5.50 8.20 6.50 2.65 1.50 5.40 7.30 5.90 2.55 1.30 5.30 6.60 5.60 2225 5664 2.70 1.70 6.90 8.10 7.90 2.60 1.50 6.80 7.20 7.30 2.50 1.30 6.70 6.50 7.00 Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reflow solder processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes. Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reflow solder processes. Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualification testing based on the conditions outlined in IPC Standard 7351 (IPC-7351). Soldering Process Recommended Soldering Technique: * Solder wave or solder reflow for EIA case sizes 0603, 0805 and 1206 * All other EIA case sizes are limited to solder reflow only Recommended Soldering Profile: * KEMET recommends following the guidelines outlined in IPC/JEDEC J-STD-020 (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com C1019_C0G_SnPb_SMD * 10/5/2012 8 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Table 4 - Performance & Reliability: Test Methods and Conditions Stress Reference Test or Inspection Method Terminal Strength JIS-C-6429 Appendix 1, Note: Force of 1.8 kg for 60 seconds. Board Flex JIS-C-6429 Appendix 2, Note: Standard termination system - 2.0 mm (minimum) for all except 3 mm for C0G. Flexible termination system - 3.0 mm (minimum). Magnification 50 X. Conditions: Solderability J-STD-002 a) Method B, 4 hours @ 155C, dry heat @ 235C b) Method B @ 215C category 3 c) Method D, category 3 @ 260C Temperature Cycling JESD22 Method JA-104 1,000 Cycles (-55C to +125C). Measurement at 24 hours +/- 2 hours after test conclusion. Load Humidity: 1,000 hours 85C/85% RH and rated voltage. Add 100 K ohm resistor. Measurement at 24 hours +/- 2 hours after test conclusion. Low Volt Humidity: 1,000 hours 85C/85% RH and 1.5 V. Add 100 K ohm resistor. Measurement at 24 hours +/- 2 hours after test conclusion. t = 24 hours/cycle. Steps 7a and 7b not required. Unpowered. Measurement at 24 hours +/- 2 hours after test conclusion. -55C/+125C. Note: Number of cycles required - 300, maximum transfer time - 20 seconds, dwell time - 15 minutes. Air - Air. Biased Humidity MIL-STD-202 Method 103 Moisture Resistance MIL-STD-202 Method 106 Thermal Shock MIL-STD-202 Method 107 High Temperature Life MIL-STD-202 Method 108 /EIA-198 Storage Life MIL-STD-202 Method 108 150C, 0 VDC for 1,000 hours. Mechanical Shock MIL-STD-202 Method 213 Figure 1 of Method 213, Condition F. Resistance to Solvents MIL-STD-202 Method 215 Add aqueous wash chemical, OKEM Clean or equivalent. 1,000 hours at 125C (85C for X5R, Z5U and Y5V) with 2 X rated voltage applied. (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com C1019_C0G_SnPb_SMD * 10/5/2012 9 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Storage and Handling Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term storage. In addition, packaging materials will be degraded by high temperature- reels may soften or warp and tape peel force may increase. KEMET recommends that maximum storage temperature not exceed 40C and maximum storage humidity not exceed 70% relative humidity. Temperature fluctuations should be minimized to avoid condensation on the parts and atmospheres should be free of chlorine and sulfur bearing compounds. For optimized solderability chip stock should be used promptly, preferably within 1.5 years of receipt. Construction Reference A B C D E Item Finish Barrier Layer Base Metal Inner Electrode Termination System Dielectric Material Material SnPb (5% minimum) Ni Cu Ni CaZrO3 Note: Image is exaggerated in order to clearly identify all components of construction. Capacitor Marking (Optional): Laser Marking option is not available on C0G and Y5V dielectric devices. These capacitors are supplied unmarked only. (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com C1019_C0G_SnPb_SMD * 10/5/2012 10 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Tape & Reel Packaging Information KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on reeling quantities for commercial chips. Bar Code Label Anti-Static Reel (R) Embossed Plastic* or Punched Paper Carrier. ET KEM Chip and KPS Orientation in Pocket (except 1825 Commercial, and 1825 and 2225 Military) Sprocket Holes Embossment or Punched Cavity 8 mm, 12 mm or 16 mm Carrier Tape 178 mm (7.00") or 330 mm (13.00") Anti-Static Cover Tape (.10 mm (.004") Maximum Thickness) *EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only. Table 5 - Carrier Tape Configuration - Embossed Plastic & Punched Paper (mm) EIA Case Size Tape Size (W)* Lead Space (P1)* 01005 - 0402 8 2 0603 - 1210 8 4 1805 - 1808 12 4 1812 12 8 KPS 1210 12 8 KPS 1812 & 2220 16 12 Array 0508 & 0612 8 4 *Refer to Figures 1 & 2 for W and P1 carrier tape reference locations. *Refer to Tables 6 & 7 for tolerance specifications. (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com C1019_C0G_SnPb_SMD * 10/5/2012 11 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Figure 1 - Embossed (Plastic) Carrier Tape Dimensions P2 T T2 ODo [10 pitches cumulative tolerance on tape 0.2 mm] Po E1 Ao F Ko W B1 E2 Bo S1 P1 T1 Center Lines of Cavity OD 1 Cover Tape B 1 is for tape feeder reference only, including draft concentric about B o. Embossment For cavity size, see Note 1 Table 4 User Direction of Unreeling Table 6 - Embossed (Plastic) Carrier Tape Dimensions Metric will govern Constant Dimensions -- Millimeters (Inches) Tape Size D0 8 mm 12 mm 1.5 +0.10/-0.0 (0.059 +0.004/-0.0) 16 mm D1 Minimum Note 1 1.0 (0.039) 1.5 (0.059) E1 1.75 0.10 (0.069 0.004) R Reference S1 Minimum Note 2 Note 3 25.0 (0.984) 4.0 0.10 2.0 0.05 (0.079 0.600 (0.157 0.004) 0.002) (0.024) 30 (1.181) P0 P2 T Maximum T1 Maximum 0.600 (0.024) 0.100 (0.004) Variable Dimensions -- Millimeters (Inches) Tape Size Pitch 8 mm Single (4 mm) 12 mm Single (4 mm) & Double (8 mm) 16 mm Triple (12 mm) B1 Maximum Note 4 4.35 (0.171) 8.2 (0.323) 12.1 (0.476) E2 Minimum 6.25 (0.246) 10.25 (0.404) 14.25 (0.561) F P1 3.5 0.05 4.0 0.10 (0.138 0.002) (0.157 0.004) 8.0 0.10 (0.315 5.5 0.05 0.004) (0.217 0.002) 5.5 0.05 8.0 0.10 (0.315 (0.217 0.002) 0.004) T2 Maximum 2.5 (0.098) 4.6 (0.181) 4.6 (0.181) W Maximum 8.3 (0.327) 12.3 (0.484) 16.3 (0.642) A0,B0 & K0 Note 5 1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and hole location shall be applied independent of each other. 2. The tape with or without components shall pass around R without damage (see Figure 6). 3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b). 4. B1 dimension is a reference dimension for tape feeder clearance only. 5. The cavity defined by A0, B0 and K0 shall surround the component with sufficient clearance that: (a) the component does not protrude above the top surface of the carrier tape. (b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed. (c) rotation of the component is limited to 20 maximum for 8 and 12 mm tapes and 10 maximum for 16 mm tapes (see Figure 3). (d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4). (e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket. (f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements. (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com C1019_C0G_SnPb_SMD * 10/5/2012 12 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Figure 2 - Punched (Paper) Carrier Tape Dimensions P2 T Po ODo [10 pitches cumulative tolerance on tape 0.2 mm] E1 A0 F P1 T1 T1 Top Cover Tape W E2 B0 Bottom Cover Tape G Cavity Size, See Note 1, Table 7 Center Lines of Cavity Bottom Cover Tape User Direction of Unreeling Table 7 - Punched (Paper) Carrier Tape Dimensions Metric will govern Constant Dimensions -- Millimeters (Inches) Tape Size D0 E1 P0 P2 T1 Maximum G Minimum 8 mm 1.5 +0.10 -0.0 (0.059 +0.004 -0.0) 1.75 0.10 (0.069 0.004) 4.0 0.10 (0.157 0.004) 2.0 0.05 (0.079 0.002) 0.10 (0.004) Maximum 0.75 (0.030) R Reference Note 2 25 (0.984) T Maximum W Maximum A0 B 0 1.1 (0.098) 8.3 (0.327) 8.3 (0.327) Variable Dimensions -- Millimeters (Inches) Tape Size Pitch 8 mm Half (2 mm) 8 mm Single (4 mm) E2 Minimum 6.25 (0.246) F 3.5 0.05 (0.138 0.002) P1 2.0 0.05 (0.079 0.002) 4.0 0.10 (0.157 0.004) Note 1 1. The cavity defined by A0, B0 and T shall surround the component with sufficient clearance that: a) the component does not protrude beyond either surface of the carrier tape. b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed. c) rotation of the component is limited to 20 maximum (see Figure 3). d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4). e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements. 2. The tape with or without components shall pass around R without damage (see Figure 6). (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com C1019_C0G_SnPb_SMD * 10/5/2012 13 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Packaging Information Performance Notes 1. Cover Tape Break Force: 1.0 Kg minimum. 2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be: Tape Width Peel Strength 8 mm 0.1 to 1.0 Newton (10 to 100 gf) 12 and 16 mm 0.1 to 1.3 Newton (10 to 130 gf) The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be 165 to 180 from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300 10 mm/minute. 3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA Standards 556 and 624. Figure 3 - Maximum Component Rotation T Maximum Component Rotation Top View Maximum Component Rotation Side View Typical Pocket Centerline Tape Width (mm) 8,12 16 - 200 Bo Maximum Rotation ( 20 10 T) Typical Component Centerline Ao Figure 4 - Maximum Lateral Movement 8 mm & 12 mm Tape 0.5 mm maximum 0.5 mm maximum 16 mm Tape s Tape Maximum Width (mm) Rotation ( 8,12 20 16 - 56 10 72 - 200 5 S) Figure 5 - Bending Radius Embossed Carrier Punched Carrier 1.0 mm maximum 1.0 mm maximum R Bending Radius (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com R C1019_C0G_SnPb_SMD * 10/5/2012 14 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Figure 6 - Reel Dimensions Full Radius, See Note W3 (Includes Access Hole at Slot Location (O 40 mm minimum) flange distortion at outer edge) W2 (Measured at hub) D A N (See Note) C (Arbor hole diameter) B (see Note) W1 (Measured at hub) If present, tape slot in core for tape start: 2.5 mm minimum width x 10.0 mm minimum depth Note: Drive spokes optional; if used, dimensions B and D shall apply. Table 8 - Reel Dimensions Metric will govern Constant Dimensions -- Millimeters (Inches) Tape Size A B Minimum C D Minimum 8 mm 178 0.20 (7.008 0.008) or 330 0.20 (13.000 0.008) 1.5 (0.059) 13.0 +0.5/-0.2 (0.521 +0.02/-0.008) 20.2 (0.795) 12 mm 16 mm Variable Dimensions -- Millimeters (Inches) Tape Size N Minimum W1 W2 Maximum W3 50 (1.969) 8.4 +1.5/-0.0 (0.331 +0.059/-0.0) 12.4 +2.0/-0.0 (0.488 +0.078/-0.0) 16.4 +2.0/-0.0 (0.646 +0.078/-0.0) 14.4 (0.567) 18.4 (0.724) 22.4 (0.882) Shall accommodate tape width without interference 8 mm 12 mm 16 mm (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com C1019_C0G_SnPb_SMD * 10/5/2012 15 Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) Commercial "L" Series, SnPb Termination, C0G Dielectric, 10 - 200 VDC (Commercial Grade) Figure 7 - Tape Leader & Trailer Dimensions Embossed Carrier Carrier Tape Punched Carrier 8 mm & 12 mm only END Round Sprocket Holes START Top Cover Tape Elongated Sprocket Holes (32 mm tape and wider) Trailer 160 mm Minimum 100 mm Minimum Leader 400 mm Minimum Components Top Cover Tape Figure 8 - Maximum Camber Elongated sprocket holes (32 mm & wider tapes) Carrier Tape Round Sprocket Holes 1 mm Maximum, either direction Straight Edge 250 mm Bulk Cassette Packaging (Ceramic Chips Only) Meets Dimensional Requirements IEC-286 and EIAJ 7201 6 8 0.1 8 8 0.1 12.0 0.1 Unit mm *Reference 19.0* 36 00.2 31.5 0.2 0 53 3* 10* 1.5 2.0 3.0 0.1 0 0 0.1 0.2 0 5 0* 110 0.7 Capacitor Dimensions for Bulk Cassette Cassette Packaging - Millimeters EIA Size Code Metric Size Code L Length W Width B Bandwidth S Separation Minimum T Thickness Number of Pieces/Cassette 0402 1005 1.0 0.05 0.5 0.05 0.2 to 0.4 0.3 0.5 0.05 50,000 0603 1608 1.6 0.07 0.8 0.07 0.2 to 0.5 0.7 0.8 0.07 15,000 (c) KEMET Electronics Corporation * P.O. Box 5928 * Greenville, SC 29606 (864) 963-6300 * www.kemet.com C1019_C0G_SnPb_SMD * 10/5/2012 16