LMC7215, LMC7225 www.ti.com SNOS882E - SEPTEMBER 1999 - REVISED MARCH 2013 LMC7215/LMC7215-Q1/LMC7225 Micro-Power, Rail-to-Rail CMOS Comparators with PushPull/Open-Drain Outputs Check for Samples: LMC7215, LMC7225 FEATURES 1 (Typical Unless Otherwise Noted) 2 * * * * * * * * * Ultra Low Power Consumption 0.7 A Wide Range of Supply Voltages 2V to 8V Input Common-Mode Range Beyond V+ and V- Open Collector and Push-Pull Output High Output Current Drive: (@ VS = 5V) 45 mA Propagation Delay (@ VS = 5V, 10 mV Overdrive) 25 s Tiny 5-Pin SOT-23 Package Latch-up Resistance >300 mA LMC7215-Q1 is an Automotive Grade Product that is AEC-Q100 Grade 3 Qualified. APPLICATIONS * * * * * * * * Laptop Computers Mobile Phones Metering Systems Hand-held Electronics RC Timers Alarm and Monitoring Circuits Window Comparators, Multivibrators Automotive DESCRIPTION The LMC7215/LMC7215-Q1/LMC7225 are ultra low power comparators with a maximum of 1 A power supply current. They are designed to operate over a wide range of supply voltages, from 2V to 8V. The LMC7215/LMC7215-Q1/LMC7225 have a greater than rail-to-rail common mode voltage range. This is a real advantage in single supply applications. The LMC7215 features a push-pull output stage. This feature allows operation with absolute minimum amount of power consumption when driving any load. The LMC7225 features an open drain output. By connecting an external resistor, the output of the comparator can be used as a level shifter to any desired voltage to as high as 15V. The LMC7215/LMC7215-Q1/LMC7225 are designed for systems where low power consumption is the critical parameter. Ensured operation over the full supply voltage range of 2.7V to 5V and rail-to-rail performance makes this comparator ideal for battery-powered applications. Connection Diagrams Figure 1. 8-Pin SOIC (Top View) Figure 2. 5-Pin SOT-23 (Top View) 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1999-2013, Texas Instruments Incorporated LMC7215, LMC7225 SNOS882E - SEPTEMBER 1999 - REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings ESD Tolerance (1) (2) (3) 2 kV Differential Input Voltage V+ +0.3V, V- -0.3V Voltage at Input/Output Pin V+ +0.3V, V- -0.3V - + Supply Voltage (V -V ) 10V Current at Input Pin 5 mA Current at Output Pin (4) 30 mA Current at Power Supply Pin Lead Temperature 40 mA (soldering, 10 sec) 260C -65C to +150C Storage Temperature Range Junction Temperature (1) (5) 150C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. The maximum power dissipation is a function of TJ(MAX), JA, and TA. The maximum allowable power dissipation at any ambient temperature isPD = (TJ(MAX) - TA)/JA. All numbers apply for packages soldered directly into a PC board. (2) (3) (4) (5) Operating Ratings (1) 2V VCC 8V Supply Voltage Temperature Range (2) -40C to +85C Package Thermal Resistance (JA) (1) 8-Pin SOIC 165C/W 5-Pin SOT-23 325C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. The maximum power dissipation is a function of TJ(MAX), JA, and TA. The maximum allowable power dissipation at any ambient temperature isPD = (TJ(MAX) - TA)/JA. All numbers apply for packages soldered directly into a PC board. (2) 2.7V to 5V Electrical Characteristics Unless otherwise specified, all limits specified for TJ = 25C, V+ = 2.7V to 5V, V- = 0V, VCM = VO = V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Typ 1 (1) LMC7215 Limit (2) LMC7225 Limit (2) Units 6 6 mV 8 8 max VOS Input Offset Voltage TCVOS Input Offset Voltage Average Drift 2 V/C IB Input Current 5 fA IOS Input Offset Current CMRR Common Mode Rejection Ratio (1) (2) (3) 2 See (3) 1 fA 80 dB min 60 60 Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped production material. All limits are specified by testing or statistical analysis. CMRR measured at VCM = 0V to 2.5V and 2.5V to 5V when VS = 5V, VCM = 0.2V to 1.35V and 1.35V to 2.7V when VS = 2.7V. This eliminates units that have large VOS at the VCM extremes and low or opposite VOS at VCM = VS/2. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7215 LMC7225 LMC7215, LMC7225 www.ti.com SNOS882E - SEPTEMBER 1999 - REVISED MARCH 2013 2.7V to 5V Electrical Characteristics (continued) Unless otherwise specified, all limits specified for TJ = 25C, V+ = 2.7V to 5V, V- = 0V, VCM = VO = V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter PSRR Power Supply Rejection Ratio AV Voltage Gain Conditions Typ V+ = 2.2V to 8V (1) LMC7215 Limit (2) LMC7225 Limit (2) 60 60 2.9 2.9 V 2.7 2.7 min 0.0 0.0 V 0.2 0.2 max 5.2 5.2 V 5.0 5.0 min -0.2 -0.2 V 0.0 0.0 max 1.8 NA 90 dB 3.0 CMRR > 50 dB V+ = 2.7V -0.2 Input Common-Mode Voltage CMRR > 50 dB Range V+ = 5.0V 5.3 CMRR > 50 dB V+ = 5.0V -0.3 CMRR > 50 dB V+ = 2.2V 2.05 IOH = 1.5 mA VOH 2.05 2.3 IOH = 2.0 mA 4.8 4.6 IOH = 4.0 mA 0.17 V 0.5 max 0.4 0.4 V 0.5 0.5 max 0.4 0.4 V 0.5 0.5 max 15 NA mA V = 5.0V, Sourcing 50 NA mA V+ = 2.7V, Sinking 12 mA V+ = 5.0V, Sinking 30 mA 0.17 V+ = 5.0V 0.2 IOH = 4.0 mA ISC- V+ = 2.7V, Sourcing + (4) V min 0.4 IOH = 2.0 mA Output Short Circuit Current min NA 0.5 V+ = 2.7V (4) V 0.4 IOH = 1.5 mA Output Short Circuit Current NA 4.5 V+ = 2.2V ISC+ min 2.2 V+ = 5.0V Output Voltage Low V 1.7 V+ = 2.7V Output Voltage High VOL dB min 140 V+ = 2.7V CMVR Units + V = 2.2V ILeakage nA VIN+ = 0.1V, VIN- = 0V, Output Leakage Current 0.01 NA 500 max 0.7 1 1 A 1.2 1.2 max VOUT = 15V IS (4) V+ = 5.0V Supply Current VIN+ = 5V, VIN- = 0V Do not short the output of the LMC7225 to voltages greater than 10V or damage may occur. AC Electrical Characteristics Unless otherwise specified, TJ = 25C, V+ = 5V, V- = 0V, VCM = V+/2 Symbol Parameter Conditions LMC7215 Typ (1) LMC7225 Typ (1) (2) Units trise Rise Time Overdrive = 10 mV (2) 1 12.2 s tfall Fall Time Overdrive = 10 mV (2) 0.4 0.35 s (1) (2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not specified on shipped production material. All measurements made at 10 kHz. A 100 k pull-up resistor was used when measuring the LMC7225. CLOAD = 50 pF including the test jig and scope probe. The rise times of the LMC7225 are a function of the R-C time constant. Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7215 LMC7225 Submit Documentation Feedback 3 LMC7215, LMC7225 SNOS882E - SEPTEMBER 1999 - REVISED MARCH 2013 www.ti.com AC Electrical Characteristics (continued) Unless otherwise specified, TJ = 25C, V+ = 5V, V- = 0V, VCM = V+/2 Symbol tPHL Parameter Propagation Delay (High to Low) Conditions See (2) (3) V+ = 2.7V (2) tPLH Propagation Delay (Low to High) See (2) (3) V+ = 2.7V (2) (3) 4 (3) (3) LMC7215 Typ (1) LMC7225 Typ (1) (2) Units Overdrive = 10 mV 24 24 s Overdrive = 100 mV 12 12 Overdrive = 10 mV 17 17 Overdrive = 100 mV 11 11 Overdrive = 10 mV 24 29 Overdrive = 100 mV 12 17 Overdrive = 10 mV 17 22 Overdrive = 100 mV 11 16 s s s Input step voltage for the propagation measurements is 100 mV. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7215 LMC7225 LMC7215, LMC7225 www.ti.com SNOS882E - SEPTEMBER 1999 - REVISED MARCH 2013 Typical Performance Characteristics TA= 25C unless otherwise specified Supply Current vs. Supply Voltage Prop Delay vs. VSUPPLY Figure 3. Figure 4. Prop Delay vs. Overdrive Short Circuit Current vs. VSUPPLY Figure 5. Figure 6. Output Voltage vs. Output Current LMC7215 Output Voltage vs. Output Current Figure 7. Figure 8. Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7215 LMC7225 Submit Documentation Feedback 5 LMC7215, LMC7225 SNOS882E - SEPTEMBER 1999 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) TA= 25C unless otherwise specified 6 Output Voltage vs. Output Current LMC7215 Output Voltage vs. Output Current Figure 9. Figure 10. Output Leakage Current vs. Output Voltage LMC7225 Output Leakage Current vs. Output Voltage LMC7225 Figure 11. Figure 12. Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7215 LMC7225 LMC7215, LMC7225 www.ti.com SNOS882E - SEPTEMBER 1999 - REVISED MARCH 2013 APPLICATION INFORMATION RESPONSE TIME Depending upon the amount of overdrive, the delay will typically be between 10 s to 200 s. The curve showing delay vs. overdrive in the " Typical Characteristics" section shows the delay time when the input is preset with 100 mV across the inputs and then is driven the other way by 1 mV to 500 mV. The transition from high to low or low to high is fast. Typically 1 s rise and 400 ns fall. With a small signal input, the comparators will provide a square wave output from sine wave inputs at frequencies as high as 25 kHz. Figure 13 shows a worst case example where a 5 mV sine wave is applied to the input. Note that the output is delayed by almost 180. Figure 13. NOISE Most comparators have rather low gain. This allows the output to spend time between high and low when the input signal changes slowly. The result is the output may oscillate between high and low when the differential input is near zero. The exceptionally high gain of these comparators, 10,000 V/mV, eliminates this problem. Less then 1 V of change on the input will drive the output from one rail to the other rail. If the input signal is noisy, the output cannot ignore the noise unless some hysteresis is provided by positive feedback. Figure 14. Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7215 LMC7225 Submit Documentation Feedback 7 LMC7215, LMC7225 SNOS882E - SEPTEMBER 1999 - REVISED MARCH 2013 www.ti.com INPUT VOLTAGE RANGE The LMC7215/25 have input voltage ranges that are larger than the supply voltage ensures that signals from other parts of the system cannot overdrive the inputs. This allows sensing supply current by connecting one input directly to the V+ line and the other to the other side of a current sense resistor. The same is true if the sense resistor is in the ground return line. Sensing supply voltage is also easy by connecting one input directly to the supply. The inputs of these comparators are protected by diodes to both supplies. This protects the inputs from both ESD as well as signals that greatly exceed the supply voltages. As a result, current will flow through these forward biased diodes whenever the input voltage is more than a few hundred millivolts larger than the supplies. Until this occurs, there is essentially no input current. As a result, placing a large resistor in series with any input that may be exposed to large voltages, will limit the input current but have no other noticeable effect. If the input current is limited to less than 5 mA by a series resistor, (see Figure 14), a threshold or zero crossing detector, that works with inputs from as low as a few millivolts to as high as 5,000V, is made with only one resistor and the comparator. INPUTS As mentioned above, these comparators have near zero input current. This allows very high resistance circuits to be used without any concern for matching input resistances. This also allows the use of very small capacitors in R-C type timing circuits. This reduces the cost of the capacitors and amount of board space used. CAPACITIVE LOADS The high output current drive allows large capacitive loads with little effect. Capacitive loads as large as 10,000 pF have no effect upon delay and only slow the transition by about 3 s. OUTPUT CURRENT Even though these comparators use less than 1 A supply current, the outputs are able to drive very large currents. The LMC7215 can source up to 50 mA when operated on a 5V supply. Both the LMC7215 and LMC7225 can sink over 20 mA. (See the graph of Max IO vs. VSUPPLY in the " Typical Characteristics" section.) This large current handling ability allows driving heavy loads directly. LEDs, beepers and other loads can be driven easily. The push-pull output stage of the LMC7215 is a very important feature. This keeps the total system power consumption to the absolute minimum. The only current consumed is the less than 1 A supply current and the current going directly into the load. No power is wasted in a pull-up resistor when the output is low. The LMC7225 is only recommended where a level shifting function from one logic level to another is desired, where the LMC7225 is being used as a drop-in lower power replacement for an older comparator or in circuits where more than one output will be paralleled. POWER DISSIPATION The large output current ability makes it possible to exceed the maximum operating junction temperature of 85C and possibly even the absolute maximum junction temperature of 150C. The thermal resistance of the 8-pin SOIC package is 165C/W. Shorting the output to ground with a 2.7V supply will only result in about 5C rise above ambient. The thermal resistance of the much smaller 5-Pin SOT-23 package is 325C/W. With a 2.7V supply, the raise is only 10.5C but if the supply is 5V and the short circuit current is 50 mA, this will cause a raise of 41C in the 8Pin SOIC and 81C in the 5-Pin SOT-23. This should be kept in mind if driving very low resistance loads. 8 Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7215 LMC7225 LMC7215, LMC7225 www.ti.com SNOS882E - SEPTEMBER 1999 - REVISED MARCH 2013 SHOOT-THROUGH Shoot-through is a common occurrence on digital circuits and comparators where there is a push-pull output stage. This occurs when a signal is applied at the same time to both the N-channel and P-channel output transistors to turn one off and turn the other on. (See Figure 15.) If one of the output devices responds slightly faster than the other, the fast one can be turned on before the other has turned off. For a very short time, this allows supply current to flow directly through both output transistors. The result is a short spike of current drawn from the supply. Figure 15. Figure 16. RS = 100 The LMC7215 produces a small current spike of 300 A peak for about 400 ns with 2.7V supply and 1.8 mA peak for 400 ns with a 5V supply. This spike only occurs when the output is going from high to low. It does not occur when going from low to high. Figure 16 and Figure 17 show what this current pulse looks like on 2.7V and 5V supplies. The upper trace is the output voltage and the lower trace is the supply current as measured with the circuit in Figure 18. If the power supply has a very high impedance, a bypass capacitor of 0.01 F should be more than enough to minimize the effects of this small current pulse. Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7215 LMC7225 Submit Documentation Feedback 9 LMC7215, LMC7225 SNOS882E - SEPTEMBER 1999 - REVISED MARCH 2013 www.ti.com Figure 17. RS = 10 Figure 18. LATCH-UP In the past, most CMOS IC's were susceptible to a damaging phenomena known as latch-up. This occurred when an ESD current spike or other large signal was applied to any of the pins of an IC. The LMC7215 and LMC7225 both are designed to make them highly resistant to this type of damage. They have passed qualification tests with input currents on any lead up to 300 mA at temperatures up to 125C. SPICE MODELS For a SPICE model of the LMC7215, LMC7225 and many other op amps and comparators, visit www.ti.com. 10 Submit Documentation Feedback Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7215 LMC7225 LMC7215, LMC7225 www.ti.com SNOS882E - SEPTEMBER 1999 - REVISED MARCH 2013 REVISION HISTORY Changes from Revision D (March 2013) to Revision E * Page Changed layout of National Data Sheet to TI format .......................................................................................................... 10 Copyright (c) 1999-2013, Texas Instruments Incorporated Product Folder Links: LMC7215 LMC7225 Submit Documentation Feedback 11 PACKAGE OPTION ADDENDUM www.ti.com 17-Mar-2017 PACKAGING INFORMATION Orderable Device Status (1) LMC7215IM/NOPB Package Type Package Pins Package Drawing Qty ACTIVE SOIC D 8 95 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMC72 15IM (4/5) LMC7215IM5 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 C02B LMC7215IM5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 C02B LMC7215IM5X NRND SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 85 C02B LMC7215IM5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 C02B LMC7215IMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMC72 15IM LMC7215QIM5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 C02Q LMC7215QIM5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 C02Q LMC7225IM5 NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 85 C03B LMC7225IM5/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 C03B LMC7225IM5X/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 C03B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 17-Mar-2017 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LMC7215, LMC7215-Q1 : * Catalog: LMC7215 * Automotive: LMC7215-Q1 NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product * Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LMC7215IM5 SOT-23 DBV 5 1000 178.0 8.4 LMC7215IM5/NOPB SOT-23 DBV 5 1000 178.0 LMC7215IM5X SOT-23 DBV 5 3000 178.0 LMC7215IM5X/NOPB SOT-23 DBV 5 3000 LMC7215IMX/NOPB SOIC D 8 W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMC7215QIM5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMC7215QIM5X/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMC7225IM5 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMC7225IM5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMC7225IM5X/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMC7215IM5 SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7215IM5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7215IM5X SOT-23 DBV 5 3000 210.0 185.0 35.0 LMC7215IM5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMC7215IMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMC7215QIM5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7215QIM5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMC7225IM5 SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7225IM5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMC7225IM5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 MAX 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/C 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. www.ti.com EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/C 04/2017 NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/C 04/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.com PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 MAX 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/C 04/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. www.ti.com EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/C 04/2017 NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/C 04/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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