December 1996 - Linear Technology

DECEMBER 1996 VOLUME VI NUMBER 4

IN THIS ISSUE . . .

COVER ARTICLE

LTC

1409/LTC1415 High Speed,

Low Power 12-Bit ADCs ............ 1

Kevin R. Hoskins

Issue Highlights ...................... 2

LTC in the News ....................... 2

DESIGN FEATURES

LTC1553 Synchronous Regulator

Controller Powers Pentium

Pro

and Other Big Processors......... 3

Y.L. Teo, S.H. Lim and Craig Varga

The LT

1575/LT1577 UltraFast™

Linear Regulator Controllers

Eliminate Bulk Output Capacitors

................................................ 9

Anthony Bonte

LTC1479 PowerPath™ Controller

Simpliﬁes Portable Power

Management Design............... 14

Tim Skovmand

New Rail-to-Rail Ampliﬁers:

Precision Performance from

Micropower to High Speed

.............................................. 18

William Jett and Danh Tran

High Efﬁciency, Low Dropout

Lithium-Ion Battery Charger

Charges Up to Five Cells at

4 Amps or More ...................... 23

Fran Hoffart

LTC1069-X: a New Family of 8th

Order Monolithic Filters ........ 27

Nello Sevastopoulos and Philip Karantzalis

DESIGN IDEAS

Micropower ADC and DAC in SO-8

Give PC 12-Bit Analog Interface

.............................................. 30

Kevin R. Hoskins

High Efﬁciency, Low Power,

3-Output DC/DC Converter...... 33

John Seago

Synchronizing LTC1430s

for Reduced Ripple ................ 34

Craig Varga

DESIGN INFORMATION

New Voltage References Are

Smaller and More Precise ...... 35

John Wright

New Device Cameos................ 38

Design Tools .......................... 39

Sales Offices .......................... 40

, LTC and LT are registered trademarks of Linear Technology Corporation. Adaptive Power, Burst Mode, C-Load,

LinearView, Micropower SwitcherCAD, PowerPath and UltraFast are trademarks of Linear Technology Corporation.

Pentium is a registered trademark of Intel Corp. Other product names may be trademarks of the companies that

manufacture the products.

continued on page 20

LTC1409/LTC1415

High Speed, Low Power

12-Bit ADCs

High Speed, Less Power

Expanding the family of high speed,

low power dissipation 12-bit ADCs

that began with the LTC1410, LTC

recently introduced the LTC1409 and

the LTC1415, increasing the number

of high speed, low power ADCs avail-

able to designers of high speed data

acquisition systems. With these new

choices, a designer can pick an ADC

that is optimized for his or her par-

ticular application. The LTC1409 and

LTC1415 are ideal solutions for

applications such as ADSL, HDSL,

modems, direct downconversion,

CCD imaging, DSP-based vibra-

tion analysis, waveform digitizers and

multiplexed systems.

The new LTC1409 and LTC1415

have much lower power dissipation

and higher performance than other

12-bit ADCs currently on the mar-

ket. The LTC1409 and LTC1415

dissipate just 80mW and 60mW, re-

spectively. Package size is also a major

advantage of the LTC1409 and

LTC1415, since they are available in

9041CTL5141CTL

tuphguorhTnoisrevnoCspsk008spsM2.1

noitapissiDrewoPwoL(Wm08±)ylppusV5)seilppusV5+(Wm06

sedoMPEELSdnaPAN ✔✔

—egakcaPllamS

POSSnip-82 ✔✔

Table 1. LTC1409/LTC1415 key features

by Kevin R. Hoskins

28-pin SO and SSOP packages. Some

of the other key features of these new

devices are shown in Table 1.

Performance

Enhancing Features

Differential S/H

and Wideband CMRR

Like the LTC1410, the LTC1409 and

LTC1415 have fully differential inputs.

The differential inputs have a very

good CMRR: 60dB or better over a 0-

to-10MHz bandwidth. The bandwidth

of the input sample-and-hold is typi-

cally 30MHz. All of these features

combine to create improved solutions

for present and future data- or signal-

acquisition systems.

Figure 1 is a block diagram of the

LTC1409 and LTC1415. The out-

standing conversion speed and

accuracy of these parts is the result of

the high performance differential

sample-and-hold and the extremely

LINEAR TECHNOLOGY

Linear Technology Magazine • December 1996

EDITOR'S PAGE

Issue Highlights

LTC in the News...

This issue of Linear Technology is

loaded with new products. Our cover

article introduces a pair of new high

speed, low power 12-bit ADCs, the

LTC1409 and LTC1415. These new

parts offer conversion rates of 800ksps

and 1.2Msps respectively and have

much lower power dissipation than

other ADCs currently on the market.

This makes them ideal for applica-

tions such as ADSL, HDSL, modems,

CCD imaging and the like.

Power products feature promi-

nently in this issue: the LTC1553, a

synchronous switching regulator con-

troller, is designed to convert 5V/12V

“silver box” supplies to the low volt-

ages required by the Intel Pentium

processor and other big CPUs. An

onboard 5-bit DAC conforms to the

requirements of the Intel Pentium Pro

processor power supply speciﬁcation,

making the LTC1553 a perfect ﬁt in

these applications. The LTC1553, like

the LTC1430, provides current-limit

and short-circuit protection without

the use of an external sense resistor.

Also featured in this issue is the

new LT1575/LT1577 family of con-

troller ICs. These new, easy-to-use

devices drive discrete N-channel

MOSFETs as source followers to pro-

duce extremely low dropout, UltraFast

transient response regulators. These

circuits completely eliminate expen-

sive tantalum or bulk electrolytic

capacitors in the most demanding

microprocessor applications. For ex-

ample, a 200MHz Pentium processor

can operate with only the twenty-four

1µF ceramic capacitors that Intel al-

ready requires for the microprocessor.

Another power control device for

computer applications is introduced

in this issue: The LTC1479

PowerPath™ controller eliminates

power-management nightmares that

plague the dual rechargeable battery

systems found in most notebook com-

puters and other portable equipment.

Finally, we have the LT1620, an IC

designed to be used with a current

mode PWM controller (such as the

LTC1435) to increase the output volt-

age range and optimize the circuit for

battery charging applications. In this

article, the LT1620 and LTC1435 are

featured in a high current, high

performance constant-voltage/con-

stant-current battery charger for

lithium-ion and other battery types.

Several new additions to LTC’s fam-

ily of rail-to-rail op amps are presented

herein. These include the LT1498/

LT1499 C-Load™ op amps, which

feature a 10MHz gain-bandwidth

product, 4V/µs slew rate and the

ability to drive 10,000pF; the low

current LT1466–69, with quiescent

current of only 50µA; and the high

precision LT1218A/LT1219A, featur-

ing V

trimmed to 100µV max.

Filters are represented in this issue

by the LTC1069-X, a family of

semicustom ﬁlters that can integrate

any single 8th order or dual 4th order

classical ﬁlter approximation, or any

application-speciﬁc ﬁlter response, in

an SO-8 package.

This issue includes a modest col-

lection of Design Ideas: a 12-bit analog

interface for the PC, based on the

LTC1298 ADC and LTC1446 DAC,

with sample code; a low power, 3-

output DC/DC converter built around

the LTC1435; and a technique for

synchronizing two LTC1430 buck

regulators for reduced output ripple.

We conclude with Design Information

on the LT1460 and LT1236 voltage

references, and a page of New Device

Cameos.

Linear Technology Corp.

Reports Steady Sales and

Profits for Q1 1997 in a Tight

Semiconductor Environment

Linear Technology Corporation’s net

sales for its first quarter, ended

September 29, 1996, were

$90,063,000, an increase of 4% over

the first quarter of the previous

year.

The Company also reported net

income for the quarter of

$31,358,000 or $0.40 per share, an

increase of 3% over $30,520,000 or

$0.39 per share, reported for the

first quarter of last year. A cash

dividend of $0.05 per share will be

paid on November 13, 1996 to share-

holders of record on October 25,

1996.

According to Robert H. Swanson,

president and CEO, “Despite a slug-

gish semiconductor environment,

we were able to maintain our net

sales and profitability. Our return

on sales of approximately 35% con-

tinues to lead the industry. We

generated approximately $10 mil-

lion in cash even after paying

approximately $16 million to re-

purchase shares of our own stock.

However, in the short term we con-

tinue to be in an unpredictable en-

vironment whereby reduced backlog

and shorter lead times cause the

business to be very dependent on

orders that are received and shipped

in the same quarter.”

A detailed look at the best-per-

forming stock index of them all—the

Nasdaq 100—reveals that Linear

Technology Corp. is ranked high

again this year among the best-run,

most effective and highest-valued

companies in the nation. Coming in

well above such familiar names as

Altera (70th), Maxim (71st), Micron

(83rd) and Cirrus Logic (84th), Lin-

ear Technology Corp. is listed 52nd

on the Nasdaq 100, with a market

capitalization of more than $2.2

billion as of press time.

The financial performance of LTC

has been so good that one major-

fund manager who prefers bonds to

stocks says that he would make an

exception for LTC. Quoted by

Kathleen Gallagher in her syndi-

cated column “Street Smart,”

Thomas M. Wargin, president of Lib-

erty LaSalle Financial Group, Inc.,

says that he “likes Linear Technol-

ogy, a specialty chip maker whose

stock price dropped (this summer).

He expects its earnings to grow 21%

annually for the next five years.”

Linear Technology Magazine • December 1996

DESIGN FEATURES

LTC1553 Synchronous Regulator

Controller Powers Pentium® Pro

and Other Big Processors

by Y.L. Teo, S.H. Lim and Craig Varga

Introduction

Over the past few years, the operating

voltages of Pentium class and other

modern microprocessors have

dropped from 5V to 3.3V and below,

while operating currents have steadily

increased. Voltage regulation require-

ments have also tightened as the safety

margin between proper operation and

chip destruction has decreased along

with feature size. To complicate mat-

ters further, the newest Pentium Pro

processors from Intel

require a digi-

tally adjustable power supply, so that

the processor itself can determine the

power supply voltage. The “silver box”

power supplies provide only 5V/12V,

with the exception of a few supplies

also capable of delivering 3.3V. Due

to the extreme accuracy and excep-

tionally fast load transient response

required by today’s processor sup-

plies, the supply has been forced onto

the computer’s motherboard. To ﬁt

this niche, Linear Technology intro-

duces the LTC1553, a synchronous

switching regulator controller de-

signed to convert the 5V/12V “silver

box” rails to the lower 1.80V–3.5V

required by the CPU. An onboard 5-

bit DAC conforms to the requirements

of the Intel Pentium Pro processor

power supply speciﬁcation, making

the LTC1553 a perfect ﬁt in these

applications.

The LTC1553 is the newest mem-

ber of the LTC switching regulator

family. It shares many performance

features with the popular LTC1430,

including excellent (±1%) output regu-

lation over temperature, line voltage

and load current variations. The

LTC1553, like the LTC1430, provides

current-limit and short-circuit pro-

tection without the use of an external

sense resistor. This is accomplished

by measuring the voltage drop across

the external high-side MOSFET dur-

ing its on-time. To compliment the

main voltage-feedback loop, the

LTC1553 includes two additional feed-

back loops to provide good large-signal

transient response. The LTC1553

adds additional internal circuits to

conform to the Intel Pentium Pro pro-

cessor power converter requirements

while minimizing the number of ex-

ternal components. An on-chip 5-bit

4DIV3DIV2DIV1DIV0DIV)CDV(

01111*

01110*

01101*

01100*

01011*

01010*

01001*

01000*

00111*

00110*

00101 08.1

00100 58.1

00011 09.1

00010 59.1

00001 00.2

00000 50.2

11111 UPCoN

11110 1.2

11101 2.2

11100 3.2

11011 4.2

11010 5.2

11001 6.2

11000 7.2

10111 8.2

10110 9.2

10101 0.3

10100 1.3

10011 2.3

10010 3.3

10001 4.3

10000 5.3

noisnapxeerutufrofdevreseR*

Table 1. Output voltage vs VIDn code

Linear Technology Magazine • December 1996

DESIGN FEATURES

digital-to-analog converter (DAC) pro-

vides output voltages conforming to

Intel’s speciﬁcations. This allows the

LTC1553 to read the code sent by the

processor and provide it with the re-

quested voltage. The LTC1553 also

provides a power-good indication

(PWRGD) to the system. There is also

an on-chip overvoltage protection cir-

cuit that latches the regulator in an

off state if the output voltage ever

rises 15% or more above

the DAC-requested voltage.

Over-

temperature protection is available

with only two external components (a

resistor and a thermistor) connected

to the OUTEN pin.

In applications with other proces-

sors, the four DAC inputs can be

routed to a jumper block, zero ohm

resistors or a DIP switch, or hard

wired, to set the desired output volt-

age. This allows the output voltage to

be programmed easily in steps while

eliminating the need to stock an as-

sortment of precision resistors. This

ﬂexibility in output voltage setting is

cheap insurance against last-minute

power supply voltage changes by mi-

croprocessor manufacturers.

LTC1553 Overview

The LTC1553 runs at a ﬁxed switch-

ing frequency, nominally 300kHz,

without any external oscillator

components. The on-chip, 5-bit digi-

tal-to-analog converter (DAC) allows

the output voltage to be adjusted

from 1.80V to 3.5V, as shown in Table

1. Voltage mode control eliminates

the need for a current sense resistor.

Current limiting is maintained by

sensing the voltage drop across the

DS(ON)

of the high-side MOSFET. The

output enable pin employs a multi-

level voltage threshold scheme that

permits overtemperature sensing as

well as providing the normal enable

function.

The LTC1553 is designed to be

used with an all-N-channel MOSFET,

synchronous buck regulator topol-

ogy. The gate drive is able to

signiﬁcantly exceed the main power

supply voltage. This allows the high-

side N-channel MOSFET(s) to be fully

enhanced, ensuring low R

DS(ON)

and

maximum efﬁciency. The driver out-

puts can source and sink enough

current to drive multiple, paralleled

power MOSFETs if desired, in order

to obtain very low conduction losses.

Low loss operation eliminates the need

for a heat sink in most applications

and results in very high efﬁciency. A

soft-start circuit is included on the

chip, permitting the rate of rise of the

output voltage at turn-on to be

controlled.

Internal DAC and

Output Voltage Accuracy

An on-chip 5-bit DAC is used to set

the output voltage. No external feed-

back resistors are required. Five TTL

inputs (VID0, VID1, VID2, VID3 and

VID4) program the internal DAC (see

Table 1). Each of the VIDn pins has an

internal pull-up resistor to ensure a

high state if it is not connected. When

all the VIDn pins are in the high state,

the LTC1553 shuts down, forcing the

output voltage to zero and dropping

the quiescent current to approxi-

mately 150µA. The ten lowest voltage

codes are disabled at this time, allow-

ing for future expansion. The DAC

accuracy, initial reference voltage tol-

erance and internal feedback resistor

tolerances result in a maximum ini-

tial output voltage error of ±1% of the

selected output voltage. The line and

load regulation plus temperature drift

over the 0°C to 70°C temperature

range will contribute another ±1% to

the output error budget. This gives a

total static operating error of less

than ±2%, providing sufﬁcient head-

room (3%) for the dynamic response

to remain within a ±5% output voltage

tolerance, while still requiring a

reasonable amount of output

capacitance.

External MOSFET Drivers

The on-chip output drivers are pow-

ered from the PV

pin, which is

speciﬁed with a 20V maximum sup-

ply voltage. The PV

supply should

be at least 5V higher than the main

supply to allow the G1 output

driver to fully enhance a high-side

N-channel MOSFET. A major advan-

tage of the LTC1553 over some

competing devices results from its

CMOS implementation: full rail-to-

rail gate drive provides as much as 2V

more drive than would a bipolar de-

sign. This results in a 20%–25% lower

DS(ON)

for a given MOSFET. Figure 1a

shows a typical LTC1553 circuit with

powered from a 12V supply and

the main V

powered from a high

power 5V supply. This provides 7V of

enhancement for the high-side switch.

The amount of current required of the

12V supply varies with the amount of

MOSFET gate capacitance and will

typically be less than 50mA. If a 12V

supply is not available, the gate drive

voltage can be generated with a simple

charge-pump. Figure 1b shows a dou-

bler charge-pump used to generate

the PV

voltage in a 5V-only system.

A tripler charge-pump (Figure 1c) may

be used in circuits where a higher

voltage is required to fully enhance

the external MOSFETs.

1552_01a.eps

LTC1553

VCC

PVCC

= 5V

= 12V V

= 5V

OUT

1552_01b.eps

LTC1553

1N5248B*

18V

*OPTIONAL FOR V

> 5V

1N5817

0.1µF

OUT

Figure 1a. Typical LTC1553 circuit with PV

powered from a 12V supply and main V

powered from a high power 5V supply

Figure 1b. A doubler charge pump generates

the PV

voltage for a system powered from a

single 5V supply.

Linear Technology Magazine • December 1996

DESIGN FEATURES

Note that if V

is 10V or higher, a

standard doubling charge-pump will

cause the PV

pin to exceed its 20V

limit. Such circuits should use an

alternate 17V charge-pump circuit

(see Figure 1d). In any circuit where

transient spikes at the PV

pin may

approach the 20V maximum rating,

an 18V Zener diode is recommended

from PV

to GND (Figures 1b–1d).

Multiple Feedback Loops

Improve Transient Response

The LTC1553 uses a standard voltage

feedback loop to control the output

voltage (see Figure 2). The error

ampliﬁer, ERR, compares the resis-

tor-divided output voltage at FB to

the internal reference voltage, V

REF

This reference is controlled by the

internal DAC. The resulting error volt-

age is ampliﬁed by the error ampliﬁer.

A pulse width modulated (PWM) sig-

nal is generated by comparing the

error signal with a sawtooth wave-

form from the internal oscillator. This

PWM and its complement signal drive

the gates of power switches Q1 and

Q2, respectively. Feedback loop com-

pensation is set with an external

compensation network at the COMP

pin. Voltage mode control eliminates

the need for a high loss, high cost,

external sense resistor required by a

typical current mode design.

In addition to the main feedback

loop, the LTC1553 also includes two

additional “safety belt” comparators

(MIN and MAX in Figure 2). In gen-

eral, a control loop’s bandwidth, and

hence its slew rate, is limited by

stability considerations. In some

instances, it may be desirable to have

the ability to respond to events faster

than the error ampliﬁer is capable of

slewing. The MIN/MAX comparators

provide this capability. These two

comparators help to prevent extreme

output perturbations with fast load

current transients, while allowing the

main feedback loop to be optimally

compensated for stability. The MAX

loop responds when the output

exceeds the set point by more than

5%, forcing the duty cycle to 0% and

holding Q2 on until the output drops

back into the acceptable range. Simi-

larly, if the output voltage sags 5%

below the set point, the MIN loop

kicks in, forcing the Q1 to 85% duty

cycle until the output recovers. The

95% maximum duty cycle ensures

that the gate drive charge-pump (if

used) is refreshed every cycle. The

response times of the MIN and MAX

comparators are controlled to prevent

them from triggering on noise spikes.

Soft-Start and Current Limit

Just one external capacitor is needed

at the SS pin to set the soft-start time.

During start-up, Q1 and Q2 are

switched off until the input voltage

has risen to the threshold of an inter-

nal undervoltage lockout circuit. The

soft-start capacitor is then charged

by an internal 10µA current source.

The soft-start function overrides the

error ampliﬁer and takes control of

the pulse width modulator. As the SS

pin voltage rises, the LTC1553’s G1

duty cycle increases slowly until the

output voltage is in regulation, at

which point control is transferred to

the voltage feedback loop.

A signiﬁcant advantage of employ-

ing voltage mode control in the

LTC1553 is the elimination of the

current sense resistor found in most

other designs. With this resistor goes

the simple means of providing over-

current protection. Instead, the

LTC1553 sets the output current limit

by monitoring the voltage drop across

the R

DS(ON)

of the high-side MOSFET,

Q1, during its ON state (see Figure 3).

The current limit is controlled by set-

ting the maximum voltage drop

allowed across Q1 with a single exter-

nal resistor, R

IMAX

, at the I

MAX

pin. An

internal 180µA current sink forces a

voltage across R

IMAX

. This voltage is

compared to the voltage drop across

Q1 during its on-time. The I

connects to the source of Q1 and

Kelvin senses the voltage drop across

Q1. For V

= 12V, a 15V Zener diode

(1N5245B or equivalent) will prevent

voltage spikes at I

from exceeding

the maximum voltage rating. The cur-

rent limit is designed to engage slowly

1552_01C.eps

LTC1553

1N5248B

18V

= 5V

1N5817

0.1µF

1N5817

10µF0.1µF

1N5817

OUT

1552_01d.eps

LTC1553

VCC

= 5V

1N5817

1N5248B

18V

10Ω

= 12V

0.1µF

OUT

Figure 1c. A tripler charge pump provides more gate drive for the

external MOSFETs. Figure 1d. An alternate 17V charge pump circuit prevents PV

from

exceeding its 20V limit.

Linear Technology Magazine • December 1996

DESIGN FEATURES

under mild current overloads,

allowing the LTC1553 circuit to with-

stand momentary overloads without

seriously affecting the output

regulation.

When an overcurrent condition is

sensed, the output current compara-

tor, C

, starts pulling current out of

the external soft-start capacitor. This

starts lowering the duty cycle and

regulating the output current. Under

severe overloads or output short-cir-

cuit conditions, a “hard” current-limit

circuit is activated. An internal switch

(MHCL in Figure 2) pulls down the SS

pin immediately, stopping all switch-

ing and preventing damage to the

output components. After a short time

delay, the SS pin is released and the

LTC1553 reruns a soft-start cycle,

attempting to restart. If the over-

current condition is still present, the

cycle repeats until the fault is re-

moved. If desired, current limit can be

disabled by ﬂoating I

MAX

and tying I

to V

Power-Good and

Overvoltage Signals

The LTC1553 provides a power good

signal (PWRGD) to the host system to

indicate that the output voltage is

within ±5% of the set voltage. PWRGD

is valid whenever both the MIN and

MAX comparators are inactive. An

internal time delay is designed to pre-

vent noise at the sense pin from

toggling PWRGD unnecessarily. After

the output has settled to within ±5%

of the rated output for more than

300µs, PWRGD is set to a logic high.

Similarly, PWRGD will go low only

after the output is out of regulation

for more than 100µs.

Severe overvoltage faults at the

output will trigger the FAULT ﬂag. If

the output voltage rises 15% higher

than the programmed voltage, G1 and

G2 will be disabled and the FAULT

pin will go low. FAULT can be used to

ﬁre an external crowbar SCR or MOS-

FET to pull down the errant supply

and protect the CPU from damage.

When the LTC1553 detects an over-

voltage, the fault ﬂag’s low state is

latched, holding the regulator off. To

restore normal operation, the OUTEN

pin must be toggled or the input power

removed and then restored. The most

likely cause of an overvoltage fault is

1552_02.eps

REF

+ 5%

PWM

MAX

–

50% VREF

VID0

DELAY

LOGIC

FAULT

PWRGD

PGND

DACFB

SENSE

VID1

VID2

VID3

–

HCL MONOMHCL

MSD

LVC

VID4

–

REF

– 5%

MIN

–

REF

–

115% VREF

OUTEN

COMP

–

DISDR

SGND

REF

ERR MIN MAX

10%

Figure 2. LTC1553 block diagram

Linear Technology Magazine • December 1996

DESIGN FEATURES

a shorted high-side MOSFET. There-

fore, activating some form of external

clamp is preferable to depending on

the LTC1553 to shut the supply down,

as the controller will be unable to

turn off a shorted FET.

Overtemperature Protection

The OUTEN pin is an active-high digi-

tal input that enables the G1 and G2

MOSFET driver outputs. When

OUTEN is pulled to a TTL low level,

both G1 and G2 pull to ground, shut-

ting off the external MOSFETs and

leaving the output in a high imped-

ance state. OUTEN is designed with

multiple thresholds to allow it to also

be used for overtemperature protec-

tion. The power MOSFET operating

temperature can be monitored with

an external negative temperature

coefﬁcient (NTC) thermistor mounted

next to the external MOSFET that is

expected to run the hottest—usually

the high-side device, Q1. Electrically,

the thermistor should form a voltage

divider with another resistor (R1)

connected to V

. Their midpoint is

connected to OUTEN (see Figure 4).

As the thermistor temperature

increases, the OUTEN pin voltage is

reduced. Under normal operating

conditions, the OUTEN pin should

stay above 2V. All circuits will function

normally and the OT (overtem-

perature) pin will remain in a high

state. If the temperature gets abnor-

mally high, the OUTEN pin voltage

will eventually drop below 2V. OT will

switch to a logic low, providing an

overtemperature warning to the sys-

tem. As OUTEN drops below 1.7V, the

LTC1553 disables both FET drivers.

This shuts the driver supply down,

preventing any further heating. If the

OUTEN pin is pulled below 1.2V, the

LTC1553 will enter shutdown mode.

All internal switching stops, the

COMP, SS, OT and PWRGD pins pull

to ground and the quiescent current

is reduced to 150µA. This residual

quiescent current keeps the ther-

mistor sensing circuit at OUTEN alive

to allow the circuit to recover once it

cools down. If the overtemperature

protection circuit is not required, the

OUTEN pin can be connected directly

to a TTL compatible signal.

Oscillator Synchronization

The LTC1553’s internal oscillator can

be synchronized to an external clock

frequency higher than 300kHz. This

is accomplished by connecting a TTL-

level external clock signal to OUTEN.

Note that if OUTEN is used for syn-

chronization, it cannot be used for

temperature monitoring. Also, if the

operating frequency is forced sub-

stantially higher than 300kHz, the

gain of the main feedback loop will

increase and the compensation net-

work may have to be readjusted for

optimum performance.

Typical Application

A typical application for LTC1553 is

converting 5V to 1.8V–3.5V in a Pen-

tium Pro processor based personal

computer. The supply may be in the

form of a voltage regulator module

(VRM) or may be implemented di-

rectly on the motherboard. The output

is used to power the Pentium Pro

processor and the input is taken from

the system’s 5V supply. The circuit

shown in Figure 6 provides 1.80V–

3.5V at 14A while maintaining output

regulation within ±1%. The output

voltage is determined by connecting

the five DAC inputs to the VID pins of

the processor. The power MOSFETs

are sized to minimize board space

and allow operation without the need

of a heat sink. With proper airﬂow,

ambient temperature conditions of

up to 50˚ Celsius are acceptable. Typi-

cal efﬁciency is above 90% from 1A to

10A at 3.3V out. (see Figure 7). Achiev-

ing higher output currents from

LTC1553 based designs is simply a

matter of selecting appropriate MOS-

FETs and passive components.

It pays to look at the regulator

design from two perspectives: electri-

cal and thermal. Most processor

applications operate at average cur-

rents that are approximately 80% or

less of the speciﬁed peak current. As

such, the thermal design can be based

1552_03.eps

LTC1553

MAX

100µA

IMAX

–

OUT

1N5245B*

* FOR V

= 12V 

 APPLICATIONS

1552_04.eps

Pentium Pro

Processor

SYSTEM

LTC1553

THERMISTOR SHOULD BE PHYSICALLY CLOSE TO Q1

= 5V

OUT

OUTEN

THERMISTOR

5.6k

G2 C

1552_05.eps

1.2V 1.7V

OUTEN PIN VOLTAGE

2.0V

MODE OF OPERATION

SHUTDOWN

G1, G2 DRIVERS STOP

OT TRIPS

NORMAL OPERATION

Figure 3. Current-limit setting for

the LTC1553 Figure 4. Using the OUTEN pin for overtemperature protection

Figure 5. The OUTEN pin provides three

threshold levels for temperature monitoring.

Linear Technology Magazine • December 1996

DESIGN FEATURES

on the lower current level. Higher

currents, while present, are typically

not of sufﬁcient duration to signiﬁ-

cantly heat the power devices. The

design does, however, need to be

capable of delivering the peak current

without entering current limit or

resulting in device failures. Keep in

mind that the power dissipation in a

resistive element, such as a MOSFET,

varies as the square of load current.

As such, raising the load current from

80% to 100% translates to approxi-

mately 56% more power dissipation

(1/0.8

). Designing for this higher

thermal load results in a huge, and

most likely unnecessary, design mar-

gin. A good understanding of your

system requirements can result in

substantial savings in the size and

cost for the power supply.

IMAX

sets current limit to the

desired level. Add one-half of the in-

ductor ripple current to the maximum

load current to determine the peak

switch current. Multiply this current

by the maximum on-resistance of the

selected MOSFET switch to deter-

mine the minimum current limit

threshold voltage. It’s a good idea to

add at least a 10% margin to this

limit. Also, be sure to use the hot on-

resistance of the MOSFET. A multiplier

of about 1.4 times the room tempera-

ture R

DS(ON)

should be used to

determine the hot resistance.

In the case of two parallel

MTD20N03HDLs (Q1A and Q1B), the

cold resistance is approximately

0.035Ω each; therefore, assume the

hot resistance to be approximately

0.050Ω. Divide this by two because

the FETs are in parallel. The thresh-

old voltage is programmed by

multiplying the I

MAX

pin’s sink cur-

rent by the value of R

IMAX

. Since we

now can determine the required

threshold, we need to calculate the

value of R

IMAX

. Use the speciﬁed mini-

mum sink current, 150µA, to calculate

the resistor value.

The soft-start time is programmed

by the 0.01µF cap connected to the

SS pin. The larger the value of this

capacitor, the slower the turn-on

ramp.

Inductor L

is sized to handle the

full load current, up to the onset of

current limit, without saturating. A

value of between 2µH and 3µH is

adequate for most processor supply

designs. Be careful not to overspecify

the inductor. The inductor need not

retain its no-load inductance up to

the current-limit threshold. If the

inductor still retains on the order of

25% to 30% of its initial inductance

under worst-case short-circuit cur-

rent conditions, the circuit should

prove reliable. However, you do want

to ensure that approximately 60% to

75% of the initial inductance is

retained at nominal full load. Exces-

sive inductance roll-off will result in

higher than expected output ripple

voltage at high loads, along with in-

creased dissipation in the power FETs

and the inductor itself.

Proper loop compensation is criti-

cal for obtaining optimum transient

response while ensuring good stabil-

ity margins. The compensation

network shown here gives good

response when used with the induc-

tor and the output capacitors values

shown in Figure 6. Several low ESR

capacitors are placed in parallel to

reduce the total output ESR, result-

ing in lower output ripple and

improved transient performance.

1552_06.eps

Pentium Pro

Processor

SYSTEM LTC1553

COMP

Q1A, Q1B, Q2: MOTOROLA MTD20N03HDL



2.0µH/18A

= 5V

OUT

PWRGD

Q1A, Q1B

(2 IN PARALLEL)

DALE

NTHS-1206N02

CONNECTING

VID0-VID4

TO DIP SWITCH

TO SET VOUT

SS GND PGND SENSE

MAX

5.6k5.6k R

IMAX

5.6k

1.8k

5V C



2310µF

7 × 330µF

0.1µF

1N5817

10µFC



990µF

3 × 330µF

VID0–VID4

OUTEN



100pF C



0.01µF

0.1µF



0.01µF



20k

FAULT

Figure 6. Typical 5V to 2.1V–3.5V/14A LTC1553 application

LOAD CURRENT (A)

100

EFFICIENCY (%)

100

1552_07.eps

0.1 1 10

Figure 7. Efﬁciency plot for Figure 6’s circuit

continued on page 22

Linear Technology Magazine • December 1996

DESIGN FEATURES

The LT1575/LT1577 UltraFast Linear

Regulator Controllers Eliminate Bulk

Tantalum/Electrolytic Output Capacitors

by Anthony Bonte

Introduction

The current generation of micropro-

cessors places stringent demands on

the input supply that powers the pro-

cessor core. These microprocessors

cycle load current from near zero to

approximately 5 amps in tens of nano-

seconds. Output voltage tolerances

as low as ±100mV include transient

response as part of the speciﬁcation.

Some microprocessors require only a

single input supply voltage to operate

both the core and the I/O circuitry.

Other higher performance processors

require separate power supply volt-

ages for the processor core and the

I/O circuitry. These requirements

demand very accurate, very high speed

regulator circuits.

Solutions employed previously

include monolithic 3-terminal linear

regulators, PNP transistors driven by

low cost control circuits and simple

buck converter switching regulators.

The 3-terminal regulator achieves a

high level of integration, the PNP-

driven regulator achieves low dropout

voltage performance and the switch-

ing regulator achieves high electrical

efﬁciency.

However, the common trait mani-

fested by these solutions is a transient

response time measured in microsec-

onds. This translates into an expensive

regulator output decoupling capaci-

tor scheme. This scheme requires

several hundred microfarads of very

low ESR bulk capacitance compris-

ing multiple capacitors surrounding

the CPU. This bulk capacitance is in

addition to the ceramic decoupling

capacitor network that handles the

transient load response during the

ﬁrst few hundred nanoseconds. The

ceramic capacitors also act as a high

frequency decoupling network to mini-

mize noise associated with fast, high

current spikes. The cost of the output

decoupling capacitors is a signiﬁcant

percentage of the total power supply

cost and the bulk tantalum/electro-

lytic capacitors comprise the majority

of the capacitor cost.

New LTC

Regulator Controllers

The LT1575/LT1577 family of single/

dual controller ICs are new, easy-to-

use devices that drive discrete

N-channel MOSFETs as source fol-

lowers to produce extremely low

dropout, UltraFast™ transient re-

sponse regulators. These circuits

achieve superior regulator bandwidth

and transient load performance, and

completely eliminate expensive tan-

talum or bulk electrolytic capacitors

in the most demanding micropro-

cessor applications. For example, a

200MHz Pentium

processor can op-

erate with only the twenty-four 1µF

ceramic capacitors that Intel already

requires for the microprocessor. Us-

ers realize signiﬁcant savings because

all additional bulk capacitance is re-

moved. The additional savings of

insertion cost, inventory cost and

board space are readily apparent.

Precision-trimmed adjustable and

ﬁxed-output voltage versions accom-

modate any required microprocessor

power supply voltage. Dropout volt-

age can be user deﬁned via selection

of the N-channel MOSFET R

DS(ON)

The only output capacitors required

are the high frequency ceramic

decoupling capacitors. The regulator

responds to transient load changes in

a few hundred nanoseconds—a great

improvement over regulators that

respond in many microseconds. The

ceramic capacitor network generally

consists of ten to twenty-four 1µF

capacitors, depending on individual

microprocessor requirements. The

LT1575/LT1577 family also incorpo-

rates current limiting at no additional

system cost, provides on/off control

and can provide overvoltage protec-

tion or thermal shutdown with the

1

2

3

8

7

6

5



SHDN



GND

OUT

IPOS

INEG

GATE

COMP

C2

1µF

C5

330µF

GND

1575/77 TA01

OUT



3.5V

R2

5Ω

R1

7.5k

12V LT1575-3.5

C4

1000pF

FOR T > 45°C:

C6 = 24 × 1µF X7R 

CERAMIC SURFACE 

MOUNT CAPACITORS.

PLACE C6 IN THE 

MICROPROCESSOR 

SOCKET CAVITY

FOR T ≤ 45°C:

C6 = 24 × 1µF Y5V 

CERAMIC SURFACE 

MOUNT CAPACITORS.

Q1

IRFZ24

C3

10pF

C6*

24µF

Figure 1. UltraFast transient response 5V to 3.5V, low dropout regulator

2A/DIV

50mV/DIV

200µs/DIV

I = 0.2A to 5A

Figure 2. Transient response for 0.2A–5A

output load step

Linear Technology Magazine • December 1996

DESIGN FEATURES

addition of a few simple external com-

ponents. The LT1575 is available in

8-pin SO or PDIP and the LT1577 is

available in 16-pin narrow-body SO.

Figure 1 shows the basic regulator

control circuit. The input voltage is a

standard 5V “silver box” and the out-

put voltage is set to 3.5V, the Pentium

P54 VRE microprocessor supply volt-

age. The typical maximum output

current is about 5A in most Pentium

microprocessor applications. The out-

put capacitor network consists of only

twenty-four inexpensive 1µF ceramic,

surface mount capacitors. Proper lay-

out of this decoupling network is

critical to proper operation of this

circuit. Consult Linear Technology

Application Note 69: Using the LT1575

Linear Regulator Controller, for details

on board layout.

The photo in Figure 2 shows the

transient response performance for

an output load current step of 0.2A to

5A. The main loop compensation in

Figure 1’s regulator circuit is pro-

vided by R1 and C4 at the COMP pin.

Capacitor C3 introduces a high fre-

quency pole and provides adequate

gain margin beyond the unity-gain

crossover frequency of 1MHz. This

compensation network limits over-

shoot/undershoot to 50mV under

worst-case load transient conditions.

With a 1% speciﬁed worst-case out-

put voltage tolerance, the 100mV

output voltage error budget for a P54

VRE microprocessor is easily met with

production margin to spare. All bulk

tantalum/electrolytic capacitors are

completely eliminated.

The discrete N-channel MOSFET

chosen is a low cost International

Rectiﬁer IRFZ24 or equivalent. The

input capacitance is approximately

1000pF with V

= 1V

The speciﬁed

on-

resistance is 0.1Ω at room

tem-

perature and about 0.15Ω at 125˚C.

At 7A output current, the dropout

voltage is only 1.05V. This eases the

restriction on local input decoupling

capacitor requirements because sig-

niﬁcant droop in the typical 5V input

supply voltage is permitted before

dropout voltage operation is reached.

(Note that 5V supply tolerance

1

2

3

8

7

6

5



SHDN



GND

OUT

IPOS

INEG

GATE

COMP

C2

1µF

C5

330µF

GND

1575/77 TA12

OUT



3.3V

R2

5Ω

R3*

0.007Ω

R1

3.9k

12V LT1575-3.3

C4

1500pF

C1

1µF

RESET

R3 IS MADE FROM 

“FREE” PC BOARD 

TRACE

C6 = 12 × 1µF X7R 

CERAMIC SURFACE 

MOUNT CAPACITORS.

PLACE C6 IN THE 

MICROPROCESSOR 

SOCKET CAVITY

*



**

Q2

VN2222L

Q1

IRFZ24

C3

10pF

C6**

12µF

restrictions are typically limited by a

±5% tolerance so that 5V logic sys-

tems will operate correctly.) However,

a simple LC input ﬁlter can eliminate

the need for large input bulk capaci-

tance at the regulator 5V supply for

additional system cost savings.

Figure 3 shows a more complete

system conﬁguration that incorpo-

rates current limiting and current

limit time-out with latch-off. Current

limit is incorporated for no additional

system cost by manufacturing the

current limit resistor from a Kelvin-

sensed section of pc board trace. In

this example, current limit is set to

7A. A capacitor from the SHDN pin to

ground sets a fault condition time-

out period that latches off the drive to

the external MOSFET if the time-out

period is exceeded. The regulator is

reset by pulling the SHDN pin low.

The output voltage in this application

is set to 3.3V. The ±5% tolerance

permitted in 3.3V systems translates

to a ±165mV output-voltage toler-

ance. This permits a 50% reduction

in the number of ceramic capacitors

required from twenty-four to twelve.

Loop compensation is adjusted

accordingly.

Figure 4 shows an application cir-

cuit using the LT1577, a dual

regulator. All functions for each regu-

lator are identical to those of the

LT1575. One section is conﬁgured for

a 3.3V output and the other section is

conﬁgured for a 2.8V output. This

circuit provides all the power require-

ments for a split-plane system: 3.3V

for the logic supply and 2.8V for the

processor-core supply. Both regula-

tor sections use the resistorless

current limit technique. This tech-

nique is discussed in detail below.

Note that both SHDN pins are tied to

a common time-out capacitor. If either

or both regulators encounter a fault

condition, both regulator sections are

latched off after the time-out period is

exceeded.

Block Diagram

Functional Description

Figure 5 is a block diagram of the

ﬁxed voltage LT1575. The primary

block diagram elements comprise a

simple feedback control loop and the

secondary block diagram elements

comprise multiple protection func-

tions. A start-up circuit provides

controlled start-up for the IC, includ-

ing the precision-trimmed bandgap

reference, and establishes all inter-

nal current and voltage biasing.

Precision Reference/Output

Voltage Performance

Reference voltage accuracy for the

adjustable version and output volt-

age accuracy for the ﬁxed-voltage

versions are speciﬁed as ±0.6% at

room temperature and as ±1% over

the full operating temperature range.

This places the LT1575/LT1577 fam-

ily among a select group of regulators

with very tightly speciﬁed output volt-

age tolerances. The accurate 1.21V

reference is tied to the noninverting

input of the main error ampliﬁer in

the feedback control loop.

Figure 3. 5V to 3.3V regulator

Linear Technology Magazine • December 1996

DESIGN FEATURES

Wide-Bandwidth Error Ampliﬁer

Permits Fast Loop Response

The error ampliﬁer consists of a single

high gain g

stage with a

transcon-

ductance equal to 15 millimhos. The

inverting terminal is brought out as

the FB pin in the adjustable voltage

version and as the OUT pin in ﬁxed

voltage versions. The g

stage pro-

vides differential-to-single-ended

conversion at the COMP pin. The out-

put impedance of the g

stage is

about 1M; therefore, 84dB of typical

DC error ampliﬁer open-loop gain

VOL

= g

) is realized along with a

typical 75MHz uncompensated unity-

gain crossover frequency. External

access to the high impedance gain

node of the error ampliﬁer permits

typical loop compensation to be

accomplished with an RC network to

ground.

A high speed, high current output

stage buffers the COMP node and

drives up to 5000pF of effective

MOSFET gate capacitance with al-

most no change in load transient

performance. The output stage deliv-

ers up to 50mA peak when slewing

the MOSFET gate in response to load

current transients. The output

impedance of the GATE pin is typi-

cally 2Ω. This pushes the pole caused

by the error-ampliﬁer output im-

pedance and the MOSFET input

capacitance well beyond the loop

crossover frequency. If the capaci-

tance of the MOSFET used is less

than 1500pF, it may be necessary to

add a small value series gate resistor

of 2Ω–10Ω. This gate resistor helps

damp the LC resonance created by

the MOSFET gate’s lead inductance

and input capacitance. In addition,

the high frequency pole formed by the

gate resistor and the MOSFET input

capacitance can be ﬁne tuned.

Because the MOSFET pass tran-

sistor is connected as a source

follower, the power path gain is much

more predictable than that of designs

employing a discrete PNP transistor

as the pass device. This is because of

the signiﬁcant production variations

encountered with PNP beta. MOSFETs

are also very high speed devices, and

hence are more suitable than PNPs

for creating a stable, wide-bandwidth

control loop. An additional advantage

of the follower topology is inherently

good line rejection. Input supply dis-

turbances do not propagate through

to the output. The feedback loop for a

regulator circuit is completed by pro-

viding an error signal to the FB pin in

the adjustable voltage version and to

the OUT pin in the ﬁxed voltage ver-

sion. In both cases, a resistor divider

network senses the output voltage

and sets the regulated DC bias point.

In general, the LT1575 regulator feed-

back loop permits a loop crossover

frequency on the order of 1MHz while

maintaining good phase and gain

margins. This unity-gain frequency

is a factor of twenty to thirty times the

bandwidth of currently implemented

regulator solutions for microproces-

sor power supplies. This signiﬁcant

performance beneﬁt is what permits

the elimination of all bulk output

capacitance.

High-Side Sense

Current Limiting

Several other unique features in-

cluded in the design increase its

functionality and robustness. These

functions comprise the remainder of

the block diagram.

A high-side sense, current-limit

ampliﬁer provides active current

limiting for the regulator. The cur-

rent-limit ampliﬁer uses an external

low value shunt resistor connected in

series with the external MOSFET’s

drain. This resistor can be a discrete

shunt resistor or can be manufac-

tured from a Kelvin-sensed section of

free PC board trace. All load current

ﬂows through the MOSFET drain,

and thus, through the sense resistor.

The advantage of using high-side cur-

rent sensing in this topology is that

the MOSFET’s gain and the main

C2

330µF

6.3V

C3

0.33µF

C6

1500pF

R2

3.9k

R3

1.21k R4

1.21k

R7

2.1k

R1

3.9ΩR5

3.9Ω

R8

1.6k

C9 TO

C20*

1µF

Q1

IRFZ24

I/O

3.3V

C5

10pF C8

1000pF

R6

7.5k

C7

10pF

AN69 F06

FAULT RESET

C4

0.1µF

12V

C1

330µF

6.3V

INPUT

Q2

IRFZ24

*X7R CERAMIC 0805 CASE

C21 TO

C44*

1µF

CORE



2.8V

1

2

3

4



16

15

14

IPOS

INEG

GATE

COMP

SHDN



GND

1/2 LT1577 5

6

7

12

11

10

IPOS

INEG

GATE

COMP

SHDN



GND

1/2 LT1577

Figure 4. LT1577 dual regulator for split-plane systems

Linear Technology Magazine • December 1996

DESIGN FEATURES

feedback loop’s gain remain unaf-

fected. The sense resistor develops a

voltage equal to I

OUT ×

SENSE

. The

current-limit ampliﬁer’s 50mV thresh-

old voltage is a good compromise

between power dissipation in the

sense resistor, dropout voltage and

noise immunity. Current limit is acti-

vated when the sense resistor voltage

equals the 50mV threshold.

Two events occur when current

limit is activated: ﬁrst, the current-

limit ampliﬁer drives Q2 in the block

diagram and clamps the positive swing

of the COMP node in the main error

ampliﬁer to a voltage that provides an

output load current of 50mV/R

SENSE

(this action continues as long as the

output current overload persists);

second, a timer circuit is activated at

the SHDN pin. This pin is normally

held low by a 5µA active pull-down

that saturates to approximately

100mV above ground. When current

limit is activated, the 5µA pull-down

turns off and a 15µA pull-up current

source turns on. Placing a capacitor

in series with the SHDN pin to ground

generates a programmable-time ramp

voltage.

The SHDN pin is also the positive

input of comparator COMP1. The

negative input is tied to the internal

1.21V reference. When the SHDN pin

ramps above V

REF

, the comparator

drives Q4 and Q5. This action pulls

the COMP and GATE pins low and

latches the external MOSFET drive

off. This condition reduces the

MOSFET power dissipation to zero.

The time period until the latched-off

condition occurs typically equals

SHDN

× 1.11V)/15µA. For example,

a 1000pF capacitor on the SHDN pin

yields a 74µs ramp time. In short,

this unique circuit block performs a

current-limit time-out function that

latches off the regulator drive after a

predeﬁned time period. The time-out

period selected is a function of system

requirements including start-up and

safe-operating area. The SHDN pin is

internally clamped to 1.85V (typical)

by Q6 and R2. The comparator tied to

the SHDN pin has typical hysteresis

of 100mV to provide noise immunity.

The hysteresis is especially useful

when using the SHDN pin for thermal

shutdown.

Normal operation can be restored

after the load-current fault is cleared

in one of two ways: recycle the nomi-

nal 12V LT1575 supply voltage (as

long as an external bleed path for the

shutdown pin capacitor is provided)

or provide an active reset circuit that

pulls the SHDN pin below V

REF

. Pull-

ing the SHDN pin below V

REF

turns off

the 15µA pull-up current source and

reactivates the 5µA pull-down. If the

SHDN pin is held below V

REF

during a

fault condition, the regulator contin-

SW2 NORMALLY

CLOSED

I2

5µA

–

ERROR AMP

COMP

1575/77 BD2

–

COMP1

SHDN

GND

OUT

R2

SW1 NORMALLY

OPEN

100mV

HYSTERESIS

I1

15µA

I3

100µA

–

LIM

AMP V

TH1

50mV

–

TH3

500mV

–

TH2

–

IPOS

INEG

GATE

–

COMP2

COMP4

–

COMP3

OR2

START-UP V

REF

1.21V

R1

50k

OR1

Q2Q1

R3*

OUT

= (1 + R3/R4)V

REF

R4*

Figure 5. LT1575 block diagram

Linear Technology Magazine • December 1996

DESIGN FEATURES

ues to operate in current limit into a

short. This action requires the ability

to sink 15µA from the SHDN pin at

less than 1V. The 5µA pull-down cur-

rent source and the 15µA pull-up

current source are designed to be low

enough in value that an external

resistor divider network can drive the

SHDN pin to provide overvoltage

protection or to provide thermal shut-

down with the use of a thermistor in

the divider network. It is simple to

diode-OR these functions together and

obtain multiple functions from one

pin.

Senseless Current Limiting

If the current-limit ampliﬁer is not

used, two choices are available. The

simplest choice is to tie the I

NEG

directly to the I

POS

pin. This action

defeats current limit and provides the

most basic circuit. An example of an

application in which the current limit

ampliﬁer is not used is one in which

an extremely low dropout voltage must

be achieved and the 50mV threshold

voltage cannot be tolerated.

A second available choice permits

a user to provide short circuit protec-

tion with no external sensing. This

technique is activated by grounding

the I

NEG

pin. This action disables the

current limit ampliﬁer because

Schottky diode D1 clamps the

ampliﬁer’s output and prevents Q2

from pulling down the COMP node. In

addition, Schottky diode D2 turns off

pull-down transistor Q1. Q1 is

normally on and holds internal com-

parator COMP3’s output low. This

comparator circuit, which is now

enabled, monitors the GATE pin and

detects saturation at the positive rail.

When it detects a saturated condi-

tion, COMP3 activates the shutdown

timer. Once the time-out period

occurs, the output is shut down and

latched off. The operation of resetting

the latch remains as described above.

Note that this technique does not

limit the FET current during the time-

out period. The output current is only

limited by the input power supply

and the input/output impedance.

Output currents in the range of 50A–

100A are possible. Setting the timer

to a short period in this mode of

operation keeps the external MOSFET

within its SOA (safe operating area)

boundary and keeps the MOSFET’s

temperature rise under control.

No Power Supply

Sequencing Problems

The issue of power supply sequencing

is important because the typical

LT1575 application has inputs from

two separate power supply voltages.

A unique circuit design incorporated

into the LT1575 alleviates all con-

cerns about power supply sequencing.

If the typical 12V V

supply voltage is

slow in ramping up, insufﬁcient MOS-

FET gate drive is present, and

therefore the output voltage does not

come up. If the V

supply voltage is

present but the typical 5V supply

voltage tied to the I

POS

pin has not yet

started, the feedback loop wants to

drive the GATE pin to the positive V

rail. This will result in a very large

MOSFET current as soon as the 5V

supply starts to ramp up. However,

undervoltage lockout circuit COMP2,

which monitors the I

POS

supply volt-

age, holds Q3 on and pulls the COMP

pin low until the I

POS

voltage rises

above the internal 1.21 reference volt-

age. The undervoltage lockout circuit

then smoothly releases the COMP pin

and allows the output voltage to come

up in dropout from the input supply

voltage. An additional beneﬁt derived

from the speed of the LT1575 feed-

back loop is that turn-on overshoot is

virtually nonexistent in a properly

compensated system.

An additional circuit feature is built

in to the LT1575 ﬁxed-voltage ver-

sions. When the regulator circuit

starts, it must charge the output

capacitors. The output voltage typi-

cally tracks the input voltage supply

as it ramps up with the input/output

voltage difference deﬁned by the drop-

out voltage. Until the feedback loop

comes into regulation, the circuit

operation results in the GATE pin

being at the positive V

rail; this

starts the timer if the current limit

ampliﬁer is not used. However, inter-

nal comparator COMP4 monitors the

input-output voltage differential. This

comparator does not permit the shut-

down timer to start until the

differential voltage is greater than

500mV. This permits normal start-

up.

Fixed Voltage Versions

Eliminate Precision Discrete

Resistor Divider Networks

One ﬁnal beneﬁt results from using a

ﬁxed voltage version of the LT1575.

Today’s highest performance micro-

processors dictate that precision

resistors must be used with currently

available adjustable-voltage regula-

tors to meet the initial set point

tolerance. The LT1575 ﬁxed voltage

versions incorporate the precision

resistor divider network into the IC

and still maintain a 1% output volt-

age tolerance over temperature. The

LT1575 offers ﬁxed voltage options of

1.5V (GTL+ termination), 2.8V

(Pentium P55C), 3.3V, 3.5V (Pentium

P54 VRE) and 5.0V.

Conclusion

The unique design of the new LT1575/

LT1577 family combines the beneﬁts

of low dropout voltage, high functional

integration, precision performance

and ultrafast transient response, as

well as providing signiﬁcant cost sav-

ings on the output capacitance needed

in fast load-transient applications.

As lower input/output differential

voltage applications become increas-

ingly prevalent, an LT1575-based

solution achieves efﬁciency perfor-

mance comparable to that of a

switching regulator at appreciable cost

savings.

The new LT1575/LT1577 family of

low dropout regulator controller ICs

steps to the next level of performance

required by system designers for the

latest generation of motherboards and

microprocessors. The simple versa-

tility and beneﬁts derived from these

circuits meets the power supply needs

of today’s high performance micro-

processors with ease.

Linear Technology Magazine • December 1996

DESIGN FEATURES

LTC1479 PowerPath Controller

Simpliﬁes Portable Power

Management Design by Tim Skovmand

As the computing power of por-

table equipment rises, increasing

demands are placed on the portable

power management system. The

energy stored in the Li-Ion or NiMH

battery packs must be transferred as

smoothly and efﬁciently as possible

to the input of the DC/DC switching

regulator. These demands, coupled

with the increased need for higher

operating and charging currents, con-

spire to complicate the front end of

the power management system—the

so-called “power path.”

This is where the battery packs,

the AC wall adapter, the battery

charger and the standby system con-

verge to create a power-management

nightmare. The real world problems

associated with the switching of power

among these sources are often quite

subtle and daunting, which may ex-

plain why the prevailing solutions are

almost as varied as the portable equip-

ment in which they reside. Many

solutions require a large amount of

printed circuit board space and a

considerable number of discrete com-

ponents to implement—it is not

uncommon to ﬁnd an eclectic mix-

ture of regulators, comparators,

references, glue logic, MOSFET

switches and drivers in the power

path area of the circuit board.

Fortunately, some commonality

has emerged among power-path

switching schemes and the solutions

to these real world problems have

been integrated into a new family of

power-management controllers that

simplify the monitoring and switch-

ing of the batteries, the AC adapter,

the battery charger and the standby

system.

The LTC1479 PowerPath™ control-

ler drives low loss N-channel MOSFET

switches to direct power in the main

power path of a dual rechargeable

battery system, the type found in

most notebook computers and other

portable equipment.

Figure 1 is a conceptual block dia-

gram that illustrates the main features

of an LTC1479 dual-battery power

management system, starting with

the three main power sources and

ending at the input of the DC/DC

switching regulator.

Switches SWA/B, SWC/D and

SWE/F direct power from either the

AC adapter (DCIN) or one of the two

battery packs (BAT1 and BAT2) to the

input of the DC/DC switching regula-

tor. Switches SWG and SWH connect

the desired battery pack to the battery

charger. These ﬁve switches are intel-

ligently controlled by the LTC1479,

which interfaces directly with the

power management microprocessor.

Back-to-Back Switches

Each of the simple SPST switches

shown in Figure 1 actually consists of

two back-to-back N-channel MOSFET

switches. Figure 2 is a simpliﬁed sche-

matic diagram, which shows only the

three main power-path switches for

BAT1

BAT2

BATTERY

CHARGER

(LT1510)

SWA/B

SWC/D

SWE/F

SWG SWH

HIGH EFFICIENCY 

DC/DC SWITCHING 

REGULATOR

(LTC1435, ETC.)

DCIN

LTC1479

PowerPath™ CONTROLLER POWER

MANAGEMENT

µP

LTC1479 - BLK1

BACK-UP

REGULATOR

AC

ADAPTER

INRUSH

CURRENT

LIMITING

Figure 1. Dual PowerPath controller conceptual block diagram

Linear Technology Magazine • December 1996

DESIGN FEATURES

descriptive purposes. The low loss,

N-channel switch pairs are housed in

8-pin SO packaging and are readily

available from a number of MOSFET

manufacturers.

The back-to-back topology elimi-

nates the problems associated with

the inherent body diodes in power

MOSFET switches and allows each

switch pair to block current ﬂow in

both directions when the two halves

are turned off.

Inrush Current Limiting

The back-to-back topology also allows

independent control of each half of

the switch pair, and thus, the use of

bidirectional inrush current limiting.

The voltage across a single low

value resistor, R

SENSE

, is measured to

determine the instantaneous current

ﬂowing through the three main switch

pairs, SWA/B, SWC/D, and SWE/F.

The inrush current is then controlled

by the gate drivers until the transi-

tion from one power source to another

has been completed. The current ﬂow-

ing in and out of the three main power

sources and the DC/DC converter

input capacitor is dramatically

reduced.

Tantalum Capacitors

In many applications, inrush current

limiting makes it feasible to use low

proﬁle tantalum surface mount

capacitors in place of bulkier electro-

lytic capacitors at the input of the

DC/DC converter.

Built-In Step-Up Regulator

The gate drive for all ﬁve low loss

N-channel switches is supplied by a

micropower step-up regulator, which

continuously generates 37V. The V

supply provides sufﬁcient headroom

above the maximum 30V operating

voltage of the three main power

sources to ensure that the logic-level

MOSFET switches are fully enhanced

by the gate drivers, which supply a

regulated 5.7V gate-to-source volt-

age, V

, when turned on.

The power for the micropower boost

regulator is taken from three internal

diodes connected to each of the three

main power sources—DCIN, BAT1 and

BAT2. The highest voltage potential is

directed to the top of an inexpensive

1mH surface mount inductor, L1.

A fourth internal diode directs the

current from L1 to the V

output

capacitor, C2, further reducing the

external parts count. In fact, only

three external components are

required by the V

regulator: L1, C1

and C2.

Typical Application Circuit

A typical dual Li-Ion battery power

management system is illustrated in

Figure 3. If “good” power is available

at the DCIN input (from the AC

adapter), both MOSFETs in switch

pair SWA/B are on—providing a low

loss path for current ﬂow to the input

of the LTC1538-AUX DC/DC con-

verter. Switch pairs SWC/D and

SWE/F are turned off to block cur-

rent from ﬂowing back into the two

battery packs from the DC input.

BAT1

BAT2

SWA

SWC

HIGH

EFFICIENCY

DC/DC

SWITCHING

REGULATOR

(LTC1435, ETC)

3.3V

12V

DCIN

LTC1479

PowerPath™ CONTROLLER

POWER

MANAGEMENT

µP

SWB

SWD R

SENSE

V+

VGG

L1

1mH

C1

1µF

50V

C2

1µF

50V

STEP-UP

SWITCHING

REGULATOR

SWE SWF

GATE

DRIVER GATE

DRIVER INRUSH

CURRENT

SENSING

AND

LIMITING

Figure 2. Dual-battery PowerPath™ controller: V

regulator, inrush limiting and switch gate drivers

Linear Technology Magazine • December 1996

DESIGN FEATURES

Battery Charging

The LTC1479 works equally well with

both Li-Ion and NiMH batteries and

chargers. In this application, an

LT1510 constant-voltage, constant-

current (CC/CV) battery charger

circuit is used to alternately charge

two Li-Ion battery packs.

The power management micropro-

cessor decides which battery is in

need of recharging by either querying

a smart battery pack directly or by

more indirect means. After the deter-

mination is made, switch pair SWG or

SWH is turned on by the LTC1479 to

pass charger current to one of the

batteries. Simultaneously, the se-

lected battery voltage is returned to

the voltage feedback input of the

LT1510 CV/CC battery charger via a

built-in switch in the LTC1479.

After the ﬁrst battery is charged, it

is disconnected from the charger cir-

cuit. The second battery is then

connected through the other switch

pair and the second battery is charged.

(The LTC1479 works equally well with

the LT1511 3A CC/CV Battery

Charger and LTC1435/LT1620 4A

CC/CV Battery Charger.)

Running on Batteries

When the AC adapter is removed, the

LTC1479 instantly informs the power

management microprocessor that the

DC input is no longer “good” and the

desired battery pack is connected to

the input of the LTC1538-AUX high

efﬁciency switching regulator through

either switch pair SWC/D or SWE/F.

Back-Up Power

and System Recovery

Backup power is provided by a

standby switching regulator, which is

typically powered from a small

rechargeable battery and ensures that

the DC/DC input voltage does not

drop below a predetermined level (for

example, 6V).

The “Three Diode Mode”

When the system is powered by the

backup regulator, the LTC1479 en-

ters a unique operating state called

the “three diode mode,” as illustrated

in Figure 4. Under normal operating

conditions, both halves of each switch

pair are turned on and off simulta-

neously. For example, when the input

power source is switched from a good

DC input (AC adapter) to a good bat-

tery pack, BAT1, both gates of switch

pair SWA/B are turned off and both

gates of switch pair SWC/D are turned

on. The back-to-back body diodes in

switch pair SWA/B block current ﬂow

in or out of the DC input connector.

In the three diode mode, only the

ﬁrst half of each power path switch

pair, that is, SWA, SWC and SWE, is

turned on; and the second half , that

is, SWB, SWD and SWF, is turned off.

These three switch pairs now act as

three diodes connected to the three

main input power sources. The power

DCIN

BAT1

BAT2

+ +

V+ SW V

1µF

50V

1mH *

1µF

50V

SENSE

0.033Ω

SWA SWB

SWC SWD

SWE SWF

GA GB GC GD GE GF

SAB SCD SEF SENSE+ SENSE-

CCP

2.2µF

16V 0.1µF

VBAT POWER

MANAGEMENT

µP

BDIV

VBKUP BACK-UP

REGULATOR

LTC1538-AUX 

TRIPLE, HIGH EFFICIENCY,

SWITCHING REGULATOR

DCDIV

LTC1479

PowerPath™ CONTROLLER

LT1510

Li-Ion BATTERY

CHARGER

GG SG GH SH

CHGMON

3.3V

5.0V

SWG SWH

DCIN

Li-Ion

BATTERY

PACK #1

Li-Ion

BATTERY

PACK #2

LTC1479 - FIG03

BACKUP

BATTERY

* 1812LS-105 XKBC, COILCRAFT (708) 639-1469

12V AUX

DC2

DC1

MBRS140T3

Figure 3. Dual Li-Ion battery power-management system (simpliﬁed schematic)

Linear Technology Magazine • December 1996

DESIGN FEATURES

path diode with the highest input

voltage passes current through to the

input of the DC/DC converter to en-

sure that the system cannot lock up

regardless of how power is initially

applied.

After “good” power is reconnected

to one of the three main inputs, the

LTC1479 drives the appropriate

switch pair on fully as the other two

are turned off, restoring normal

operation.

Interfacing to the Power

Management Microprocessor

The LTC1479 takes logic level

commands directly from the micro-

processor and makes changes at high

current and high voltage levels in the

power path. Further, it provides

information directly to the micropro-

cessor on the status of the AC adapter,

the batteries and the charging system.

BAT1

BAT2

SWA

SWC

SWE

HIGH

EFFICIENCY

DC/DC

SWITCHING

REGULATOR

3.3V

12V

DCIN

LTC1479 POWER

MANAGEMENT

µP

LTC1479 - FIG04

SWB

SWF

SWD

ON OFF

SENSE

The LTC1479 logic inputs and out-

puts are TTL level compatible and

therefore interface directly with

standard power management micro-

processor. Because of the direct

interface via ﬁve logic inputs and two

logic outputs, there is virtually no

latency (time delay) between the

microprocessor and the LTC1479. In

this way, time-critical decisions can

be made by the microprocessor with-

out the inherent delays associated

with bus protocols and the like. These

delays are acceptable in certain por-

tions of the power management

system, but it is vital that the power

path switching control be made

through a direct connection to the

power management microprocessor.

The remainder of the power manage-

ment system can be easily interfaced

to the microprocessor through either

parallel or serial interfaces.

The Power Management

Microprocessor

The power management microproces-

sor provides intelligence for the overall

power system, and is easily pro-

grammed to accommodate the custom

requirements of each system and to

allow performance updates without

resorting to costly hardware changes.

Many inexpensive microprocessors

are available that can easily fulﬁll

these requirements.

Conclusion

The LTC1479 is the “heart” of a total

power management solution for

single- and dual-battery notebook

computers and other portable equip-

ment. It works in concert with other

Linear Technology power manage-

ment products, such as the LTC1435

family of high efﬁciency DC/DC con-

verters and the LT1510 family of

battery chargers to end your power-

management nightmares. The

LTC1479 is available in 36-lead SSOP

packaging.

Figure 4. LTC1479 PowerPath™ controller in “three diode mode”

Linear Technology Magazine • December 1996

DESIGN FEATURES

New Rail-to-Rail Ampliﬁers:

Precision Performance from

Micropower to High Speed

Introduction

Linear Technology’s latest offerings

expand the range of rail-to-rail ampli-

ﬁers with precision speciﬁcations.

Rail-to-rail ampliﬁers present an

attractive solution for signal condi-

tioning in many applications. For

battery-powered or other low voltage

circuitry, the entire supply voltage

can be used by both input and output

signals, maximizing the system’s

dynamic range. Circuits that require

signal sensing near the positive sup-

ply are straightforward using a

rail-to-rail ampliﬁer. Linear

Technology’s family of rail-to-rail

ampliﬁers satisﬁes the need for rail-

to-rail outputs and provides precision

input-offset speciﬁcations. Because,

for rail-to-rail applications, input off-

set is important across the entire

common mode range, LTC’s family of

ampliﬁers uses a proprietary trim

scheme that minimizes the input off-

set at two common mode voltages,

equal to the positive and negative

supplies. To make design using the

devices straightforward, the offset

voltage under these two conditions is

clearly deﬁned on the data sheet.

Rail-to-Rail Op Amp Family

The latest additions to LTC’s family of

precision rail-to-rail op amps span

the range of applications from

micropower to high speed. All mem-

bers of the family have both rail-to-rail

input and output capability. The fast-

est members of the family, the

LT1498/LT1499 C-Load

™

op amps

feature a 10MHz gain-bandwidth

product, a slew rate of 4V/µs and the

ability to drive 10,000pF. For low

current applications, the LT1466–69

series supplies precision performance

with a quiescent current of only 50µA

per ampliﬁer. Finally, the most accu-

rate members of the family, the

LT1218/LT1219, feature V

trimmed

to less than 100µV, the tightest V

spec among LTC’s rail-to-rail amps.

These devices combine precision

with low voltage operation, operating

with supplies as low as 2.2V, and are

fully speciﬁed for 3V operation. The

input offset voltage is less than 475µV

for the LT1466 and LT1498 and less

than 100µV for LT1218. In keeping

with the precision nature of the parts,

the open loop gain A

VOL

is one million

or greater driving a 10k load. The rail-

to-rail operation is fully speciﬁed and

tested over the entire supply range.

The input offset voltage and input

bias currents are speciﬁed at com-

mon mode voltages equal to both V

and V

The LT1466–69 and the LT1218/

LT1219 are offered in two versions,

which differ in their frequency com-

pensation. The LT1466 dual and

LT1467 quad and the LT1218 single

have conventional compensation. For

use in low frequency or DC applica-

tions, the LT1468 dual, LT1469 quad,

and LT1219 single are C-Load ampli-

ﬁers, compensated for use with a

0.1µF capacitor at the output. In a

noisy environment, the large output

capacitor clean ups the output signal

by improving the supply rejection and

providing a low output impedance at

high frequencies.

by William Jett

and Danh Tran

BIAS

R2R_01.eps

Q12

Q13

Q11

Q10

Q7Q2Q1

Q3 Q4

V–

IN–

IN+

V+

OUT

V–

BUFFER AND

OUTPUT BIAS

Figure 1. Rail-to-rail ampliﬁer simpliﬁed schematic

Figure 2. LT1498 small signal response

Figure 3. LT1498 large signal response

CL = 10nF

CL = 500pF

CL = 0pF

CL = 500pF

CL = 10nF

Linear Technology Magazine • December 1996

DESIGN FEATURES

The devices are available in a vari-

ety of package options. The LT1466,

LT1468 and LT1498 are dual ampli-

ﬁers, available in either 8-pin SO or

8-pin miniDIP packages. The LT1467,

LT1469 and the LT1499 are quad

ampliﬁers available in the 14-pin SO

only. The LT1218 and LT1219 are

single ampliﬁers with a shutdown

function, available in 8-pin SO and 8-

pin miniDIP packages.

The Rail-to-Rail Architecture

Though the new rail-to-rail ampliﬁers

described differ in detail, they share a

common approach to the input and

output stages. Figure 1 shows a sim-

pliﬁed schematic. The input stage

consists of two differential ampliﬁers,

a PNP stage Q1–Q2 and an NPN stage

Q3–Q4, which are active over differ-

ent portions of the input common

mode range. Each input stage is

trimmed for offset voltage. A comp-

lementary output conﬁguration

(Q12–Q13) is employed to create an

output stage with rail-to-rail swing.

The devices are fabricated on Linear

Technology’s proprietary complemen-

tary bipolar process, which ensures

very similar DC and AC characteris-

tics for the output devices Q12 and

Q13.

First, looking at the input stage,

Q5 switches the current from current

source I1 between the two input

stages. When the input common mode

voltage V

is near the negative sup-

ply, Q5 is reverse biased, so the

current from I1 becomes the tail cur-

rent for the PNP differential pair

Q1–Q2. At the other extreme, when

is near the positive supply, PNPs

Q1–Q2 are biased off. The current

from I1 then ﬂows through Q5 to the

current mirror D1–Q6, furnishing the

tail current for the NPN differential

pair Q3–Q4. The switchover point

between stages occurs when V

equal to the base voltage of Q5, which

is biased approximately 1.3V below

the positive supply.

The collector currents of the two

input pairs are combined in the sec-

ond stage, consisting of Q7–Q11. Most

of the voltage gain in the ampliﬁer is

contained in this stage. The output of

the second stage is then buffered and

applied to the output devices Q12

and Q13. Capacitors C1 and C2 form

local feedback loops around the out-

put devices, lowering the output

impedance at high frequencies.

Capacitor C

sets the ampliﬁer

bandwidth.

Performance

Table 1 summarizes the performance

of the newest rail-to-rail ampliﬁers.

As mentioned earlier, input offset volt-

age and bias currents are tested with

the input common mode voltages at

both V

and V

The LT1498/LT1499—

10MHz Bandwidth and

C-Load

Performance

The LT1498/LT1499 are the highest

frequency members of the LTC’s pre-

cision rail-to-rail ampliﬁer family,

featuring a 10MHz gain-bandwidth

and a 4V/µs slew rate. Designed for

ease of use, the LT1498/LT1499 are

C-Load ampliﬁers, stable at unity gain

when loaded with up to 10nF. Both

the small signal and large signal tran-

sient response with a capacitive load

are well behaved. Figures 2 and 3

illustrate the stability of the devices

for small signal and large signal

conditions.

Applications

The ability to accommodate any input

or output signal that falls within the

ampliﬁer supply range makes these

ampliﬁers very easy to use. The fol-

lowing applications demonstrate the

versatility of the family of ampliﬁers.

continued on page 37

–

R2R_04.eps

100pF

1/2 LT1498

6.81k

330pF



—

11.3k6.81k 47pF

1/2 LT1498 V

OUT

5.23k

1000pF

10.2k5.23k

Figure 4. 100kHz 4th order Butterworth ﬁlter

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An1An6An02

noitarutaStuptuO

egatloV daoLoN

Am5.2=Vm03

Vm572 Vm6

Vm002 Vm51

Vm002

tnerruCtiucriCtrohSAm02Am51Am02

egnaRegatloVylppuSgnitarepOV21otV2.2V21otV2.2otV0.2±V51

segatloVylppuSdeificepS,V5,V3±V5,V5,V3±V5,V5,V3±V51

Table 1. Ampliﬁer performance: V

= 5V, 25˚C

Linear Technology Magazine • December 1996

DESIGN FEATURES

FREQUENCY (Hz)

ENOBs

SINAD

10M

0 10k 100k 1M

Figure 2. This curve shows that the dynamic

performance of the LTC1409 remains robust

out to an input frequency of 1MHz, where it

maintains 11-bit performance.

FREQUENCY (Hz)

–120

–60

–80

–100

–20

–40

AMPLITUDE (dB)

200k 250k 300k 350k 400k0 50k 100k 150k

Figure 3. FFT of the LTC1415’s conversion of a full-scale 100kHz sine wave shows excellent

response with a low noise ﬂoor while sampling at 800ksps.

SAMPLE/

HOLD

CIRCUIT

PRECISION

12-BIT DAC

LTC1409

AND

LTC1415

SAR

2kΩ

–A

VREF

(2.5V)

REFCOMP

(4.1V)

OUTPUT

BUFFER

12 12

LOW DRIFT

VOLTAGE

REFERENCE

CLOCK

NAP/SLP SHDN RD CONVST CS

CONTROL LOGIC BUSY

COMPARATOR

Figure 1. LTC1409 and LTC1415 block diagram

fast successive-approximation ADC.

Supporting these high speed circuits

is an onboard voltage reference,

power-saving shutdown circuitry and

an easy to use parallel digital inter-

face. This interface easily connects to

FIFOs, microprocessors and DSPs.

To increase interface ﬂexibility,

both devices have a digital V

that

powers only the output-logic circuitry,

easing connection to a 3V host pro-

cessor. This allows the analog

conversion to operate on 5V, maxi-

mizing the dynamic range and SINAD,

while the conversion data’s logic lev-

els are compatible with the host

processor’s 3V logic.

DC and AC Performance

The DC speciﬁcations include a

±0.8LSB maximum differential lin-

earity error and ±0.5LSB maximum

integral linearity error guaranteed

over temperature. The ADCs’ gain is

held constant over temperature with

an on-chip 10ppm/°C curvature-cor-

rected bandgap reference.

The sample-and-hold used in the

LTC1409 and LTC1415 determines

their dynamic performance. These

ADCs have a wide bandwidth and

very low distortion differential sample

and hold. Dynamic performance

speciﬁcations include THD of –84dB

for a 625kHz input and a sample-

and-hold input bandwidth of 30MHz.

Figure 2 shows the wideband

integrity of the LTC1409’s conver-

sion. This curve shows that the

effective number bits (ENOB) is 11.8

and remains ﬂat out to an input fre-

quency of 200kHz. Even at 1MHz,

the

LTC1409 maintains 11-bit

performance.

An FFT of the performance of the

LTC1415 operating at full conversion

rate of 800ksps is shown in Figure 3.

The input signal is a full-scale 100kHz

sine wave. The curve shows excellent

response with a low noise ﬂoor while

sampling at 800ksps.

The LTC1409 and the LTC1415

have vanishingly low bit-error rates.

The error rates are so low that mea-

suring them is very difﬁcult. To begin

to uncover the error’s characteristics,

measurements were made at an

elevated temperature of 150°C (bit-

error rates increase with increasing

temperature). Even at this high tem-

perature, the bit-error rate was found

to be less than one in 100 billion

(10

–11

). At room temperature, the bit-

error rate is projected to be less than

one in 2,000,000 billion (2 × 10

–15

). To

understand the magnitude of this

error, consider that the LTC1409 or

the LTC1415, operating at full con-

version rate, would be free of bit errors

for at least 50 or 78 years, respectively.

Flexible Reference

Figure 4 shows a simpliﬁed circuit

diagram of the reference circuitry

found in the LTC1409 and

LTC1415.The reference’s temperature

coefﬁcient is 10ppm/°C, making it

suitable as a system reference. This

allows other circuits using this refer-

ence to track each other over

LTC1409/LTC1415, continued from page 1

Linear Technology Magazine • December 1996

DESIGN FEATURES

–

INTERNAL

CAPACITOR

DAC

LTC1409/LTC1415

0.625R

10µF

VREF (2.5V) 3

REFCOMP 4

AGND 5 R

BANDGAP

REFERENCE

REF

AMP

VCC

2kΩ

Figure 4. Flexible reference allows use of internal or external reference source

temperature. When this internal ref-

erence is used to set the full-scale

range (±2.5V for the LTC1409 and 0V

to 5V for the LTC1415), pin 3 is left

unconnected and a 10µF tantalum

electrolytic is connected between

REFCOMP and AGND. The circuit in

Figure 5 can be used to trim the full-

scale (gain) error.

When an external reference is used,

it can be connected in one of two

ways, depending on its magnitude. If

the external reference voltage is

between 2.5V and 3.0V, the V

REF

can be used. The REFCOMP pin can

accept reference voltages in the range

of 2.5V to 5.0V. The V

REF

pin is appro-

priate for applications that have a

ﬁxed reference or, if the reference

voltage is changed, can tolerate slow

settling times. For applications such

as scanners, which require fast

response to changing reference volt-

ages, the REFCOMP pin should be

used as the reference input. Because

the internal reference ampliﬁer is by-

passed, the settling time for changing

reference voltages is limited by the

size of the external bypass capacitor.

When the REFCOMP pin is driven by

an op amp, the ﬁlter capacitor can be

eliminated. In this case, the settling

time is a function of the op amp.

Differential Inputs

Cancel Wideband

Common Mode Noise

Unwanted noise is a problem for most

circuits. The problem of noise becomes

increasingly acute when dealing with

high speed, high resolution ADCs. An

LSB’s magnitude decreases with in-

creasing resolution. At a resolution of

12 bits, the LSB is just 1.22mV for a

5V full-scale input range. Noise from

ﬂuorescent lights, electrical motors

or digital circuits can quickly com-

bine to create unwanted signals whose

magnitude approaches a level that

creates conversion errors. Although

ﬁltering and shielding signal lines

will reduce the effects of noise, these

techniques are sometimes inadequate

or may limit bandwidth. The LTC1409

and the LTC1415 offer another

weapon in the ﬁght against the debili-

tating effects caused by noise: differ-

ential inputs.

Figure 6 shows a typical single-

ended sampling system whose input

signal is contaminated by ground

noise. This noise may be a combina-

tion of 60Hz, digital clock noise and/or

EMI. This ground noise adds directly

to the input signal. When the single-

ended system samples this signal,

the ﬁnal conversion result is a combi-

nation of the actual desired signal

and the unwanted noise.

The single-ended system cannot

differentiate between the desired sig-

nal and the noise. The resulting

conversion result is not correct.

Figure 7 shows the differential

inputs of the LTC1409 and the

LTC1415. These differential inputs

overcome this problem of ground

noise. Since the differential inputs

are connected across the signal

source, ground noise is common

mode. The ADC’s excellent common

mode rejection ratio (CMRR) rejects

the common mode ground noise and

the perturbations it creates in the

conversion result. The CMRR is

constant over the entire Nyquist band-

width (f

/2) and drops 3dB at 5MHz.

This ability to reject high frequency

common mode signals is very helpful

in sampling systems where noise of-

ten has high frequency components

caused by switching transients. Ad-

ditionally, the differential inputs reject

in-band common mode noise, some-

thing that is much more difﬁcult to

achieve with ﬁlters, and preserve the

LTC1409’s and LTC1415’s wide band-

width capabilities.

The LTC1409 and LTC1415 are

especially appropriate for applications

that require low power and high con-

version rates. To conserve additional

power, the typical power dissipation

of 80mW (LTC1409) or 60mW

–

1409_3.eps

INTERNAL

CAPACITOR

DAC

LTC1409/LTC1415

0.625R

10µF

VREF 3

24kΩ

50kΩ

47kΩ

REF COMP 4

AGND 5 R

BANDGAP

REFERENCE

REF

AMP

2kΩ

Figure 5. This simple circuitry facilitates full-scale trim and adds nothing to the signal path.

Linear Technology Magazine • December 1996

DESIGN FEATURES

MEASURED

SIGNAL

GROUND

NOISE

SINGLE INPUT

ADC

AGND

AIN MEASURED

SIGNAL

GROUND

NOISE

LTC1409

OR

LTC1415

AGND

–AIN

+AIN

Figure 6. A single-ended ADC is not able to

differentiate the desired signal from the

error-inducing ground noise, losing signal

integrity.

Figure 7. The LTC1409’s and LTC1415’s

excellent broadband CMRR cancels common

mode noise, preserving the input signal’s

integrity.

(LTC1415) can be signiﬁcantly

reduced during periods between con-

versions using the two shutdown

modes. The NAP/SLP pin is used to

select one of the two power reduction

shutdown modes. The Nap mode saves

95% of the typical power dissipation.

In Nap mode, the LTC1409 and the

LTC1415 reduce the bias current of

all internal circuitry, except the refer-

ence, to zero. This mode allows the

part to return from shutdown as

quickly as possible by leaving the

reference circuitry operational. The

Sleep mode shuts down the bias cur-

rent to all internal circuitry, including

the reference. Sleep mode saves the

greatest amount of power, but

requires more time to awaken than

the Nap mode.

In the Nap mode, all data output

controls are functional: data from the

last conversion prior to starting Nap

mode is still available and can be

read using RD and CS.

Conclusion

The newest members of LTC’s high

speed 12-bit family offer effective

solutions to many dynamic sampling

applications. These include high-

speed telephony, compressed video

and high frequency data acquisition.

The LTC1409 and the LTC1415 offer

an unbeatable combination of high

speed and low power dissipation.

Generally speaking, low ESR, high

value output capacitors should be

chosen to optimize the use of board

space. However, if the ESR value is

too low for a given capacitor value,

loop stability problems can occur.

The feedback loop depends on the

frequency of the ESR “zero” being well

below the loop crossover frequency.

(You remember poles and zeros from

your bumpy rides on the S-Plane,

don’t you?) There is 45˚ of positive

phase shift at the frequency where

the capacitive reactance equals the

ESR of the capacitor. Without this

phase shift, the loop would be impos-

sible to stabilize. Low ESR, AVX

TPS-series tantalum capacitors are a

very good compromise between ESR,

capacitance value and physical size.

Input capacitors are included to

suppress the input switching noise

and to keep the input 5V supply varia-

tion to a minimum during the Q1 ON/

OFF cycle. Excessive conducted emis-

sions are usually traced back to

inadequate input capacitance or poor

layout of the power-path traces. The

crucial parameter for the input ca-

pacitors is ripple current rating. A

reasonable rule of thumb says that

the input capacitor ripple current is

going to be approximately 50% of the

load current. Therefore, in a typical

Pentium Pro processor application,

the input capacitors should be rated

for close to 7A

RMS

. An excellent choice

for the input capacitors are Sanyo

OS-CONs or the equivalent. They have

extremely high ripple current ratings

for their size and have demonstrated

excellent reliability in this type of

application. Low ESR aluminium elec-

trolytic capacitors are a viable option

from both input and output. Although

lower in cost than OS-CONs or tanta-

lum capacitors, their long-term

reliability is not as good. Using 105˚C

capacitors and keeping operating tem-

peratures low will help to obtain

reasonable capacitor life.

The combination of the Dale NTHS-

1206N02 thermistor and the 1.8k

resistor are for overtemperature moni-

toring. The OT ﬂag trips if the ambient

temperature at Q1 reaches about

90°C; at 100°C the G1 and G2 drivers

stop operating. If the system moni-

tors the OT ﬂag, there should be

ample time to take precautions, saving

data and system conﬁguration infor-

mation prior to an overtemperature

shutdown. Alternatively, CPU activ-

ity could be reduced, lowering power

supply current and allowing the sup-

ply to cool down.

The PWRGD pin gives the CPU rail-

voltage OK indication. If, for any

reason, the output regulation falls

out of the ±5% limit (including an

overtemperature shutdown), PWRGD

will provide a logic low signal to the

system monitor.

Conclusion

The LTC1553 is designed to be used

in all N-channel, synchronous buck

switching regulators for Pentium Pro

and other high performance micro-

processors. A high level of integration

holds external parts count to a mini-

mum, while providing a ﬂexible

solution. High efﬁciency can be

achieved, eliminating the need for

heat sinks in applications with cur-

rents as high as 14 amps steady

state. All required system monitoring

functions are supplied on chip. Com-

ponent count and cost are reduced by

eliminating the need for low resis-

tance, high power, current sense

resistors.

LTC1553, continued from page 8

Linear Technology Magazine • December 1996

DESIGN FEATURES

High Efﬁciency, Low Dropout

Lithium-Ion Battery Charger Charges

Up to Five Cells at 4 Amps or More

by Fran Hoffart

Introduction

Rechargeable lithium batteries fea-

ture higher energy density per volume,

higher energy density per weight and

higher voltage per cell than any of the

competing battery chemistries. For

these reasons, manufacturers of por-

table equipment are adopting the

lithium-ion rechargeable battery as

the battery of choice for high perfor-

mance portable equipment. Lighter

weight and increased operating time

between charges are important fea-

tures that customers want and need

from portable products.

Laptop computers are one of many

areas where rechargeable lithium

batteries are rapidly replacing other

battery types. Today’s laptops feature

faster microprocessors, more memory,

larger back-lit liquid crystal displays,

larger hard disks and more built-in

features than ever before. At the same

time, laptop manufacturers are striv-

ing to reduce the size and weight of

their products. These advances place

increased energy demands on the

battery.

These increased demands have

forced manufacturers to use multiple

cells in a combination of series and

parallel conﬁgurations. Paralleling

cells increases the amount of current

that can drawn from the battery and/

or increases the operating time

between charges, but it also increases

the current requirements of the

charger.

Linear Technology

Battery Charger Products

Linear Technology offers several dedi-

cated switch-mode battery charger

ICs with charging capabilities up to

3A. For step-down applications, the

LT1510, operating at 200kHz, can

provide up to 1.5A of charging cur-

rent in a constant-current and/or

constant-voltage mode. For currents

up to 3A, the LT1511 is available. In

addition to a constant-current/con-

stant-voltage charge, the LT1511 also

features a programmable current limit

on the input side of the charger. This

allows the input power source (AC

adapter) to power a load, such as a

laptop computer, and charge a battery

simultaneously, without overloading

the input power source.

Two 500kHz chargers designed for

SEPIC (single-ended primary induc-

tance converter) topology are also

available. The SEPIC design allows

the input voltage to be less than,

equal to or greater than the battery

voltage. The LT1512 (1.5A) and

LT1513 (3A) can be used in a constant-

current/constant-voltage mode.

Higher Charge Currents

Paralleling cells, regardless of cell

chemistry, requires relatively high

charge currents to bring the battery

AVG

R3

(SEE TEXT)

1620_01.eps

SGND

SENSE+

OSENS

PGND

BOOST

INT V

–

LT1620CM58

SENSE

PROG

= 21k

FOR 4A

GND

OUT

PROG

211

12 D2 D1

C6, 0.33µF

C7, 4.7µF

C5, 0.1µF

R2

1M

0.1%

SENSE



0.02ΩI

BATT

C3

22µF

C8

100pF

L1

27µH

C1, C2

22µF ×2

35V TANT.

C4

0.1µF

C10

100pF

C12

0.1µF

C14

1000pF

R5

C13

0.033

C18

0.1µF

C15

0.1µF

R6

4k C16

0.33µF

R7

1.5M

SHUTDOWN INPUT

(SD = 0V) 14

LTC1435CG

SFB

SENSE–

OSC

RUN/SS

C11

56pf

 L1 =CTX27-4, COILTRONICS

 Q1, Q2 =Si4412DY, SILICONIX

 D1, D2 =CMDSH-3, CENTRAL

 C1, C2 =22 µF,35V, AVX TPS SERIES

 C3 =22 µF, 25V, AVX TPS SERIES

C17, 0.01µF

C9, 100pF

Figure 1. Complete schematic of high efﬁciency, 4A constant-voltage/constant-current

charger using all surface mount components, with a circuit board area of 1.5 in

Linear Technology Magazine • December 1996

DESIGN FEATURES

up to full charge in a short period of

time. When charging needs exceed

the 3A maximum rating of the LT1511

or LT1513, the circuit shown in Fig-

ure 1 can provide much higher current

solutions, and very high efﬁciency.

This circuit uses the LTC1435 and

LT1620 in a charger that delivers 4A or

more with exceptional efﬁciency and

low dropout voltage (Figures 2 and 3).

The LT1435 Switching

Regulator Controller

The LTC1435 is a step-down current

mode switching regulator controller

designed to drive two external N-chan-

nel power MOSFETs. Operating from

input voltages between 3.5V and 36V,

this device includes a programmable

switching frequency, synchronous

rectiﬁcation, Burst Mode™ operation

and a 99% maximum duty cycle for

low dropout voltage. Additional fea-

tures include a 1% tolerance output

voltage (adjustable between 1.2V and

9V), programmable soft start, logic-

controlled micropower shutdown and

a secondary feedback control pin.

Because external MOSFET switches

are used, the maximum output load

current is determined by the current

capabilities of the selected FETs.

The LTC1435

as a Battery Charger

The low dropout voltage, high current

capability and high efﬁciency of the

LTC1435 switching regulator would

seem to make it an appropriate choice

for high current battery chargers, but

it has several limitations. The abso-

lute maximum output voltage of 10

volts allows only two series-connected

lithium cells to be charged and the

output current is not readily

programmable.

Introducing the LT1620

The LT1620 is an IC designed to be

used with a current mode PWM con-

troller (such as the LTC1435 and

similar products) to increase the out-

put voltage range and optimize the

circuit for battery charging applica-

tions. Used together, these two prod-

ucts overcome the voltage and current

programming limitations previously

mentioned, to produce a high current,

high performance constant-voltage/

constant-current battery charger for

lithium-ion and other battery types.

How They Work Together

To understand how the two parts

work together, a brief review of the

LTC1435 operation is necessary. See

Figure 4. During each cycle of opera-

tion, the series MOSFET switch Q1 is

turned on by the LTC1435 oscillator

(Q2 is off). This causes a current to

begin ramping up in inductor L1.

When the current in L1 reaches a

peak level determined by the voltage

at the I

pin, Q1 is turned off and the

synchronous MOSFET Q2 is turned

on, causing the current in L1 to ramp

down to the level at which it started.

Thus, a sawtooth of inductor ripple

current is generated, with a peak

level set by the voltage on the I

pin.

This inductor current is sensed via an

external, low value sense resistor in

series with the inductor and is used

to drive the LTC1435 internal current

sense ampliﬁer for the current mode

feedback signal. This current sense

ampliﬁer has a maximum common

mode voltage limit of 10V, which limits

the maximum output voltage to 10V.

Enter the LT1620. The LT1620 also

contains a current sense ampliﬁer,

which has a common mode range

that extends up to 28V. This ampliﬁer

is used to level shift the differential

sense voltage, which is riding on the

battery voltage, and reference it to the

CHARGE CURRENT (A)

100

EFFICIENCY (%)

1620_02.eps

01234

BATT

= 16.8V

BATT

= 12.8V

= 24V

CHARGE CURRENT (A)

1.0

0.5

1.5

2.0

DROPOUT VOLTAGE (V)

1620_03.eps

01234

V

BATT

=16.8V

I

PROG

=200 µA

CONSTANT CURRENT 

PROGRAMMED FOR 4A

1620_04.eps

INT V

SENSEI

INV

OSENS

LT1620

PROG

OUT

SENSE

AVG

BATT

PROGRAM

CONSTANT

CURRENT

PROG

SENSE

SHUTDOWN INPUT

LTC1435

GND

C15

OSC

RUN/SS

PROGRAM

CONSTANT

VOLTAGE

Figure 2. Charger efﬁciency for 3- and 4-cell

applications Figure 3. Charger dropout voltage vs charge

current

Figure 4. Simpliﬁed diagram of constant-voltage/constant-current charger

Linear Technology Magazine • December 1996

DESIGN FEATURES

internal 5V V

voltage generated by

the LTC1435. This level-shifted sig-

nal is used to drive the LTC1435

current sense pins, thus providing

current mode feedback for the con-

stant-voltage feedback loop. This

signal is also used to control the

constant output current feedback

loop, as explained below.

Constant Charge Current

The LT1620 also provides a simple

method of accurately programming

the constant-current output. Sink-

ing an adjustable current from the

PROG pin to ground controls the

charge current from zero current to

maximum current. This program cur-

rent can be derived from a variety of

sources, such as a single resistor to

ground or the output of a DAC.

The constant-current feedback loop

operates as follows. With a discharged

battery connected to the charger, and

assuming that the battery voltage is

less than the ﬂoat voltage programmed

by R2 and R3, the error ampliﬁer in

the LTC1435 begins pulling up on the

pin. This increases the peak in-

ductor current in an effort to force the

battery voltage to be equal to the

programmed voltage. By limiting the

voltage on the I

pin, the peak induc-

tor current and the average output

current can be controlled. The I

has an internal 2.4V clamp that sets

the peak inductor to its maximum

level. This 2.4V clamp provides some

degree of current regulation, but the

average battery current will vary con-

siderably as a result of dependence

on inductor ripple current and

LTC1435 parameter variations. By

adding the LT1620 to the circuit, the

constant charging current control

performance is considerably im-

proved. As shown in Figure 5, the

signal from the current sense ampliﬁer

in the LT1620 is ampliﬁed by 10,

averaged by C

AVG

(C15 in Figure 1)

and compared to the voltage drop

across R6. This voltage is developed

by a current, I

PROG

, ﬂowing through

R6. When the voltage at the LT1620

AVG pin approaches the voltage on

the PROG pin, I

OUT

begins to pull the

pin of the LTC1435 down, limiting

the peak inductor current and com-

pleting the constant-current feedback

loop.

Complete Charger Circuit

The circuit shown in Figure 1 can

charge up to ﬁve series-connected

lithium-ion cells at currents up to 4A.

Using low R

DS(ON)

MOSFET switches

for the switch and synchronous recti-

ﬁer results in efﬁciency exceeding

95% and allows all surface mount

components to be used, resulting in a

design that occupies less than 1.5 in

of board space. This circuit operates

at a switching frequency of 200kHz

and is capable of up to 99% duty

cycle; it can operate over a very wide

input voltage range, from a minimum

input of only 600mV greater than the

battery charging voltage to a maxi-

mum of 28V (limited by the MOSFETs).

Constant-voltage charging with

better than 1.2% accuracy and con-

stant-current charging with 7.5%

accuracy provides almost ideal

lithium-ion battery charging

conditions.

In battery charger designs, an

important issue is reverse battery

drain current caused by the charger

when the input power is removed or

the charger is shut down, or both. If

the battery will remain connected to

the charger for extended periods of

time, it is important to minimize this

reverse drain current to prevent dis-

charging the battery. The charger can

be shut down by using the RUN/SS

pin on the LTC1435. This stops the

charging current and results in a

reverse battery drain current in the

tens of microamps.

The LTC1435 and LT1620 have

been conﬁgured so that the battery

can remain connected to the charger

when the input power is removed, but

because of the inherent body diode in

the Q1 MOSFET, current can ﬂow

from the battery, through the Q1 body

diode, to the LTC1435’s V

pin, keep-

ing it powered up. In this situation,

because the charger is effectively pow-

ered by the battery, the reverse battery

drain can be several mA, which could

discharge the battery over an extended

period. Figure 6 contains circuitry

that automatically shuts down the

LTC1435 when the input power is

removed and puts it into a low quies-

cent current condition. Because the

LT1620 is powered from the LTC1435

INT V

pin, it is also turned off.

When input power is applied, the

charger can still be shut down with

an external signal to the RUN/SS pin.

Shutdown occurs by pulling this pin

low; releasing it allows the capacitor

to charge up via the internal 3µA

current source, producing a soft start.

By substituting higher current

MOSFETs and changing some com-

ponent values, much higher charging

currents can be obtained.

PROG

800mV

2.5k

X10

AVG PIN

AVG

40mV OFFSET

OUT

+5V

SENSE

LT1620

–

BATT

CURRENT

SENSE

AMPLIFIER

SENSE

80mV CHARGE

CURRENT

INDUCTOR

CURRENT

EXTERNAL AVERAGING

CAPACITOR, C15

INT V

+SENSE

LTC1435

–SENSE

4.2V

PROG

≈800mV

1620_05.eps

Figure 5. Simpliﬁed diagram of constant-current control loop

Linear Technology Magazine • December 1996

DESIGN FEATURES

Selecting Battery Voltage

Programming Resistors

The charging voltage of lithium-ion

cells is either 4.1 or 4.2 volts per cell,

depending on the battery chemistry.

Contact the battery manufacturer for

the recommended charge voltage. To

program battery charging voltage (ﬂoat

voltage) use the following equation

(for best accuracy and stability, use

0.1% resistors).

BATT

= V

REF

=1.19V; USE APPROXIMATELY

 100k Ω FOR R3

R2

1 +

()

R2 = R3 V

BATT



REF

)

– 1

Selecting R

SENSE

is an external, low value resis-

tor that is placed in the inductor

current path to develop a signal rep-

resentative of the inductor or charge

current (I

BATT

). This signal is used as

feedback to control the switching

regulator constant-voltage and con-

stant-current loops. To minimize

overall dropout voltage and power

dissipation in the sense resistor, a

sense voltage of 80mV was chosen to

represent maximum charging cur-

rent. Use the following equation to

select current sense resistor R

SENSE

The maximum battery charge current

(MAX I

BATT

) must be known.

SENSE

= 0.08V

MAX I

BATT

Selecting I

PROG

is a current from the PROG pin

to ground that is used to program the

maximum charging current. I

PROG

can

be derived from a resistor to ground,

from the output of a DAC or by other

methods. This program current is

generated using resistors and the 5V

available from the LTC1435.

Refer to the simpliﬁed diagram of

the constant-current control loop

shown in Figure 5. The DC voltage

across C

AVG

is proportional to the

average charge current. This voltage

drives one input of a transcon-

ductance (g

) ampliﬁer. A program

voltage (relative to the 5V V

line)

proportional to the desired, or pro-

grammed charge current is applied to

the other input of the transcon-

ductance ampliﬁer. This voltage

should be selected to be ten times the

average voltage dropped across R

SENSE

when the charger is in a constant-

current mode.

If the voltage across C

AVG

increases

to a level equal to the voltage at the

PROG pin, the transconductance

ampliﬁer begins pulling down on the

pin of the LTC1435, thereby limit-

ing the peak inductor current, and

thus the average charge current.

The program voltage needed on the

program pin can easily be generated

by two resistors, as shown in Figure

5. A current (I

PROG

) is generated by

these resistors and the 5V V

volt-

age. This I

PROG

develops a voltage

across R6, which is used to set the

maximum constant charge current

level. The circuit is designed for an

approximate PROG voltage of 800mV

(don’t exceed the maximum spec of

1.25V), referenced to the LT1620 V

pin. Because of the gain-of-10 ampli-

ﬁer, this corresponds to a typical

voltage across R

SENSE

of 80mV (with a

maximum of 125mV).

The recommended range of resis-

tor values for R6 is approximately

2kΩ to 10kΩ. With 0.8V across R6,

this will result in program currents

PROG

) between 400µA and 80µA.

The LT1620 was designed to reduce

the charging current to zero under all

conditions when the I

PROG

is set to

zero. To ensure that the charging

current will always go to zero, an

offset was designed into the trans-

conductance ampliﬁer. In the

equations for R6 and R

PROGRAM

, this

offset is represented by using 840mV

rather than 800mV.

Example:

GIVEN: MAXIMUM I

BATT

= 4A

I

PROG

= 200µA (FOR MAXIMUM I

BATT

)

RSENSE = 0.08V

MAX I

BATT

0.08V

4A = 0.02Ω=

R6 = 0.84V

PROG

0.84V

200µA= 4.2kΩ=

5V – 0.84V

PROG

5V – 0.84V

200µA= 20.8kΩ=

PROG

Once R1 and R6 are known, the fol-

lowing equations can be used to

determine R

PROG

and I

PROG

for lower

BATT

currents:

PROG

R6 [5 – 10(I

BATT

)(R1)]

0.04 + 10(I

BATT

)(R1)

10(I

BATT

)(R1) + 0.04

PC Board Layout

As with any high frequency switching

regulator, layout is important. Switch-

ing current paths and heat producing

thermal paths should be identiﬁed

and the printed circuit board designed

using good layout practices.

Even with efﬁciency numbers in

the mid 90s, under some charging

conditions power losses can be as

1620_06.eps

TG Q1

SHUTDOWN

47k CSS

+VIN

Q3

2N3906

VCC

LTC1435

RUN/SS

D3, D4 = 1N4148

Figure 6. Circuitry that shuts down the charger when input power is removed, minimizing

reverse battery current drain

continued on page 36

Linear Technology Magazine • December 1996

DESIGN FEATURES

LTC1069-X: a New Family of 8th Order

Monolithic Filters in SO-8 Packages

by Nello Sevastopoulos and Philip Karantzalis

The LTC1069 switched capacitor ﬁl-

ter technology offers economical

solutions for a wide range of ﬁlter

requirements. The ﬁlter response, the

sampling rate and the power con-

sumption can be easily reprogrammed

by means of a single processing layer.

The LTC1069 semicustom ﬁlter tech-

nology can integrate any single 8th

order or dual 4th order classical ﬁlter

approximation (Butterworth, Bessel,

Chebyshev or elliptic) or any applica-

tion speciﬁc ﬁlter response, in an

8-pin SO package. Three new devices

illustrate this technology’s versatility.

LTC1069-1: Low Power

Elliptic Filter Works from

Single 3.3V to

5V Supplies

The LTC1069-1 has a frequency

response that provides a ﬂat pass-

band in combination with steep

attenuation in the vicinity of the cut-

off frequency. The cutoff frequency of

the ﬁlter is clock tuned with a clock-

to-cutoff-frequency ratio of 100:1. The

passband is “ﬂat” up to 95% of the

cutoff frequency; the typical ripple is

±0.1dB. Attenuations of 20dB at 1.2

× f

CUTOFF

and 52dB at 1.4 × f

CUTOFF

are

obtained. Beyond these frequencies

the transition band keeps rolling off

instead of “bouncing back” the way

textbook elliptics do. Figure 1 illus-

trates this “progressive” roll-off. The

attenuation ﬂoor reaches 82.5dB at

2.3 × f

CUTOFF

with a ±5V supply and

75dB with a single 3.3V supply. The

LTC1069-1 is designed for low power,

single- or dual-supply, low frequency

antialiasing ﬁlter applications. Fig-

ures 2 and 3 show typical connections

for single 5V and ±5V supplies. The

analog ground of the device is inter-

nally biased to one half the total power

supply voltage, thus eliminating the

need for additional external compo-

nents and power waste. The low power

consumption and speed obtainable

from the part are shown in Table 1.

Despite the low power consump-

tion of the device, extreme care was

applied to maintain wide dynamic

range. The best dynamic range is

obtained with ±5V supplies. Figure 4

shows a S/(Noise+THD) ratio of bet-

ter than 70dB for almost a decade of

input signal range. The frequency of

the input signal was set to 1kHz.

LTC1069-7 Linear-Phase,

Raised-Cosine Filter

The LTC1069-7 lowpass ﬁlter uses

exactly the same technology as the

LTC1069-1, yet it is designed to per-

form an entirely different task. First,

a ﬁlter transfer function was synthe-

sized to approximate a raised-cosine

amplitude response with an alpha

factor of one and linear phase in the

passband (Figure 5). A simpliﬁed dis-

cussion of raised-cosine ﬁlters can be

found in the boxed section on page

28. Digital communication systems

in need of pulse shaping and channel

band limiting require the properties

of raised-cosine ﬁlters. Note that the

raised-cosine response is not related

to the classical ﬁlter responses like

Butterworth, Bessel or elliptic; its

realization with classic RC active tech-

niques requires many precision

passive components and tuning

adjustments. When compared to a

conventional Bessel ﬁlter of the same

order (for example, the LTC1064-3),

the LTC1069-7 provides steeper roll-

off at the vicinity of its cutoff frequency

(see Figure 5). The impulse response

of the LTC1069-7 is also fully sym-

metrical (see Figure 6) and is designed

to shape an incoming pulse for opti-

mum reception.

The LTC1069-7 trades power con-

sumption and, to some degree,

sampling rate, for speed. The maxi-

mum cutoff frequency is 200kHz, the

sampling-rate to cutoff-frequency

ratio is 50:1 and the clock-to-cutoff

frequency ratio is 25:1. The

FREQUENCY (kHz)

–90

–40

–50

–60

–70

–80

–10

–20

–30

GAIN (dB)

205.02.5 7.5 10 12.5 15 17.5

= 3.3V

= ±5V

GND

LTC1069-1

OR

LTC1069-6

CLK

= 400kHz

0.47µF

0.1µF

5V 2

OUT

–

CLK

GND

LTC1069-1

CLK

= 400kHz

0.1µF 0.1µF

5V –5V

OUT

–

CLK

Figure 1. LTC1069-1 elliptic ﬁlter frequency

response (f

CUTOFF

= 5kHz, f

CLK

= 500kHz) Figure 2. Single 5V supply 4kHz elliptic

lowpass ﬁlter Figure 3.

5V supply 4kHz elliptic lowpass

ﬁlter

YLPPUS

)pyT(f

FFOTTUC

)xaM(

V3.3Am5.1zHk5

V5Am5.2zHk8

±V5Am2.3zHk21

Table 1. LTC1069-1 power consumption

and speed

Linear Technology Magazine • December 1996

DESIGN FEATURES

TDECISION INSTANTS

OVERALL WAVEFORM

TIME

0100110

VOLTAGE

fSAMPLING = 1

FREQUENCY

–50

–20

–30

–40

–10

GAIN (dB)

20 0.25 0.50 0.75 1 1.25 1.50 1.75



ALPHA = 1

ALPHA = 0.5

Figure A. A sequence of pulses with minimum intersymbol interference at the output of a raised-cosine ﬁlter

Figure B. Gain versus frequency for raised-

cosine ﬁlters

LTC1069-7 is pin compatible with the

LTC1069-1. Table 2 illustrates the

maximum cutoff frequency of the de-

vice for different power supplies.

LTC1069-6: Single-Supply,

Very Low Power, Progressive

Elliptic Lowpass Filter

The LTC1069-6 is designed for mini-

mal power consumption and for single

3V and 5V supply operation. The

amazingly low supply current of 1mA

(3V supply) and 1.2mA (5V supply)

includes the current spent to inter-

nally bias the AGND pin for optimum

voltage swing when operating the part

on a single supply. To save power, the

clock-to-cutoff frequency ratio is low-

ered to 50:1 but the sampling rate is

still 100:1. With a 50:1 clock-to-cut-

off frequency ratio and for clocks equal

to or less than 1MHz, cutoff frequen-

cies within the audio band can be

obtained.

The amplitude response of the ﬁl-

ter is also progressive elliptic, as

illustrated in Figure 7, where the clock

is set to 600kHz for a 12kHz cutoff

frequency. Figure 7 also shows the

response of the LTC1069-1 with a

clock of 1.2MHz and a 12kHz cutoff

frequency. When compared to the

LTC1069-1, the LTC1069-6 has a

sharper roll-off in the vicinity of its

Raised-Cosine Filters

In digital communications, infor-

mation is transmitted and received

as sequences of signal units of very

short duration. Each signal (referred

to as a symbol) generates a transient

response as it is processed through

a communications link. The detec-

tion of valid symbols requires precise

sampling every T seconds for a sig-

naling rate of 1/T. During sampling,

the decaying oscillations of a previ-

ous symbol can add errors in the

detection process. When an incor-

rect decision is made about the

symbol originally transmitted,

intersymbol interference (ISI) is said

to occur. In order to minimize ISI

with as small a transmission band-

width as possible, raised-cosine

ﬁlters are used in data transmission

to shape signals. When a pulsed signal

is transmitted through a raised-cosine

ﬁlter, it will be received with mini-

mum ISI, assuming the channel is

properly designed. Figure A illustrates

how two consecutive pulses can be

shaped and properly detected with

minimum ISI. Raised-cosine ﬁlters

are deﬁned by the type of roll-off in

the stop band (often referred to as the

“alpha” of the ﬁlter—Figure B).

One way to create a communica-

tions channel with a ﬂat frequency

response and low distortion is to

match the receiver ﬁlter to the trans-

mitter ﬁlter; if both ﬁlters are designed

with a root-raised-cosine response,

the overall channel is raised-cosine.

For root-raised-cosine designs using

the LTC1069 family of ﬁlters, please

contact LTC Marketing.

INPUT VOLTAGE (V

RMS

)

0.1

–85

THD + NOISE (dB)

–80

–75

–70

–65

–45

–60

–55

–50

= ±5V

= 1kHz

Figure 4. LTC1069-1 THD + noise versus

amplitude with

5V supply

YLPPUS

FFOTTUC

±V5Am81zHk002

V5Am21zHk041

Table 2. LTC1069-7 maximum

cutoff frequencies

Linear Technology Magazine • December 1996

DESIGN FEATURES

Despite the LTC1069-6’s very low

power consumption, its noise and

distortion performance are quite im-

pressive. The single supply connection

of Figure 2 was used to operate the

LTC1069-6 with a single 5V supply,

600kHz clock and 12kHz cutoff fre-

quency. A 2V

P–P

signal was swept

from 1kHz to 12kHz. The output of

the ﬁlter was buffered to drive the

cable and the input stage of the signal

analyzer. With 2V

P–P

input, the sig-

nal-to-noise ratio measured at 1kHz

was 74dB; the –67dB worst-case har-

monic distortion occurred for input

frequencies of 4kHz, that is, at 1/3 of

the ﬁlter cutoff frequency. Figure 8

illustrates the above data. Table 3

shows the maximum cutoff frequency

the device can reach and the corre-

sponding power consumption. The

FREQUENCY (kHz)

–70

GAIN (dB)

–60

–50

–40

–30

100 1000

–20

–10

8TH ORDER

BESSEL

LTC1069-7

= SINGLE 5V

FREQUENCY (kHz)

–80

–10

–20

–30

–40

–50

–60

–70

GAIN (dB)

411 5 9 13 17 21 25 29 33 37

a: LTC1069-6

f

CLK = 600KHz

b: LTC1069-1

fCLK = 1.2MHz

V

IN = 2VP–P

a b

FREQUENCY (kHz)

– 90

–65

–70

–75

–80

–85

–40

–45

–50

–55

–60

20110

V

= 5V

V

= 2V

P–P



f

CUTOFF

= 12kHz

20 log (dB)

THD+NOISE

()

Figure 5. LTC1069-7 amplitude response

compared to 8th order Bessel

Figure 6. The pulse response of the

LTC1069-7 is fully symmetrical.

Figure 7. Amplitude response comparison:

LTC1069-6 versus LTC1069-1

cutoff frequency; the key feature is

42dB–50dB attenuation for frequen-

cies between 1.27 × f

CUTOFF

and 1.31 ×

CUTOFF

. Conversely, the LTC1069-1

has better stop band attenuation and

a ﬂatter passband and is therefore

more selective right at the cutoff

frequency.

LTC1069-6 can reach higher cutoff

frequencies than the LTC1069-1 for

less power. This is mainly due to the

lower clock-to-cutoff frequency

ratio.

Figure 8. LTC1069-6 signal to (noise + THD)

ratio versus frequency

Table 3. LTC1069-6 maximum cutoff

frequencies and resulting power consumption

YLPPUS

)pyT(

FFOTTUC

)xaM(

KCOLC

)xaM(

V3Am0.1zHk41zHk007

V5Am2.1zH02zHM1

The Linear Technology World

Wide Web Site is Open

by Kevin R. Hoskins

Linear Technology Corporation’s

customers can now quickly and con-

veniently find and retrieve the latest

technical information covering the

company’s products on LTC’s new

internet web site. Located at

www.linear.com or www.linear-

tech.com, this site allows anyone with

internet access and a web browser to

search through all of LTC’s technical

publications, including data sheets,

application notes, Linear Technology

magazine issues and other LTC pub-

lications, to find information on LTC

parts and applications circuits. Other

areas within the site include help,

news and information about Linear

Technology and its sales offices. The

site includes a map that eases

navigation through the different in-

formation areas.

Other web sites usually require the

visitor to download large document

files to see if they contain the desired

information. This is cumbersome and

inconvenient. To you save time and

ensure that you receive the correct

information the first time, the first

page of each data sheet, application

note, and LT magazine is recreated in

a fast, download-friendly format. This

allows you to determine whether the

document is what you need, before

downloading the entire file.

The site is searchable. Among the

possible search criteria are part

numbers, function, topics and appli-

cations. The search is performed on a

user-defined combination of data

sheets, application notes, design notes

and Linear Technology magazine ar-

ticles. Any data sheet, application

note, design note or magazine article

can be downloaded or Faxed back.

(Files are downloaded in Adobe Acro-

bat PDF format; you will need a copy

of Acrobat Reader to view or print

them. The site includes a link from

which you can download this pro-

gram.)

The site also makes it possible to

order the LinearView CD-ROM,

databooks, application handbooks,

and other paper-based publications

and make sample requests. Design

tools, such as SwitcherCAD, Micro-

PowerSwitcherCAD and FilterCAD,

can be downloaded.

0.2V/DIV

5µs/DIV

Linear Technology Magazine • December 1996

DESIGN IDEAS

Micropower ADC and DAC in SO-8

Give PC 12-Bit Analog Interface

by Kevin R. Hoskins

Needing to add two channels of

simple, inexpensive, low powered,

compact analog input/output to a PC

computer, I chose the LTC1298 ADC

and LTC1446 DAC. The LTC1298 and

the LTC1446 are the ﬁrst SO-8 pack-

aged 2-channel devices of their kind.

The LTC1298 draws just 340µA. A

built-in auto shutdown feature fur-

ther reduces power dissipation at

reduced sampling rates (to 30µA at

1ksps). Operating on a 5V supply, the

LTC1446 draws just 1mA (typ). Al-

though the application shown is for

PC data acquisition, these two con-

verters provide the smallest, lowest

power solutions for many other ana-

log I/O applications.

The circuit shown in Figure 1 con-

nects to a PC’s serial interface using

four interface lines: DTR, RTS, CTS

and TX. DTR is used to transmit the

serial clock signal, RTS is used to

transfer data to the DAC and ADC,

CTS is used to receive conversion

results from the LTC1298 and the

signal on TX selects either the

LTC1446 or the LTC1298 to receive

input data. The LTC1298’s and

LTC1446’s low power dissipation

allows the circuit to be powered from

the serial port. The TX and RTS lines

DI1466_01.eps

OUTB

GND

OUT2

OUT1

OUTA

CLK

CS/LD

LTC1446

OUT

INPUT 1

INPUT 2

CLK

OUT

CH0 0.1µF

CH1

LTC1298

510Ω

4 x 1N914

GND

CLR

1/2 74HC74

LT1021-5

47µFC4

150µF

CLR

1/2 74HC74

151k TX

RTS

DTR

CTS

SELECT

CLK

OUT

51k

D3

1N914 D4

1N914

0.1µF

charge capacitor C4 through diodes

D3 and D4. An LT1021-5 regulates

the voltage to 5V. Returning the TX

and RTS lines to a logic high after

sending data to the DAC or comple-

tion of an ADC conversion provides

constant power to the LT1021-5.

Using a 486-33 PC, the through-

put was 3.3ksps for the LTC1298 and

2.2ksps for the LTC1446. Your mile-

age may vary.

Listing 1 is C code that prompts

the user to either read a conversion

result from the ADC’s CH0 or write a

data word to both DAC channels.The

code is available on disk from LTC.

Figure 1. Communicating over the serial port, the LTC1298 and LTC1446 in SO-8 create a simple,

low power, 2-channel analog interface for PCs.

Listing 1. Conﬁgure analog interface with this C code

#deﬁne port 0x3FC /* Control register, RS232 */

#deﬁne inprt 0x3FE /* Status reg. RS232 */

#deﬁne LCR 0x3FB /* Line Control Register */

#deﬁne high 1

#deﬁne low 0

#deﬁne Clock 0x01 /* pin 4, DTR */

#deﬁne Din 0x02 /* pin 7, RTS */

#deﬁne Dout 0x10 /* pin 8, CTS input */

#include<stdio.h>

#include<dos.h>

Linear Technology Magazine • December 1996

DESIGN IDEAS

#include<conio.h>

/* Function module sets bit to high or low */

void set_control(int Port,char bitnum,int ﬂag)

{

char temp;

temp = inportb(Port);

if (ﬂag==high)

temp |= bitnum; /* set output bit to high */

elsetemp &= ~bitnum; /* set output bit to low */

outportb(Port,temp);

}/* This function brings CS high or low (consult the schematic) */

void CS_Control(direction)

{

if (direction)

{

set_control(port,Clock,low); /* set clock high for Din to be read */

set_control(port,Din,low); /* set Din low */

set_control(port,Din,low); /* set Din high to make CS goes high */

}

else {

outportb(port, 0x01); /* set Din & clock low */

Delay(10);

outportb(port, 0x03); /* Din goes high to make CS go low */

}

}/* This function outputs a 24-bit (2x12) digital code to LTC1446L */

void Din_(long code,int clock)

{int x;

for(x = 0; x<clock; ++x)

{

code <<= 1; /* align the Din bit */

if (code & 0x1000000)

{

set_control(port,Clock,high); /* set Clock low */

set_control(port,Din,high); /* set Din bit high */

}

else {

set_control(port,Clock,high); /* set Clock low */

set_control(port,Din,low); /* set Din low */

}

set_control(port,Clock,low); /* set Clock high for DAC to latch */

}

}/* Read bit from ADC to PC */

Dout_()

{

int temp, x, volt =0;

Linear Technology Magazine • December 1996

DESIGN IDEAS

for(x = 0; x<13; ++x)

{

set_control(port,Clock,high);

set_control(port,Clock,low);

temp = inportb(inprt); /* read status reg. */

volt <<= 1; /* shift left one bit for serial transmission */

if(temp & Dout)

volt += 1; /* add 1 if input bit is high */

}

return(volt & 0xfff);

}

/* menu for the mode selection */

char menu()

{

printf(“Please select one of the following:\na: ADC\nd: DAC\nq: quit\n\n”);

return (getchar());

}

void main()

{

long code;

char mode_select;

int temp,volt=0;

/* Chip select for DAC & ADC is controlled by RS232 pin 3 TX line. When LCR’s bit 6 is set, the

DAC is selected and the reverse is true for the ADC. */

outportb(LCR,0x0); /* initialize DAC */

outportb(LCR,0x64); /* initialize ADC */

while((mode_select = menu()) != ‘q’)

{

switch(mode_select)

{

case ‘a’:

{

outportb(LCR,0x0); /* selecting ADC */

CS_Control(low); /* enabling the ADC CS */

Din_(0x680000, 0x5); /* channel selection */

volt = Dout_();

outportb(LCR,0x64); /* bring CS high */

set_control(port,Din,high); /* bring Din signal high */

printf(“\ncode: %d\n”,volt);

}

break;

case ‘d’:

{

printf(“Enter DAC input code (0 – 4095):\n”);

scanf(“%d”, &temp);

code = temp;

code += (long)temp << 12; /* converting 12-bit to 24-bit word */

outportb(LCR,0x64); /* selecting DAC */

CS_Control(low); /* CS enable */

continued on page 37

Linear Technology Magazine • December 1996

DESIGN IDEAS

High Efﬁciency, Low Power,

3-Output DC/DC Converter by John Seago

The recent proliferation of battery

powered products has created a lot of

interest in low power, high efﬁciency

DC/DC converter designs. These

products are small, lightweight and

portable, so space for bulky batteries

is limited. Often, operating time

between charges is a major selling

feature, making the efﬁcient use of

battery power very important. Since

many products cannot function with

a single regulated voltage, multiple-

output DC/DC converters are

required.

Although developed for somewhat

higher power levels, the single output

LTC1435 can be used in applications

requiring a very efﬁcient, very small,

low power, multiple-output DC/DC

converter (see Figure 1). This is

accomplished through the use of an

overwound buck inductor. With addi-

tional windings, the inductor can

provide additional outputs, requiring

only a diode and ﬁlter capacitor for

each output. As with the less efﬁcient

ﬂyback topology, the additional out-

puts are not as well regulated as the

primary output, but the regulation is

suitable for most applications.

The circuit of Figure 1 provides

3.3V at 0.5A, 5V at 0.1A and –5V at

0.05A, and has greater than 93%

efﬁciency for test loads between 1.25W

and 2.4W with a 6V input. Load and

line regulation of the positive outputs

are quite good. Each output voltage

was measured with all output cur-

rents varied independently between

20% and 100% of their full load range,

while the input voltage was varied

from 6V to 20V. Table 1 shows the

worst-case output voltages measured.

The buck regulator with an over-

wound inductor is a good solution for

those applications that do not have

large load current or line voltage varia-

tions. The smaller the load and line

variations, the smaller the voltage

variations on the overwound outputs.

As a general rule, output voltage regu-

lation is suitable for most applications

if the switch duty cycle is kept between

15% and 50% and minimum load

current is kept above 20% of maxi-

mum. Since load variation and line

variation have an additive effect on

output voltage, applications with

relatively constant load current

requirements can have a larger input

voltage range and vice versa. For zero

output current requirements, a small

preload resistor can be used.

1

2

3

4

5

6

7

16

15

14

13

12

11

10

TG

BOOST

SW

VIN

INT VCC

BG

PGND

EXT VCC

U1

LTC1435CS

C6

0.001µF

C3

330pF

C4, 47pF

C2, 0.1µF

C5

100pF

C1

68pF

6V TO 20V

R1, 10k

R3, 100Ω

C8

0.1µF

C7

22µF

35V

Q1

1/2 Si9936

C11

220pF

C12

100µF

10V

C13

100µF

10V

C14

100µF

10V

–5V/0.05A

3.3V/0.5A

5V/0.1A

GND

D4

MBR0540

D3

MBR0540

R5

0.1ΩR6

35.7k

R7

20k

Q2

1/2 Si9936

D1, MBR0530

D2

MBRS130L

R4

C9, 0.1µF

C10, 4.7µF

R2, 100Ω

COSC

RUN/SS

ITH

SFB

SGND

VOSENSE

SENSE–

SENSE+

DI1435_01.eps

SPECIAL PARTS

 R5 = IRC, LR2010-01-R100-J

 C7 = AVX, TPSE226M035R0300

 C12, 13, 14 =AVX, TPSD107M010R0100

 T1 = COILTRINOCS, CTX02-13299

 Q1/Q2 = SILICONIX, Si9936DY

 U1 = LINEAR TECHNOLOGY, LTC1435CS

30µH

Figure 1. High efﬁciency, 3-output DC/DC converter

tuptuOmuminiMmumixaM

V3.3V703.3V513.3

V5V30.5V42.5

V5–V89.4–V15.5–

Table 1. Worst-case output voltages

Linear Technology Magazine • December 1996

DESIGN IDEAS

Synchronizing LTC1430s

for Reduced Ripple by Craig Varga

The recent move to split-plane

microprocessors by several CPU

makers has led to the inclusion of

multiple switching regulators on many

motherboard designs. These regula-

tors typically provide 3.3V for system

logic and a separate supply for the

processor core. Current requirements

of 5A–10A or more per supply are not

unusual. The LTC1430 synchronous

buck regulator is commonly used to

provide these tightly regulated sup-

plies. By nature, the input current

waveform in the buck topology is dis-

continuous, resulting in large input

ripple current. By synchronizing a

pair of supplies out of phase, it is

possible to achieve a degree of ripple

current cancellation. This results in

less stress on the input capacitors

(the number of input capacitors could

be reduced) and lower EMI. The ripple

is easier to ﬁlter since the frequency

is effectively doubled and the peak-

to-peak current is reduced.

It is extremely simple to synchro-

nize a pair of LTC1430s in an

appropriate phase relationship.

Simply connect a resistor divider from

the low gate drive of a “master” regu-

lator to the sync pin of a “slave”

regulator. The resistors should divide

the gate-drive voltage down to some-

thing slightly less than the V

supply

of the slave regulator, typically from

12V down to approximately 4.5V. Total

divider resistance of 20k to 30k is

adequate. Also, the slave regulator

must be set up to free run slower than

the master regulator. If, for example,

the master is conﬁgured to run at

approximately 300kHz (a 130k resis-

tor from FSET to ground) the slave

can be left to run at its natural fre-

quency of 200kHz. The slave frequency

will be forced up to that of the master.

The sync function on the LTC1430

works as follows: when the shutdown

pin is pulled low, the high-side switch

turns off; normal duty factor control

determines when the high-side switch

will turn back on. As long as the

shutdown pin is held low for less than

approximately 40µs, the chip will not

shut down.

The simpliﬁed schematic (Figure

1) shows the synchronization cir-

cuitry. For a detailed description of

LTC1430-based regulator designs, see

the LTC1430 data sheet. The scope

photo (Figure 2) shows the voltage at

the common connection of the two

FETs of each regulator.

15

14

11

12

8

10

9

2

1

13

16

3

5

7

PVCC1

G1

IFB

G2

PGND

–SENS

+SENS

U1

LTC1430

12V 5V

R1

130k

PVCC2

Vcc

FSET

IMAX

SD

COMP

SS

SGND

R2

15k

R3

10k

15

14

11

12

8

10

9

2

1

13

16

3

5

7

PVCC1

G1

IFB

G2

PGND

–SENS

+SENS

U2

LTC1430

12V 5V

OUT 2

OUT 1

PVCC2

Vcc

FSET

IMAX

SD

COMP

SS

SGND

DI1430_01.eps

Figure 1. Simpliﬁed schematic diagram of synchronization circuitry

Figure 2. Phase relations looking at the switching nodes of both

regulators

Authors can be contacted

at (408) 432-1900

MASTER

SLAVE

Linear Technology Magazine • December 1996

DESIGN INFORMATION

New Voltage References Are

Smaller and More Precise by John Wright

Introduction

Two new series voltage references

bridge the gap between small pack-

age size and high precision. Advances

in design, process and packaging have

made the introduction of these new

voltage references possible. The low

power LT1460 is designed for mini-

mum space and is available in all

popular voltages, including 2.5V, 5V

and 10V. By contrast, the LT1236 is

designed for use in 12-bit systems

and combines 0.05% accuracy, low

noise and low drift. These new series

references provide supply current and

power dissipation advantages over

older shunt references that must idle

the entire load current to operate.

Furthermore, series references are

seeing more duty as mini-regulators

in data conversion and low power

electronics.

The Small Fry

The LT1460 is a tiny, low power,

bandgap series reference with big

performance. It uses curvature com-

pensation to obtain low drift, and

trimmed precision thin-ﬁlm resistors

to achieve high output accuracy. Its

performance does not degrade in

either the SO-8 or MSOP packages.

Surface mount packages are very

space efﬁcient, but the use of a large

output capacitor to stabilize the ref-

erence defeats the purpose of the

small package. The LT1460 is stable

with load capacitors, or with no ca-

pacitor at all (see Figure 1). This can

be helpful when fast settling is a goal,

since load capacitors that change their

voltages must recover before the ref-

erence value is accurate.

The LT1460 uses so little PC board

space that there is a temptation to

use the device as a “local” regulator.

This is exactly what the LT1460 was

designed to do: deliver substantial

load current while maintaining refer-

ence-like features. At I

OUT

= 30mA,

Figure 1. LT1460 transient response for

OUT

= 10mA, and C

= 0, 0.1

F, 1

F, 10

Table 2. Key speciﬁcations of the LT1236-10 voltage reference, SO-8 package

retemaraPsnoitidnoCeulaV

ecnareloTegatloVtuptuO

A0641TL

B0641TL

75%0.0

%01.0

tneiciffeoCerutarepmeT A0641TL B0641TL C˚/mpp01 C˚/mpp02

noitalugeReniLV03otV5.4V/mpp01

gnicruoSnoitalugeRdaoLI

TUO

=Am03Am/mpp07

egatloVtuoporDI

TUO

Am0=V7.0

tnerruCylppuSI

TUO

Am0=001µA

egakaeLesreveRI

TUO

V,Am0=

V02–=02µA

egatloVesioNtuptuOzH1.0≤f≤zH0152µV

P–P

segatloVtuptuOV01,V0.5,V5.2

0˚C ≤ T

≤ +85˚C

Table 1. Key speciﬁcations of the LT1460 voltage reference, SO-8 package

retemaraPsnoitidnoCeulaV

ecnareloTegatloVtuptuO

A6321TL

B6321TL

C6321TL

%50.0

%1.0

%51.0

arepmeTtneiciffeoCerut

A6321TL

B6321TL

C6321TL

C˚04–≤T

≤C˚58+

C˚/mpp5

C˚/mpp01

C˚/mpp51

noitalugeReniLV5.11≤V

≤V04V/mpp4

gnicruoSnoitalugeRdaoLAm0≤I

TUO

≤Am01Am/mpp52

esioNtuptuOzH01≤f≤zHk10.6µV

SMR

tnerruCylppuSI

TUO

Am0=Am7.1

10µF

1µF

0.1µF

0µF

Linear Technology Magazine • December 1996

DESIGN INFORMATION

TIME (DAYS)

LONG TERM STABILITY

–10

OUTPUT VOLTAGE CHANGE (PPM)

35 42 49 56 63 70 77 84 910 7 14 2821

LT1236-5

SO-8

the load regulation is 70ppm/mA, yet

the LT1460 can withstand a short to

ground without being destroyed.

Additionally, if the power supplies

are reversed, the reverse battery

protection keeps the reference

from conducting current and being

damaged (see Table 1).

Figure 2. LT1236 long-term stability

Higher Performance,

Industrial Temperature

Range and Surface Mount

The LT1236 is a precision reference

that combines ultralow drift and noise

with excellent long-term stability and

high output accuracy. To address

small package requirements, the new

reference is available in the SO-8

package and guarantees critical ref-

erence parameters from −40˚C to 85˚C

(see Table 2). The LT1236 output will

both source and sink 10mA, is almost

totally immune to input voltage varia-

tions and, like the LT1460, is stable

with any load capacitor. Two output

voltages are available: 5V and 10V.

The 10V version can be used as a

shunt regulator (2-terminal Zener)

with the same precision characteris-

tics as the 3-terminal connection.

Special care has been taken to mini-

mize thermal regulation effects and

temperature-induced hysteresis. The

LT1236 combines superior accuracy

and temperature-coefﬁcient speciﬁ-

cations, without using high power,

on-chip heaters. The LT1236 refer-

ences are based on a buried Zener

diode structure that eliminates noise

and stability problems that plague

surface-breakdown devices.

high as 4 watts. These losses are

primarily in the two MOSFETs, the

inductor and the current sensing

resistor. Since these are surface

mount components, the major ther-

mal paths are through the pc board

copper to the surrounding air. Maxi-

mizing copper area around the heat

producing components, increasing

board area and using double-sided

board with feedthrough vias all con-

tribute to heat dissipation. Remember,

the pc board is the heat sink.

One exception to the maximum

copper area rule is the switch node

consisting of Q1’s source, Q2’s drain

and the left side of L1. This node

switches between ground and V

at a

200kHz rate. To minimize radiation

from this node, it should be short and

direct. Other copper traces related to

input and output capacitors and

MOSFET connections should also be

as short as practical. See the LTC1435

data sheet for information on good

layout practices and additional appli-

cations information.

Loads For Testing

When testing the charger, several dif-

ferent types of loads can be used. If

the battery to be charged is available,

use it for the load. Alternatively, a

battery can be simulated by adjust-

ing a power supply to the nominal

battery voltage, preloading it with as

many amps as the charger is capable

of delivering, (using power resistors)

and then connecting it to the charger

output. A resistor can also be used for

a load, but the charger may require

additional output capacitance to

prevent oscillations. This added

capacitance is not needed when a

battery is connected to the charger

output.

Noncharger Applications

The LTC1435 and LT1620 can also be

used for an adjustable current limit,

high efﬁciency, low dropout power

supply in situations where higher

output voltages (greater than the 10V

maximum limit of the LTC1435 by

itself) are needed.

When used for nonbattery applica-

tions, more low ESR capacitance is

needed on the output and the com-

pensation component values (R5, C13,

and C14) may require changes. Pulse

loading the output and checking the

transient response is a simple means

of checking loop stability.

Other Versions

of the LT1620

The 16-pin version of the LT1620

includes an additional, gain-of-20

ampliﬁer and a comparator with an

open-collector output. This output

can be used for charge termination in

a Li-Ion battery charger or as a signal

to switch from a charge voltage to a

ﬂoat voltage in a lead-acid battery

charger system.

Lithium-ion and lead-acid batter-

ies are normally charged with a

current limited, constant-voltage

source. As the battery charges, the

internal battery voltage rises and the

charging current begins to taper off.

When the charging current drops to

1/20 of the maximum programmed

charging current, the comparator

pulls low. Also available in a 16-pin

DIP is a LT1621. This part contains

two independent current control loops

for dual-loop control. The second con-

trol loop can be used for input current

limiting from the power source.

Refer to the LTC1435 and LT1620

data sheets for additional

information.

LT1620, continued from page 26

Linear Technology Magazine • December 1996

Din_(code,24); /* loading digital data to DAC */

outportb(LCR,0x0); /* bring CS high */

outportb(LCR,0x64); /* disabling ADC */

set_control(port,Din,high); /* bring Din signal high */

}

break;

}

–

R2R_08.eps

74HC04

IN1

OUT

S/D

LT1218

IN2

INPUT

SELECT

Figure 8. MUX ampliﬁer

Figure 9. MUX ampliﬁer waveforms

Rail-to-Rail, continued from page 19

PC Analog Interface, continued from page 32

100kHz 4th Order Butterworth

Filter for 3V Operation

The ﬁlter shown in Figure 4 uses the

low voltage operation and wide band-

width of the LT1498. Operating in the

inverting mode for lowest distortion,

the output swings rail-to-rail. The

graphs in Figures 5–7 display the

measured lowpass and distortion

characteristics with a 3V power sup-

ply. As seen from the graphs, the

distortion with a 2.7V

P–P

output is

under 0.03% for frequencies up to the

cutoff frequency of 100kHz. The stop

band attenuation of the ﬁlter is greater

than 90dB at 10MHz.

Multiplexer

A buffered MUX with good offset char-

acteristics can be constructed using

the shutdown feature of the LT1218.

In shutdown, the output of the LT1218

assumes a high impedance, so the

outputs of two devices can be tied

together (wired OR, as they say in the

digital world). As shown in Figure 8,

the shutdown pins of each LT1218

are driven by a 74HC04 buffer. The

LT1218 is active with the shutdown

pin high. The photo in Figure 9 shows

the switching characteristics with a

1kHz sine wave applied to one input

and the other input tied to ground. As

shown, each ampliﬁer is connected

for unity gain, but either ampliﬁer or

both could be conﬁgured for gain.

Conclusion

The latest members of LTC’s family of

rail-to-rail ampliﬁers expand the ver-

satility of rail-to-rail operation to

micropower and high speed applica-

tions. The devices maintain precision

speciﬁcations over the entire rail-

to-rail input range and have open

loop gains of one million or more.

These characteristics, combined with

low voltage operation, makes for truly

versatile ampliﬁers.

FREQUENCY (Hz)

–110

–50

–60

–70

–80

–90

–100

–10

–20

–30

–40

GAIN (dB)

10M

R2R_05.eps

100 100k 1M1k 10k

V

=3V

V

=2.7V

P-P

AMPLITUDE (V

P-P

)

0.001

0.01

0.1

THD + NOISE (%)

R2R_06.eps

0.01 0.1 1

V

=3V

ƒ =20kHz

FREQUENCY (Hz)

0.001

0.01

0.1

THD (%)

100k

R2R_07.eps

100 1k 10k

V

=3V

V

=2.7V

P-P

Figure 5. Filter frequency response Figure 6. Filter distortion vs amplitude Figure 7. Filter distortion vs frequency

CONTINUATIONS

VIN1

VOUT

INPUT

SELECT

Linear Technology Magazine • December 1996

NEW DEVICE CAMEOS

LTC1473 PowerPath Switch

The LTC1473 is a power management

IC designed to drive and protect two

sets of back-to-back N-channel

MOSFET switches in battery-oper-

ated equipment such as notebook

computers. The LTC1473 has a wide

supply range (5V to 30V) to work with

most available battery packs and DC

adapters. Within this supply range,

the supply current is a mere 100µA.

When V

drops below 3.2V, the

LTC1473 shuts down and draws just

5µA of supply current.

An internal boost regulator pro-

vides the voltage to fully enhance the

logic level N-channel MOSFET

switches. N-channel MOSFETs are

ideal for battery operated equipment

because of their extremely low R

DS(ON)

and small package size. Connected

back-to-back (actually, source to

source), two N-channel MOSFETs in

a single package block current in

both directions when they are off. A

unique start-up mode allows the sys-

tem to start regardless of which of the

two sets of MOSFET switches receives

power ﬁrst.

The LTC1473 uses a current sense

loop to limit current ﬂow through the

batteries and system supply capaci-

tor during switchover transitions or

during a fault condition. When an

N-channel MOSFET switch enters the

current limit condition, a fault timer

will start timing. If this condition

exceeds a user-programmable delay

time, the MOSFET switch latches off.

Deselecting the MOSFET switch resets

the latch.

The LTC1473 is available in a

16-pin narrow SSOP package.

LT2078/LT2079

and LT2178/LT2179

Single Supply, Micropower,

Precision Ampliﬁers in

Surface Mount Packages

With their outstanding DC precision

and low supply current (only 55µA

and 21µA per op amp, respectively),

the LT1078/LT1079 and LT1178/

LT1179 have become true industry

standards. However, these devices

have much better offset voltage and

New Device Cameos

For further information on any

of the devices mentioned in this

issue of Linear Technology, use

the reader service card or call

the LTC literature service

number:

1-800-4-LINEAR

Ask for the pertinent data sheets

and Application Notes.

Authors can be contacted

at (408) 432-1900

offset voltage drift speciﬁcations in

the dual inline package (DIP) than in

the small surface mount package (SO).

This is because the plastic surface

mount packages, in cooling, exert

stress on the top and sides of the die,

causing changes in the offset voltage.

In response to this problem, LTC

has created the new LT2078/LT2079

and LT2178/LT2179 single supply,

surface mount op amps. These de-

vices use a new, thin (approximately

50 microns), jelly-like coating, ap-

plied via a new dispensing system, to

reduce stress on the top of the die.

The result is that these parts have

signiﬁcantly superior V

and V

drift specs than their predecessors.

The circuit design and process used

for the LT2078/LT2079 and LT2178/

LT2179 is the same as that for the

LT1078/LT1079 and LT1178/

LT1179, resulting in identical AC

performance.

These new parts are available in 8-

and 14-lead SO packages, for opera-

tion over the commercial, industrial

and extended temperature ranges.

Linear Technology Magazine • December 1996

Applications on Disk

Noise Disk — This IBM-PC (or compatible) program

allows the user to calculate circuit noise using LTC op

amps, determine the best LTC op amp for a low noise

application, display the noise data for LTC op amps,

calculate resistor noise and calculate noise using specs

for any op amp. Available at no charge.

SPICE Macromodel Disk — This IBM-PC (or compat-

ible) high density diskette contains the library of LTC

op amp SPICE macromodels. The models can be used

with any version of SPICE for general analog circuit

simulations. The diskette also contains working circuit

examples using the models and a demonstration copy

of PSPICE™ by MicroSim. Available at no charge.

SwitcherCAD

— SwitcherCAD is a powerful PC software

tool that aids in the design and optimization of switch-

ing regulators. The program can cut days off the design

cycle by selecting topologies, calculating operating

points and specifying component values and

manufacturer's part numbers. 144 page manual in-

cluded. $20.00

SwitcherCAD supports the following parts: LT1070

series: LT1070, LT1071, LT1072, LT1074 and LT1076.

LT1082. LT1170 series: LT1170, LT1171, LT1172 and

LT1176. It also supports: LT1268, LT1269 and LT1507.

LT1270 series: LT1270 and LT1271. LT1371 series:

LT1371, LT1372, LT1373, LT1375, LT1376 and

LT1377.

Micropower SwitcherCAD

— MicropowerSCAD is a

powerful tool for designing DC/DC converters based

on Linear Technology’s micropower switching regula-

tor ICs. Given basic design parameters,

MicropowerSCAD selects a circuit topology and offers

you a selection of appropriate Linear Technology switch-

ing regulator ICs. MicropowerSCAD also performs

circuit simulations to select the other components

which surround the DC/DC converter. In the case of a

battery supply, MicropowerSCAD can perform a bat-

tery life simulation. 44 page manual included.

$20.00

MicropowerSCAD supports the following LTC micro-

power DC/DC converters: LT1073, LT1107, LT1108,

LT1109, LT1109A, LT1110, LT1111, LT1173, LTC1174,

LT1300, LT1301 and LT1303.

Technical Books

1990 Linear Databook, Vol I —This 1440 page collec-

tion of data sheets covers op amps, voltage regulators,

references, comparators, ﬁlters, PWMs, data conver-

sion and interface products (bipolar and CMOS), in

both commercial and military grades. The catalog

features well over 300 devices. $10.00

1992 Linear Databook, Vol II — This 1248 page

supplement to the 1990 Linear Databook is a collection

of all products introduced in 1991 and 1992. The

catalog contains full data sheets for over 140 devices.

The 1992 Linear Databook, Vol II is a companion to the

1990 Linear Databook, which should not be discarded.

$10.00

DESIGN TOOLS

1994 Linear Databook, Vol III —This 1826 page

supplement to the 1990 and 1992 Linear Databooks is

a collection of all products introduced since 1992. A

total of 152 product data sheets are included with

updated selection guides. The 1994 Linear Databook

Vol III is a companion to the 1990 and 1992 Linear

Databooks, which should not be discarded. $10.00

1995 Linear Databook, Vol IV —This 1152 page

supplement to the 1990, 1992 and 1994 Linear

Databooks is a collection of all products introduced

since 1994. A total of 80 product data sheets are

included with updated selection guides. The 1995

Linear Databook Vol IV is a companion to the 1990,

1992 and 1994Linear Databooks, which should not be

discarded. $10.00

1996 Linear Databook, Vol V —This 1152 page supple-

ment to the 1990, 1992, 1994 and 1995 Linear

Databooks is a collection of all products introduced

since 1995. A total of 65 product data sheets are

included with updated selection guides. The 1996

Linear Databook Vol V is a companion to the 1990,

1992, 1994 and 1995Linear Databooks, which should

not be discarded. $10.00

1990 Linear Applications Handbook, Volume I —

928 pages full of application ideas covered in depth by

40 Application Notes and 33 Design Notes. This cata-

log covers a broad range of “real world” linear circuitry.

In addition to detailed, systems-oriented circuits, this

handbook contains broad tutorial content together

with liberal use of schematics and scope photography.

A special feature in this edition includes a 22-page

section on SPICE macromodels. $20.00

1993 Linear Applications Handbook, Volume II —

Continues the stream of “real world” linear circuitry

initiated by the 1990 Handbook. Similar in scope to the

1990 edition, the new book covers Application Notes

40 through 54 and Design Notes 33 through 69.

Additionally, references and articles from non-LTC

publications that we have found useful are also in-

cluded. $20.00

Interface Product Handbook

— This 424 page hand-

book features LTC’s complete line of line driver and

receiver products for RS232, RS485, RS423, RS422,

V.35 and AppleTalk

applications. Linear’s particular

expertise in this area involves low power consumption,

high numbers of drivers and receivers in one package,

mixed RS232 and RS485 devices, 10kV ESD protec-

tion of RS232 devices and surface mount packages.

Available at no charge

Power Solutions Brochure

— This 80 page collection

of circuits contains real-life solutions for common

power supply design problems. There are over 79

circuits, including descriptions, graphs and perfor-

mance speciﬁcations. Topics covered include battery

chargers, PCMCIA power management, microproces-

sor power supplies, portable equipment power supplies,

micropower DC/DC, step-up and step-down switching

regulators, off-line switching regulators, linear regula-

tors and switched capacitor conversion.

Available at no charge.

High Speed Ampliﬁer Solutions Brochure

—

This 72 page collection of circuits contains real-life

solutions for problems that require high speed

ampliﬁers. There are 82 circuits including descrip-

tions, graphs and performance speciﬁcations. Topics

covered include basic ampliﬁers, video-related appli-

cations circuits, instrumentation, DAC and photodiode

ampliﬁers, ﬁlters, variable gain, oscillators and current

sources and other unusual application circuits. Avail-

able at no charge

Data Conversion Solutions Brochure — This 52 page

collection of data conversion circuits, products and

selection guides serves as excellent reference for the

data acquisition system designer. Over 60 products

are showcased, solving problems in low power, small

size and high performance data conversion applica-

tions—with performance graphs and speciﬁcations.

Topics covered include ADCs, DACs, voltage refer-

ences and analog multiplexers. A complete glossary

deﬁnes data conversion speciﬁcations; a list of se-

lected Application and Design Notes is also included.

Available at no charge

DESIGN TOOLS

AppleTalk is a registered trademark of Apple Computer,

Inc.

Information furnished by Linear Technology Corporation

is believed to be accurate and reliable. However, Linear

Technology makes no representation that the circuits

described herein will not infringe on existing patent rights.

CD-ROM

LinearView — LinearView™ is Linear Technology’s

interactive PC-based CD-ROM. LinearView allows you

to instantly access thousands of pages of product and

applications information, covering Linear Technology’s

complete line of high performance analog products,

with easy-to-use search tools.

The LinearView CD-ROM includes the complete prod-

uct speciﬁcations from Linear Technology’s Databook

library (Volumes I–IV) and the complete Applications

Handbook collection (Volumes I and II). Our extensive

collection of Design Notes and the complete collection

Linear Technology

magazine are also included.

A powerful search engine built into the LinearView CD-

ROM enables you to select parts by various criteria,

such as device parameters, keywords or part numbers.

All product categories are represented: data conver-

sion, references, ampliﬁers, power products, ﬁlters

and interface circuits. Up-to-date versions of Linear

Technology’s software design tools, SwitcherCAD,

FilterCAD, Noise Disk and Spice Macromodel library,

are also included. Everything you need to know about

Linear Technology’s products and applications is readily

accessible via LinearView. Available at no charge.

Linear Technology Magazine • December 1996

International

Sales Ofﬁces

FRANCE

Linear Technology S.A.R.L.

Immeuble “Le Quartz”

58 Chemin de la Justice

92290 Chatenay Malabry

France

Phone: 33-1-41079555

FAX: 33-1-46314613

GERMANY

Linear Technology GmbH

Oskar-Messter-Str. 24

85737 Ismaning

Germany

Phone: 49-89-962455-0

FAX: 49-89-963147

JAPAN

Linear Technology KK

5F NAO Bldg.

1-14 Shin-Ogawa-cho Shinjuku-ku

Tokyo, 162 Japan

Phone: 81-3-3267-7891

FAX: 81-3-3267-8510

KOREA

Linear Technology Korea Co., Ltd

Namsong Building, #403

Itaewon-Dong 260-199

Yongsan-Ku, Seoul 140-200

Korea

Phone: 82-2-792-1617

FAX: 82-2-792-1619

SINGAPORE

Linear Technology Pte. Ltd.

507 Yishun Industrial Park A

Singapore 2776

Phone: 65-753-2692

FAX: 65-754-4113

SWEDEN

Linear Technology AB

Sollentunavägen 63

S-191 40 Sollentuna

Sweden

Phone: 46-8-623-1600

FAX: 46-8-623-1650

TAIWAN

Linear Technology Corporation

Rm. 602, No. 46, Sec. 2

Chung Shan N. Rd.

Taipei, Taiwan, R.O.C.

Phone: 886-2-521-7575

FAX: 886-2-562-2285

UNITED KINGDOM

Linear Technology (UK) Ltd.

The Coliseum, Riverside Way

Camberley, Surrey GU15 3YL

United Kingdom

Phone: 44-1276-677676

FAX: 44-1276-64851

World Headquarters

U.S. Area

Sales Ofﬁces

NORTHEAST REGION

Linear Technology Corporation

3220 Tillman Drive, Suite 120

Bensalem, PA 19020

Phone: (215) 638-9667

FAX: (215) 638-9764

Linear Technology Corporation

266 Lowell St., Suite B-8

Wilmington, MA 01887

Phone: (508) 658-3881

FAX: (508) 658-2701

NORTHWEST REGION

Linear Technology Corporation

1900 McCarthy Blvd., Suite 205

Milpitas, CA 95035

Phone: (408) 428-2050

FAX: (408) 432-6331

SOUTHEAST REGION

Linear Technology Corporation

17000 Dallas Parkway

Suite 219

Dallas, TX 75248

Phone: (214) 733-3071

FAX: (214) 380-5138

Linear Technology Corporation

5510 Six Forks Road

Suite 102

Raleigh, NC 27609

Phone: (919) 870-5106

FAX: (919) 870-8831

CENTRAL REGION

Linear Technology Corporation

Chesapeake Square

229 Mitchell Court, Suite A-25

Addison, IL 60101

Phone: (708) 620-6910

FAX: (708) 620-6977

SOUTHWEST REGION

Linear Technology Corporation

21243 Ventura Blvd.

Suite 227

Woodland Hills, CA 91364

Phone: (818) 703-0835

FAX: (818) 703-0517

Linear Technology Corporation

15375 Barranca Parkway

Suite A-211

Irvine, CA 92718

Phone: (714) 453-4650

FAX: (714) 453-4765

Linear Technology Corporation

1630 McCarthy Boulevard

Milpitas, CA 95035-7417

Phone: (408) 432-1900

FAX: (408) 434-0507

LINEAR TECHNOLOGY CORPORATION

1630 McCarthy Boulevard

Milpitas, CA 95035-7417

(408) 432-1900 FAX (408) 434-0507

WWW.LINEAR.COM

For Literature Only: 1-800-4-LINEAR