November 2001
2001 Fairchild Semiconductor Corporation FDS6812A Rev B (W)
FDS6812A
Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET
General Description
These N-Channel Logic Level MOSFETs are produced
using Fairchild Semiconductor’s advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
Features
• 6.7 A, 20 V. RDS(ON) = 22 mΩ @ VGS = 4.5 V
RDS(ON) = 35 mΩ @ VGS = 2.5 V
• Low gate charge (12 nC typical)
• High performance trench technology for extremely
low RDS(ON)
• High power and current handling capability
S
D
S
S
SO-8
D
D
D
G
D2 D2 D1 D1
S2G2S1G1
Pin 1
SO-8
4
3
2
1
5
6
7
8
Q1
Q2
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source Voltage 20 V
VGSS Gate-Source Voltage ± 12 V
IDDrain Current – Continuous (Note 1a) 6.7 A
– Pulsed 35
Power Dissipation for Dual Operation 2
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
PD
(Note 1c) 0.9
W
TJ, TSTG Operating and Storage Junction Temperature Range –55 to +150 °C
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDS6812A FDS6812A 13’’ 12mm 2500 units
FDS6812A
FDS6812A Rev B (W)
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA20 V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA, Referenced to 25°C14 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V
VDS = 16 V, VGS = 0 V, TJ = 55°C1
10 µA
IGSSF Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA
IGSSR Gate–Body Leakage, Reverse VGS = –12 V, VDS = 0 V –100 nA
On Characteristics (Note 2)
VGS(th)Gate Threshold Voltage VDS = VGS, ID = 250 µA0.6 0.8 1.5 V
∆VGS(th)
∆TJ
Gate Threshold Voltage
Temperature Coefficient ID = 250 µA, Referenced to 25°C–3.2 mV/°C
RDS(on) Static Drain–Source
On–Resistance VGS = 4.5 V, ID = 6.7 A
VGS = 2.5 V, ID = 5.3 A
VGS = 4.5 V,ID = 7.5 A,TJ = 125°C
17
22
23
22
35
29
mΩ
ID(on) On–State Drain Current VGS = 4.5V, VDS = 5 V 15 A
gFS Forward Transconductance VDS = 5 V, ID = 6.7 A 37 S
Dynamic Characteristics
Ciss Input Capacitance 1082 pF
Coss Output Capacitance 277 pF
Crss Reverse Transfer Capacitance
VDS = 10 V, V GS = 0 V,
f = 1.0 MHz
130 pF
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time 8 16 ns
trTurn–On Rise Time 8 16 ns
td(off) Turn–Off Delay Time 24 38 ns
tfTurn–Off Fall Time
VDD = 10 V, ID = 1 A,
VGS = 4.5 V, RGEN = 6 Ω
8 16 ns
QgTotal Gate Charge 12 19 nC
Qgs Gate–Source Charge 2nC
Qgd Gate–Drain Charge
VDS = 10 V, ID =6.7 A,
VGS = 4.5 V
3nC
Drain–Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain–Source Diode Forward Current 1.3 A
VSD Drain–Source Diode Forward
Voltage VGS = 0 V, IS = 1.3 A (Note 2) 0.7 1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°C/W when
mounted on a 0.5in2
pad of 2 oz copper
b) 125°C/W when
mounted on a 0.02
in2 pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum mounting pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS6812A
FDS6812A Rev B (W)
Typical Characteristics
0
5
10
15
20
25
30
00.5 11.5 22.5 3
VDS, DRAIN-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
3.0V
3.5V
2.5V
2.0V
VGS = 4.5V
0.5
1
1.5
2
2.5
0 5 10 15 20 25 30
ID, DRAIN CURRENT (A)
R
DS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = 2.0V
3.5V
3.0V
4.0V
4.5V
2.5V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
0.8
1
1.2
1.4
1.6
1.8
-50 -25 025 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE (oC)
R
DS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID = 6.7A
VGS = 4.5V
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
1 2 3 4 5
VGS, GATE TO SOURCE VOLTAGE (V)
RDS(ON), ON-RESISTANCE (OHM)
ID = 3.4 A
TA =
125
o
C
TA = 25oC
Figure 3. On-Resistance Variation with
Temperature. Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
5
10
15
20
25
30
0.5 11.5 22.5 3
VGS, GATE TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
TA = -55oC
25
o
C
125
o
C
VDS = 5V
0.0001
0.001
0.01
0.1
1
10
100
00.2 0.4 0.6 0.8 11.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
IS, REVERSE DRAIN CURRENT (A)
TA = 125oC
25oC
-55oC
VGS = 0V
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6812A
FDS6812A Rev B (W)
Typical Characteristics
0
1
2
3
4
5
0246810 12 14
Qg, GATE CHARGE (nC)
V
GS
, GATE-SOURCE VOLTAGE (V)
ID = 6.7A VDS = 5V
15V
10V
0
300
600
900
1200
1500
1800
04812 16 20
VDS, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
CISS
CRSS
COSS
f = 1MHz
VGS = 0 V
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
0.01 0.1 110 100
VDS, DRAIN-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
DC
10s
1s
100ms
100
µ
RDS(ON) LIMIT
VGS = 4.5V
SINGLE PULSE
RθJA = 135oC/W
TA = 25oC
10ms
1ms
0
10
20
30
40
50
0.01 0.1 110 100 1000
t1, TIME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
RθJA(t) = r(t) * RθJA
RθJA = 135oC/W
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
P(pk)
t1t2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6812A
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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