Detailed Description
The MAX1846/MAX1847 current-mode PWM controllers
use an inverting topology that is ideal for generating
output voltages from -500mV to -200V. Features include
shutdown, adjustable internal operating frequency or
synchronization to an external clock, soft-start, adjustable
current limit, and a wide (+3V to +16.5V) input range.
PWM Controller
The architecture of the MAX1846/MAX1847 current-mode
PWM controller is a BiCMOS multi-input system that
simultaneously processes the output-error signal, the
current-sense signal, and a slope-compensation ramp
(Functional Diagram). Slope compensation prevents sub-
harmonic oscillation, a potential result in current-mode
regulators operating at greater than 50% duty cycle. The
controller uses fixed-frequency, current-mode operation
where the duty ratio is set by the input-to-output voltage
ratio. The current-mode feedback loop regulates peak
inductor current as a function of the output error signal.
Internal Regulator
The MAX1846/MAX1847 incorporate an internal low-
dropout regulator (LDO). This LDO has a 4.25V output
and powers all MAX1846/MAX1847 functions (excluding
EXT) for the primary purpose of stabilizing the perfor-
mance of the IC over a wide input voltage range (+3V to
+16.5V). The input to this regulator is connected to IN,
and the dropout voltage is typically 100mV, so that when
VIN is less than 4.35V, VL is typically VIN minus 100mV.
When the LDO is in dropout, the MAX1846/MAX1847 still
operate with VIN as low as 3V. For best performance, it is
recommended to connect VL to IN when the input supply
is less than 4.5V.
Undervoltage Lockout
The MAX1846/MAX1847 have an undervoltage lockout
circuit that monitors the voltage at VL. If VL falls below
the UVLO threshold (2.8V typ), the control logic turns
the P-channel FET off (EXT high impedance). The rest
of the IC circuitry is still powered and operating. When
VL increases to 60mV above the UVLO threshold, the IC
resumes operation from a start up condition (soft-start).
Soft-Start
The MAX1846/MAX1847 feature a “digital” soft-start
that is preset and requires no external capacitor. Upon
startup, the FB threshold decrements from the refer-
ence voltage to 0 in 64 steps over 1024 cycles of fOSC
or fSYNC. See the Typical Operating Characteristics for
a scope picture of the soft-start operation. Soft-start is
implemented: 1) when power is first applied to the IC,
2) when exiting shutdown with power already applied, and
3) when exiting undervoltage lockout.
Shutdown (MAX1847 only)
The MAX1847 shuts down to reduce the supply current
to 10µA when SHDN is low. In this mode, the internal
reference, error amplifier, comparators, and biasing
circuitry turn off. The EXT output becomes high imped-
ance and the external pullup resistor connected to EXT
pulls VEXT to VIN, turning off the P-channel MOSFET.
When in shutdown mode, the converter's output goes to 0.
Frequency Synchronization
(MAX1847 only)
The MAX1847 is capable of synchronizing its switching
frequency with an external clock source. Drive SYNC
with a logic-level clock input signal to synchronize the
MAX1847. A switching cycle starts on the rising edge
of the signal applied to SYNC. Note that the frequen-
cy of the signal applied to SYNC must be higher than
the default frequency set by RFREQ. This frequency
is required so that the internal clock does not start a
switching cycle prematurely. If SYNC is inactive for an
entire clock cycle of the internal oscillator, the internal
oscillator takes over the switching operation. Choose
RFREQ such that fOSC = 0.9 5 fSYNC.
EXT Polarity (MAX1847 only)
The MAX1847 features an option to utilize an N-channel
MOSFET configuration, rather than the typical p-channel
MOSFET configuration (Figure 1). In order to drive the
different polarities of these MOSFETs, the MAX1847
is capable of reversing the phase of EXT by 180
degrees. When driving a P-channel MOSFET, connect
POL to GND. When driving an n-channel MOSFET,
connect POL to VL. These POL connections ensure the
proper polarity for EXT. For design guidance in regard to
this application, refer to the MAX1856 data sheet.
Design Procedure
Initial Specications
In order to start the design procedure, a few parameters
must be identified: the minimum input voltage expect-
ed (VIN(MIN)), the maximum input voltage expected
(VIN(MAX)), the desired output voltage (VOUT), and the
expected maximum load current (ILOAD).
Calculate the Equivalent Load Resistance
This is a simple calculation used to shorten the verifica-
tion equations:
RLOAD = VOUT / ILOAD
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MAX1846/MAX1847 High-Efciency, Current-Mode,
Inverting PWM Controller