19-0960; Rev 2; 1/00 Chopper-Stabilized Op Amps A 14-pin version is available that can be used with either an internal or external clock. The 14-pin version has an output voltage clamp circuit to minimize overload recovery time. Features ICL7650/53 are Improved Second Sources to ICL7650B/53B Lower Supply Current: 2mA Low Offset Voltage: 1V No Offset Voltage Trimming Needed High-Gain CMRR and PSRR: 120dB min Lower Offset Drift with Time and Temperature Extended Common-Mode Voltage Range Low DC Input Bias Current: 10pA Monolithic, Low-Power CMOS Design Ordering Information PART TEMP. RANGE PIN-PACKAGE ICL7650CSA 0C to +70C 8 SO ICL7650CSD ICL7650CPA ICL7650CPD 0C to +70C 0C to +70C 0C to +70C 14 SO 8 Plastic DIP 14 Plastic DIP Precision Amplifier ICL7650CTV ICL7650C/D ICL7650IJA 0C to +70C 0C to +70C -20C to +85C 8 TO-99 Dice 8 CERDIP Instrumentation Amplifier ICL7650IJD -20C to +85C 14 CERDIP Thermocouples ICL7650MTV -55C to +125C 8 CERDIP Thermistors ICL7650MJD -55C to +125C 14 CERDIP Applications Condition Amplifier Strain Gauges Typical Operating Circuit CLAMP INPUT OUTPUT ICL7650 ICL7653 C R C INVERTING AMPLIFIER WITH OPTIONAL CLAMP ICL7650BCSA 0C to +70C 8 SO ICL7650BCSD 0C to +70C 14 SO ICL7650BCPA 0C to +70C 8 Plastic DIP ICL7650BCPD 0C to +70C 14 Plastic DIP ICL7650BCTV 0C to +70C 8 TO-99 ICL7650BC/D 0C to +70C Dice ICL7653CSA 0C to +70C 8 SO ICL7653CPA 0C to +70C 8 Plastic DIP ICL7653CTV 0C to +70C 8 TO-99 ICL7653IJA -20C to +85C 8 CERDIP ICL7653MTV -55C to +125C 8 CERDIP ICL7653BCSA 0C to +70C 8 SO ICL7653BCPA 0C to +70C 8 Plastic DIP ICL7653BCTV 0C to +70C 8 TO-99 Pin Configurations appear at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1 For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. ICL7650/ICL7650B/ICL7653/ICL7653B General Description Maxim's ICL7650/ICL7653 are chopper-stabilized amplifiers, ideal for low-level signal processing applications. Featuring high performance and versatility, these devices combine low input offset voltage, low input bias current, wide bandwidth, and exceptionally low drift over time and temperature. Low offset is achieved through a nulling scheme that provides continuous error correction. A nulling amplifier alternately nulls itself and the main amplifier. The result is an input offset voltage that is held to a minimum over the entire operating temperature range. The ICL7650B/ICL7653B are exact replacements for Intersil's ICL7650B/ICL7653B. These devices have a 10V max offset voltage, a 0.1V/C max input offset voltage temperature coefficient, and a 20pA max bias current--all specified over the commercial temperature range. ICL7650/ICL7650B/ICL7653/ICL7653B Chopper-Stabilized Op Amps ABSOLUTE MAXIMUM RATINGS Total Supply Voltage (V+ to V-)..............................................18V Input Voltage ........................................(V+ + 0.3V) to (V- - 0.3V) Voltage on Oscillator Control Pins (except EXT/CLOCK IN).............................................V+ to VVoltage on EXT/CLOCK IN ..................(V+ + 0.3V) to (V+ - 6.0V) Duration of Output Short Circuit ....................................Indefinite Current into Any Pin ............................................................10mA Current into Any Pin while Operating (Note 1)...................100A Continuous Total Power Dissipation (TA = +70C) 8-Pin SO (derate 5.88mW/C above +70C)...............471mW 8-Pin PDIP (derate 6.9mW/C above +70C)...............552mW 8-Pin CERDIP (derate 8.0mW/C above +70C).........640mW 8-Pin TO-99 (derate 6.7mW/C above +70C)............533mW 14-Pin SO (derate 8.3mW/C above +70C)...............667mW 14-Pin PDIP (derate 10.0mW/C above +70C)..........800mW 14-Pin CERDIP (derate 9.1mW/C above +70C).......727mW Operating Temperature Ranges ICL765_C_ _/ICL755_BC_ _ ...............................0C to +70C ICL765_I_ _/ICL755_BI_ _................................-20C to +85C ICL765_M_ _/ICL755_BM_ _..........................-55C to +125C Storage Temperature Range .............................-65C to +150C Junction Temperature ......................................................+150C Lead Temperature (soldering, 10s) .................................+300C Note 1: Maxim recommends limiting the input current to 100A to avoid latchup problems. A value of 1mA is typically safe; however, this is not guaranteed. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS--ICL7650B/ICL7653B (Circuit of Figure 1, V+ = +5V, V- = -5V, TA = +25C, unless otherwise noted.) PARAMETER Input Offset Voltage SYMBOL VOS TYP MAX TA = +25C CONDITIONS MIN 0.7 5 -55C < TA < +85C 10 -55C < TA < +125C Average Temperature Coefficient of Input Offset Voltage VOS T TA = +25C Input Bias Current IBIAS Doubles every 10 Input Offset Current (Note 2) IOS Input Resistance RIN Large-Signal Voltage Gain Output Voltage Swing (Note 3) AVOL VOUT UNITS V 5.0 50 -20C < TA < +85C 0.01 0.05 TA = +25C 1.5 10 0C < TA < +70C 35 -20C < TA < +85C 100 TA = +25C RL = 10k RL = 10k 105 1* 4.7 RL = 100k V/C pA 0.5 pA 1012 108 V/V 5* 4.85 V 4.95 Common-Mode Voltage Range CMVR Common-Mode Rejection Ratio CMRR CMVR = -5V to +1.6V 120 130 Power-Supply Rejection Ratio PSRR V+ to V- = 3V to 8V 120 130 dB Input Noise Voltage enp-p RS = 100, f = 0 to 10Hz 2 Vp-p 0.01 pA/Hz 2.0 MHz 2.5 V/s 0.2 s Input Noise Current Unity-Gain Bandwidth In -5.0 -5.2 to +2.0 f = 10Hz GBW Slew Rate SR Rise Time tr CL = 50pF, RL = 10k Overshoot Operating Supply Range Supply Current 2 1.6 20 V+ to VISUPP 4.5 No load 2.0 _______________________________________________________________________________________ V dB % 16 V 3.5 mA Chopper-Stabilized Op Amps (Circuit of Figure 1, V+ = +5V, V- = -5V, TA = +25C, unless otherwise noted.) PARAMETER Internal Chopping Frequency Clamp On Current (Note 4) Clamp Off Current (Note 4) SYMBOL fch Offset Voltage vs. Time CONDITIONS Pins 12-14 open (DIP) RL = 100k -4.0V < VOUT < +4.0V MIN 120 25 No load TYP 200 70 1 MAX 375 200 UNITS Hz A pA nV/ month 100 Note 2: IOS = 2 * IBIAS Note 3: OUTPUT and CLAMP pins not connected. Note 4: See Output Clamp section for details. ELECTRICAL CHARACTERISTICS--ICL7650/ICL7653 (Circuit of Figure 1, V+ = +5V, V- = -5V, TA = +25C, unless otherwise noted.) (Note 5) PARAMETER SYMBOL CONDITIONS TA = +25C Input Offset Voltage VOS ICL765_ (Note 6) MIN TYP MAX ICL765_ 0.7 5.0 ICL765_B 1.0 10 0C TA +70C 1.0 10 -20C TA +85C 1.0 10 -55C TA +125C 10 50 0.01 0.05 ICL765_B, 0C TA +70C Average Temperature Coefficient of Input Offset Voltage (Note 6) VOS T ICL765_ TA = +25C Input Bias Current IB ICL765_ Input Resistance 0C TA +70C 0.01 0.1 -20C TA +85C 0.01 0.05 -55C TA +85C 0.01 0.05 +85C TA +125C 0.25 1.5 ICL765_ 4 10 ICL765_B 12 20 0C TA +70C 20 100 -20C TA +85C 50 200 -55C TA +125C 0.3 10 RIN Large-Signal Voltage Gain AVOL Output Voltage Swing (Note 3) VOUT Common-Mode Voltage Range CMVR 1 * 108 0.5 * 108 -20C TA +85C 0.5 * 108 -55C TA +125C 0.2 * 108 4.7 4.85 RL = 100k V/C pA 5 * 108 0C TA +70C RL = 10k V 1012 RL = 10k, TA = +25C UNITS V/V V 4.95 0C TA +70C -5.0 -5.2 to +3.0 2.5 -20C TA +85C -5.0 -5.2 to +3.0 2.5 -55C TA +125C -4.5 -4.0 to +3.0 2.5 V _______________________________________________________________________________________ 3 ICL7650/ICL7650B/ICL7653/ICL7653B ELECTRICAL CHARACTERISTICS--ICL7650B/ICL7653B (continued) ELECTRICAL CHARACTERISTICS--ICL7650/ICL7653 (continued) (Circuit of Figure 1, V+ = +5V, V- = -5V, TA = +25C, unless otherwise noted.) (Note 5) PARAMETER SYMBOL MIN TYP Common-Mode Rejection Ratio CMRR CMVR = -5V to +2.5V 120 130 dB Power-Supply Rejection Ratio PSRR V+ to V- = 3V to 8V 120 130 dB Input Noise Voltage enp-p RS = 100, f = 0 to 10Hz Input Noise Current In Unity-Gain Bandwidth CONDITIONS f = 10Hz GBW Slew Rate SR Rise Time tr CL = 50pF, RL = 10k Overshoot MAX UNITS 2 Vp-p 0.01 pA/Hz 2.0 MHz 2.5 V/s 0.2 s 20 Operating Supply Range V+ to V- Supply Current ISUPP % 4.5 V mA 1.2 2.0 120 200 375 Hz Clamp On Current (Note 4) RL = 100k 25 70 200 A Clamp Off Current (Note 4) -4.0 VOUT +4.0V fCLKOUT No load 16 Pins 13 and 14 open (DIP) Internal Chopping Frequency Offset Voltage vs. Time 1 pA 100 nV/ month Note 3: OUTPUT and CLAMP pins not connected. Note 4: See Output Clamp section for details. Note 5: All pins are designed to withstand electrostatic discharge (ESD) levels in excess of 2000V (MIL STD 8838 Method 3015.1 test circuit). Note 6: Sample tested. Limits are not used to calculate outgoing quality level. Typical Operating Characteristics (Circuit of Figure 1, V+ = +5V, V- = -5V, TA = +25C, unless otherwise noted.) MAXIMUM OUTPUT CURRENT vs. SUPPLY VOLTAGE 0 -10 100 BROADBAND NOISE 10 SUPPLY CURRENT (mA) 1 3 1F (AV = 1000) ICL7650toc03 0.1F CLOCK RIPPLE (Vp-p) SOURCE CURRENT 2 2 1 1 SINK CURRENT -20 -30 0 0.1 2 4 6 8 10 12 TOTAL SUPPLY VOLTAGE (V) 4 1k ICL7650toc02 3 SUPPLY CURRENT vs. SUPPLY VOLTAGE CLOCK RIPPLE REFERRED TO INPUT vs. TEMPERATURE ICL7650toc01 4 MAXIMUM OUTPUT CURRENT (mA) ICL7650/ICL7650B/ICL7653/ICL7653B Chopper-Stabilized Op Amps 14 16 25 50 75 100 TEMPERATURE (C) 125 150 4 6 8 10 12 TOTAL SUPPLY VOLTAGE (V) _______________________________________________________________________________________ 14 16 Chopper-Stabilized Op Amps COMMON-MODE INPUT VOLTAGE RANGE vs. SUPPLY VOLTAGE 0 0 25 50 75 100 NEGATIVE LIMIT 5 4 3 POSITIVE LIMIT 2 -6 -4 -2 1 125 0 1 2 3 4 5 6 AMBIENT TEMPERATURE (C) SUPPLY VOLTAGE (V) INPUT OFFSET VOLTAGE CHANGE vs. SUPPLY VOLTAGE 10Hzp-p NOISE VOLTAGE vs. CHOPPING FREQUENCY 0 1 2 3 0 8 10 8 10 12 14 ICL7650toc08 140 4 50 3 2 120 70 100 90 80 110 60 130 1 RL = 10k CEXT = 0.1F 40 16 20 10 TOTAL SUPPLY VOLTAGE (V) 100 1k 10k 0.01 0.1 1 CHOPPING FREQUENCY (CLOCK-OUT) (Hz) OPEN-LOOP GAIN AND PHASE SHIFT vs. FREQUENCY 140 70 100 90 80 110 60 2 PHASE SHIFT (DEGREES) OUTPUT VOLTAGE (V) 50 120 CLOCK OUT LOW 1 0 CLOCK OUT HIGH -1 100 1k 10k 100k VOLTAGE FOLLOWER LARGE-SIGNAL PULSE RESPONSE 3 ICL7650toc11 3 10 FREQUENCY (Hz) VOLTAGE FOLLOWER LARGE-SIGNAL PULSE RESPONSE ICL7650toac10 160 10k ICL7650toac09 160 2 OUTPUT VOLTAGE (V) 6 1k OPEN-LOOP GAIN AND PHASE SHIFT vs. FREQUENCY 0 4 100 CHOPPING FREQUENCY (CLOCK OUT) (Hz) OPEN-LOOP GAIN (dB) -1 7 5 DC TO 10Hz P-P NOISE VOLTAGE (V) ICL7650toc07 -2 ICL7650toc06 -8 6 ICL7650toc12 -25 -3 OPEN-LOOP GAIN (dB) -10 0 -50 INPUT OFFSET VOLTAGE CHANGE (V) 7 OFFSET VOLTAGE (V) 1 INPUT OFFSET VOLTAGE vs. CHOPPING FREQUENCY ICL7650toc05 ICL7650toc04 2 8 COMMON-MODE INPUT VOLTAGE RANGE (V) SUPPLY CURRENT (mA) 3 1 CLOCK OUT LOW 0 -1 130 -2 RL = 10k CEXT = 1.0F 40 20 -2 -3 0.01 0.1 1 10 100 FREQUENCY (Hz) 1k 10k 100k CLOCK OUT HIGH -3 -1.0 -0.5 0 0.5 1.0 1.5 TIME (s) 2.0 2.5 3.0 -1.0 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 TIME (s) _______________________________________________________________________________________ 5 PHASE SHIFT (DEGREES) SUPPLY CURRENT vs. AMBIENT TEMPERATURE ICL7650/ICL7650B/ICL7653/ICL7653B Typical Operating Characteristics (continued) (Circuit of Figure 1, V+ = +5V, V- = -5V, TA = +25C, unless otherwise noted.) ICL7650/ICL7650B/ICL7653/ICL7653B Chopper-Stabilized Op Amps ICL7650 R2 1M A A INT/EXT OSC EXT CLK IN B C CLK OUT R1 1M OUTPUT ICL7650 ICL7653 INTERNAL BIAS + C CR +IN OUTPUT MAIN C - -IN 0.1F P 0.1F + A CLAMP C N NULL A - B Figure 1. ICL7650 Test Circuit CAP RETURN CEXTA CEXTB Detailed Description Figure 2 shows the major elements of the ICL7650/ ICL7653. Two amplifiers are illustrated, the main amplifier and the nulling amplifier, both of which have offsetnull capability. The main amplifier is connected full time from the input to the output. The nulling amplifier, under control of the chopper-frequency oscillator and clock circuit, alternately nulls itself and the main amplifier. This nulling arrangement, which is independent of the output level, operates over the full power-supply and commonmode ranges. The ICL7650/ICL7653 exhibit an exceptionally high CMRR, PSRR, and A VOL . Their nulling connections, which are MOSFET back gates, have inherently high impedance. Two external capacitors provide storage for the nulling potentials and the necessary nulling-loop time constants. The ICL7650/ICL7653 minimize chopper-frequency charge injection at the input terminals by carefully balancing the input switches. Feed-forward injection into the compensation capacitor, the main cause of output spikes in this type of circuit, is also minimized. Output Clamp (ICL7650 Only) The output clamp reduces the overload recovery time inherent with chopper-stabilized amplifiers. When tied to the summing junction or inverting input pin, a current path between this point and the output occurs just before the output device saturates. This prevents uncontrolled input differential and the consequent charge build-up on the correction-storage capacitors, while causing only a slight reduction in the output swing. 6 EXT CLK IN A = CLK OUT A B C Figure 2. Block Diagram Intermodulation Intermodulation effects can cause problems in older chopper-stabilized amplifier modules. Intermodulation occurs since the amplifier has a finite AC gain, and therefore will have a small AC signal at the input. In a chopper-stabilized module, this small AC signal is detected, chopped, and fed into the offset-correction circuit. This results in spurious outputs at the sum and difference frequencies of the chopping and input signal frequencies. Other intermodulation effects in chopperstabilized modules include gain and phase anomalies near the chopping frequency. These effects are substantially reduced in the ICL7650/ICL7653, which add to the nulling circuit a dynamic current that compensates for the AC signal on the inputs. Unlike modules, the ICL7650/ICL7653 can precisely compensate for the finite AC gain, since both the AC gain rolloff and the intermodulation compensation current are controlled by internal matched capacitors. _______________________________________________________________________________________ Chopper-Stabilized Op Amps Clock Operation The ICL7650's internal oscillator generates a 200Hz frequency, which is available at the CLK OUT pin. The device can also be operated with an external clock, if desired. An internal pull-up permits the INT/EXT pin to be left open for normal operation. However, the internal clock must be disabled and INT/EXT must be tied to Vif an external clock is used. An external clock signal may then be applied to the EXT CLK IN pin. The duty cycle of the external clock is not critical at low frequencies. However, a 50% to 80% positive duty cycle is preferred for frequencies above 500Hz, since the capacitors are charged only when EXT CLK IN is high. This ensures that any transients have time to settle before the capacitors are turned off. The external clock should swing between ground and V+ for power supplies up to 6V, and between V+ and (V+ - 6V) for higher supply voltages. To avoid a capacitor imbalance during overload, use a strobe signal. Neither capacitor will be charged if a strobe signal is connected to EXT CLK IN so that it is low while the overload signal is being applied to the amplifier. A typical amplifier will drift less than 10Vs since the leakage of the capacitor pins is quite low at room temperature. Relatively long measurements may be made with little change in offset. Applications Information Device Selection In applications that require lowest noise, Maxim's ICL7652 may be preferred over the ICL7650/ICL7653. The ICL7650/ICL7653 offer a higher gain-bandwidth product and lower input bias currents, while the ICL7652 reduces noise by using larger input FETs. These larger FETs, however, increase the leakage at the ICL7652's external null pins. Therefore, the ICL7650/ICL7653 can operate to a higher temperature with 0.1F capacitors before the clock ripple (due to leakage at the null capacitor pins) becomes excessive and 1F external capacitors are required. Output Stage/Load Driving The ICL7650/ICL7653 somewhat resemble a transconductance amplifier whose open-loop gain is proportional to load resistance. This behavior is apparent when loads are less than the high-impedance stage (approximately 18k for one output circuit). The open-loop gain, for example, will be 17dB lower with a 1k load than with a 10k load. This lower gain is of little consequence if the amplifier is used strictly for DC since the DC gain is typically greater than 120dB, even with a 1k load. For wideband applications, however, the best frequency response will be achieved with a load resistor of 10k or higher. The result will be a smooth 6dB per octave response from 0.1Hz to 2MHz, with phase shifts of less than 10 in the transition region where the main amplifier takes over from the null amplifier. Component Selection CEXTA and CEXTB, the two required capacitors, have optimum values depending on the clock or chopping frequency. The correct value is 0.1F for the preset internal clock. When using an external clock, scale this component value in proportion to the relationship between the chopping frequency and the nulling time constant. A low-leakage ceramic capacitor may prove suitable for many applications; however, a high-quality film-type capacitor (such as mylar) is preferred. For lowest settling time at initial turn-on, use capacitors with low dielectric absorption (such as polypropylene types). With low-dielectric-absorption capacitors, the ICL7650/ICL7653 will settle to 1V offset in 100ms, but several seconds may be required if ceramic capacitors are used. Thermoelectric Effects Thermoelectric effects developed in thermocouple junctions of dissimilar materials (metals, alloys, silicon, etc.) ultimately limit precision DC measurements. Unless all junctions are at the same temperature, thermoelectric voltages (typically around 10V/C, but up to hundreds of V/C for some materials) will be generated. In order to realize the extremely low offset voltages that the chopper amplifier can provide, take special precautions to avoid temperature gradients. To eliminate air movement, enclose all components (particularly those caused by power-dissipating elements in the system). Minimize power-supply voltages and power dissipation, and use low-thermoelectric-coefficient connections where possible. It is advisable to separate the device surrounding heat-dissipating elements, and to use high-impedance loads. _______________________________________________________________________________________ 7 ICL7650/ICL7650B/ICL7653/ICL7653B Nulling Capacitor Connection Separate pins are provided for CRETN and CLAMP in the ICL7650. If you do not need the clamp feature, order the ICL7653; this device only offers the CRETN pin and will produce slightly lower noise and improved AC common-mode rejection. If you need to use the clamp feature, order the ICL7650 and connect the external capacitors to V-. To prevent load-current IR drops and other extraneous signals from being injected into the capacitors, use a separate PC board trace to connect the capacitor commons directly to the V- pin. The outside foil of the capacitors should be connected to the low-impedance side of the null storage circuit, V- or CRETN. This will act as an ESD voltage shield. Input Guarding Low-leakage, high-impedance CMOS inputs allow the ICL7650/ICL7653 to measure high-impedance sources. Stray leakage paths can decrease input resistance and increase input currents unless inputs are guarded. Boards must be thoroughly cleaned with TCE or alcohol and blown dry with compressed air. The board should be coated with epoxy or silicone after cleaning to prevent contamination. Leakage currents may cause trouble even with properly cleaned and coated boards, particularly since the input pins are adjacent to pins that are at supply potentials. Leakage can be significantly reduced by using guard- R2 R1 INPUT ing to decrease the voltage difference between inputs and adjacent metal runs. Use a 10-lead pin circle, with the leads of the device formed so that the holes adjacent to the inputs are empty when it is inserted in the board to accomplish input guarding of the 8-pin TO-99 package. A conductive ring surrounding the inputs, the "guard," is connected to a low-impedance point that is approximately the same voltage as the inputs. The guard then absorbs the leakage current from the highvoltage pins. Typical guard connections are shown in Figure 3. R3* OUTPUT OUTPUT INPUT R3* INVERTING AMPLIFIER FOLLOWER * USE R3 TO COMPENSATE FOR LARGE SOURCE RESISTANCES, OR FOR CLAMP OPERATION (FIGURE 5). R2 EXTERNAL CAPACITORS V+ OUTPUT EXTERNAL CAPACITORS 67 8 1 5 2 4 3 VGUARD R1 TS OUTPUT PU R3* IN ICL7650/ICL7650B/ICL7653/ICL7653B Chopper-Stabilized Op Amps INPUT NONINVERTING AMPLIFIER NOTE: R1 R2 R1 + R2 SHOULD BE LOW IMPEDANCE FOR OPTIMUM GUARDING. BOTTOM VIEW BOARD LAYOUT FOR INPUT GUARDING WITH TO-99 PACKAGE. Figure 3. Input Guard Connection 8 _______________________________________________________________________________________ Chopper-Stabilized Op Amps Pin Compatibility The ICL7653's pinout generally corresponds to that of industry-standard 8-pin devices such as the LM741 or LM101. However, its external null storage capacitors are connected to pins 1 and 8; whereas most op amps leave these pins open or use them for offset null or compensation capacitors. The OP05 and OP07 op amps can be converted for ICL7650/ICL7653 operation. This can be accomplished by removing the offset null potentiometer, which is connected from pins 1 and 8 to V+, and replacing it with two capacitors connected from pins 1 and 8 to V-. For LM108 devices, the compensation capacitor is replaced by the external nulling capacitors. Pin 5 is the output clamp connection on the ICL7650/ICL7653. By removing any circuit connections from this pin, the LM101/LM748/LM709 devices can undergo a similar conversion. Typical Applications Figure 4 shows the ICL7650/ICL7653 automatically nulling the offset voltage of a high-speed amplifier. The ICL7650/ICL7653 continuously monitor the voltage at RF the amplifier's inverting input, integrate the error, and drive the amplifier's noninverting input to correct for the offset voltage detected at the inverting input. The circuit's DC offset characteristics are determined by the ICL7650/ICL7653, and its AC performance is determined by the high-speed amplifier. While this circuit continuously and automatically adjusts the amplifier's offset to less than 5V, it does not correct for errors caused by the input bias current, so the value of resistor RF should be as low as is practical. This technique can be used with any op amp that is configured as an inverting amplifier. Figures 5 and 6 illustrate basic inverting and noninverting amplifier circuits. Both figures show an output clamping circuit being used to enhance overload recovery performance. Supply voltage (8V max) and output drive capability (10k load for full swing) are the only limitations to consider when replacing other op amps with the ICL7650/ICL7653. Use a simple booster circuit to overcome these limitations (Figure 7). This enables the full output capabilities of the LM118 (or any other standard device) to be combined with the input capabilities of the ICL7650/ICL7653. Observe the loop gain stability carefully when the feedback network is added, particularly when a slower amplifier such as the LM741 is used. A lower voltage supply is required when mixing the ICL7650/ICL7653 with circuits that operate at 15V supplies. One approach is to use a highly efficient voltage divider. This is illustrated in Figure 8, where the ICL7660 voltage converter is used to convert +15V to +7.5V. RIN HIGHSPEED AMP R2 VOUT INPUT R1 1k CLAMP OUTPUT 47 ICL7650 10k C R 100k 0.1F ICL7650 ICL7653 (R1 || R2) 100k FOR FULL CLAMP EFFECT C 0.1F 0.1F NOTE: R1 || R2 INDICATES THE PARALLEL COMBINATION OF R1 || R2. Figure 5. Inverting Amplifier with Optional Clamp Figure 4. Nulling a High-Speed Amplifier _______________________________________________________________________________________ 9 ICL7650/ICL7650B/ICL7653/ICL7653B The 14-pin DIP configuration has been specifically designed to ease input guarding. The pins adjacent to the inputs are not used. ICL7650/ICL7650B/ICL7653/ICL7653B Chopper-Stabilized Op Amps 0.1F 0.1F +7.5V CLAMP +15V C + INPUT OUT R IN C OUTPUT 741 ICL7650 - ICL7650 -15V R2 CLAMP R3 -7.5V R1 0.1F 0.1F R3 + (R1 || R2) > 100k FOR FULL CLAMP EFFECT NOTE: R1 || R2 INDICATES THE PARALLEL COMBINATION OF R1 || R2. 10k 10k Figure 7. Using an Industry-Standard 741 to Boost Output Drive Capability Figure 6. Noninverting Amplifier with Optional Clamp Chip Topography 8 2 3 ICL7660 10F 4 5 INT/EXT +15V +7.5V 10F CEXTB EXT/CLK IN INT/ CLK OUT CEXTA 0V V+ 6 OUTPUT 1M 0.090" (2.29mm) Figure 8. Splitting +15V with an ICL7660, 95% Efficiency (Same for -15V) -INPUT +INPUT CLAMP VCRETN 0.069" (1.75mm) 10 ______________________________________________________________________________________ Chopper-Stabilized Op Amps TOP VIEW CEXTB CEXTB 1 14 INT/EXT CEXTA 2 13 EXT/CLK IN N.C. (GUARD) 3 -INPUT 4 12 INT/CLK OUT MAX7650 CEXTA 1 CEXTB 7 V+ 3 6 OUTPUT V- 4 5 CLAMP -INPUT 2 ICL7650 11 V+ +INPUT 5 10 OUTPUT N.C. (GUARD) 6 9 CLAMP V- 7 8 CRETN CEXTA 8 +INPUT 8 1 -INPUT 2 7 6 OUTPUT ICL7650 +INPUT 3 SO/DIP/CERDIP 5 4 V- V+ CLAMP TO-99 SO/DIP/CERDIP N.C. = NO INTERNAL CONNECTION CEXTB CEXTA CEXTA 1 8 CEXTB 7 V+ 3 6 OUTPUT V- 4 5 CRETN -INPUT 2 SO/DIP/CERDIP 1 -INPUT 2 ICL7653 +INPUT 8 +INPUT 7 6 OUTPUT ICL7653 3 5 4 V- V+ CRETN TO-99 ______________________________________________________________________________________ 11 ICL7650/ICL7650B/ICL7653/ICL7653B Pin Configurations Chopper-Stabilized Op Amps ICL7650/ICL7650B/ICL7653/ICL7653B SOICN.EPS Package Information Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.