19-0188; Rev 0; 11/93 Analog Power Controllers General Description The MAX613/MAX614 contain switches for the VPP supply-voltage lines for Personal Computer Memory Card International Association (PCMCIA) Release 2.0 card slots. These ICs also contain level-translator out- puts to switch the PCMCIA card VCC. The MAX613 allows digital control of two separate VPP lines that can be switched between OV, VCC, +12V, and high impedance. It also includes level shifters that allow the control of N-channel power MOSFETs for con- necting and disconnecting the slot VCC supply voltage. The MAX614 controls a single VPP supply-voltage line and includes one level shifter in an 8-pin package. Applications Notebook and Palmtop Computers Personal Organizers Digital Cameras MAXKLM Dual-Slot PCMCIA Features # Logic Compatible with industry-Standard PCMCIA Digital Controllers: Intel 82365SL Intel 82365SL DF Vadem VG-365 Vadem VG-465 Vadem VG-468 Cirrus Logic CL-PD6710 Cirrus Logic CL-PD6720 @ OVVCC/+12V/High-lmpedance VPP Outputs Internal 1.6Q VPP Power Switches @ 10nA Quiescent Supply Current # Break-Before-Make Switching @ VCC Switch Control Ordering Information Handiterminals PART TEMP. RANGE _PIN-PACKAGE Bar-Code Readers MAX613CPD OC to +70C 14 Plastic DIP MAX613CSD 0C to +70C 14S0 MAX613EPD -40C to +85C 14 Plastic DIP Fy - . -40 14S0 Pin Configurations MAX613ESD 40C to +85C gura MAX614CPA OC to +70C 8 Plastic DIP MAX614CSA OC to +70C &SO TOP VIEW MAX614EPA -40C to+85C _8 Plastic DIP . ~ MAX614ESA 40C t0+85C 8 SO eno [7 | 4| VPPIN AVPP1 [2] 13] VCCIN averol3 | an axian [!2] PP sveptTa] maxo1s fi) ver Typical Operating Circuit evPro [5 | 0] SHON vec [6 | g ORV wv I2V voco [7 | re] ORV DIP/SO wy 00 VCCIN_VPPIN 5 eno a] ra] vPPIN occano m xXIAA yee CMCIA avert [2] AMAIA 17] von SOCKET Wus19 AVPP vpp1 SLOT prof a CONTROLLER veco[ a | [5 ] DAV BVPP vpP2 DIP/SO MAAXLAA Maxim Integrated Products 4-31 Call toll free 1-800-998-8800 for free samples or literature. PLOXVW/ELOXVNMAX613/MAX61 4 Dual-Slot PCMCIA Analog Power Controllers ABSOLUTE MAXIMUM RATINGS VCCIN to GND. cece renee teeeteeteeneee tae +7V, -0.3V Operating Temperature Ranges: VPPIN to GND ooo. ect nesnerererearee +13.2V, -0.3V MAX61_C_ oo cc ect tes esnsnenececestecsseeetees OC to +70C DRV5, DRV3, DRV to GND .. (VPPIN + 0.3V), -0.3V MAX61_E__ ow 40C to +86C AVPP, BVPP to GND... eee (VPPIN + 0.3V), -0.3V Storage Temperature Range......... -65C to +160C All Other Pins to GND oo... (VCCIN + 0.3V), -0.3V Lead Temperature (soldering, 10S@C) 0.0.0.0... cee +#300C Continuous Power Dissipation (Ta = +70C) 8-Pin Plastic DIP (derate 9.09mW/C above +70C) ....727mMW 8-Pin SO (derate 5.88mMW/C above +70C)........cccce eee 471mw 14-Pin Plastic DIP (derate 10.00mW/C above +70C)...... 300mW 14-Pin SO (derate 8.33mW/C above +70C) 0.0... 667mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periads may affect device reliability. ELECTRICAL CHARACTERISTICS (VCCIN = +5V, VPPIN = +12V, Ta = TMIN to TMAX, unless otherwise noted.) PARAMETER | CONDITIONS | MIN TYP MAX | UNITS POWER REQUIREMENTS VCCIN input Voltage Range 2.85 5.5 VPPIN Input Voltage Range 0 12.6 v MAX613 SHDN = OV 0.05 4 VPPIN Supply Current _ _ _ (12V Mode) AVPP = BVPP = VPPIN = 12.6V SHDN = VCCIN 2.25 10 pA MAX614 0.05 1 MAX613 SHDN = OV 0.05 VPPIN Supply Current VPPIN = 12.6V, (SV Mode) AVPP = BVPP= VCCIN SHDN = VCCIN 2 yA MAX614 0.05 waxerg [SHON = OV on VPPIN Supply Current _ _ (OV Mode) AVPP = BVPP = OV SHDN = VCCIN 2.25 pA MAX614 0.05 MAX613 SHDN = OV 3.5 VCCIN Supply Current _ _ (12V Mode) AVPP = BVPP = VPPIN SHON = VCCIN 20 pA MAX614 3.5 MAX613 SHDN = OV 3.5 10 VCCIN Supply Current _ _ (SV Mode) AVPP = BYPP = VCCIN SHDN = VCCIN 22. ~0 pA MAX614 3.5 10 MAX613 SHDN = OV 3.5 VCCIN Supply Current _ _ (QV Mode) AVPP = BVPP = 0V SHDN = VCCIN 20 pA MAX614 3.6 4-32 PAAXIAADual-Slot PCMCIA Analog Power Controllers ELECTRICAL CHARACTERISTICS (continued) (VCCIN = +5V, VPPIN = +12V, Ta = TmMIN to TMax, unless otherwise noted.) PARAMETER L CONDITIONS | MIN TYP MAX | UNITS DC CHARACTERISTICS VPPIN = 11.4V, OMA < ILoAD < 120mA (12V mode) 1.60 2.45 AVPP, BVPP Switch Resistance VCCIN = 4.5V, OmA < ILoAD < mA (5V mode) 30 50 Q VPPIN = 11.4V, OmA < ILoaD < 1mA (OV mode) 135 300 DRV, DRV3, DRV5 Leakage Current High-impedance mode t 75 nA DRV, DRV3, DRVS Output Voltage Low ILOAD = 1MA 0.1 0.4 Vv LOGIC SECTION Logic Input Leakage Current 1 HA Logic Input High 2.4 v Logic input Low 0.8 Vv _VCC_ to DRV_ Propagation Delay 50 ns (Circuit of Figure 1, Ty = +25C, unless otherwise noted.) AVPP SWITCH RESISTANCE (12 MODE) 18 VCCIN = +5.0V AVPPO = 0V 1.4 FAVPP = +5.0V SWITCH RESISTANCE (&2} -55C 1.0 109 105 11.0 115 120 125 130 135 VPPIN (V) AVPP SWITCHING SV TO 12V +5V AVPP1 Ht AVPP Tpns/div Cyppwn = 1yF, AVPPO = AVPP1, Cavpp = 0.1uF MAXUM Typical Operating Characteristics AVPP SWITCH RESISTANCE (5V MODE) =+12.0V AVPP1 = 0V AVPPO = VCCIN wamtviete SWITCH RESISTANCE (2) 56C 10 20 25 30 35 40 45 50 55 60 65 VCCIN (V) AVPP SWITCHING 12V TO SV 2us/div Cyppin = IF, AVPPO = AVPPT, Caypp = 0.144F 4-33 PLOXVIW/ELSXVINMAX613/MAX614 Dual-Slot PCMCIA Analog Power Controllers Pin Description PIN NAME FUNCTION MAX613 | MAX614 1 1 GND Ground 2 2 AVPP 1 Logic inputs that control the voltage on AVPP ( Table 1 in Detailed Description) in le. . 3 3 AVPPO ogic inputs on! voltage on see Ta la iptio 4 _ BVPP1 . . . a. 5 BVPPO Logic inputs that control the voltage on BVPP (see Table 2 in Detailed Description). 6 _ Vvec1 Logic input that controls the state of DRV3 and DRV5 (see Table 3 in Detailed Description). 7 4 vcCco Logic input that controls the state of DRV on the MAX614. On the MAX613, both VCCO and VCC1 control the state of DRV3 and DRV5 (see Table 3 in Detailed Description). _ 5 DRV Open-drain power MOSFET gate-driver output used to switch the slot VCC supply voltage. DRV sinks current when VCCO is high and goes high impedance when VCC0 is low. Open-drain power MOSFET gate-driver output used to switch the slot VCC supply voltage (see 8 _ DRV5 . , A Table 3 in Detailed Description). Open-drain power MOSFET gate-driver output used to switch the slot VCC supply voltage (see 9 _ DRV3 : 2 Table 3 in Detailed Description). 10 _ SHDN Logictevel shutdown input. When SHDN is low, DRV3 and DRVS sink current regardless of the state of VCCO and VCC1. When SHDN is high, DRV3 and DRV5 are controlled by VCCO and VCC1. 11 _ BYPP Switched output, controlled by BVPP1 and BVPPO, that outputs OV, +5V, or +12V. BVPP can also be programmed to go high impedance (see Table 2 in Detailed Description). 12 6 AVPP Switched output, controlled by AVPP1 and AVPPO, that outputs OV, +5V, or +12V. AVPP can also be programmed to go high impedance (see Table 1 in Detailed Description). 13 7 VCCIN +5V power input 14 8 VPPIN +12V power input. VPPIN can have OV or +5V applied as long as VCCIN > 2.85V. Detailed Description VPP Switching The MAX613/MAX614 allow simple switching of PCMCIA card VPP to OV, +5V, and +12V. On-chip power MOSFETs connect AVPP and BVPP to either GND, VCCIN, or VPPIN. The AVPPO and AVPP1 control logic inputs determine AVPPs state. Likewise, BVPPO and BVPP1 control BVPP. AVPP and BVPP can also be programmed to be high impedance. Each PCMCIA card slot has two VPP voltage inputs labeled VPP1 and VPP2. Typically, VPP1 supplies the flash chips that store the low-order byte of the 16-bit words, and VPP2 supplies the chips that contain the high-order byte. Programming the high-order bytes separately from the low-order bytes may be necessary to minimize +12V current consumption. A single 8-bit flash chip typically requires at most 30mA of +12V VPP current during erase or programming. 4-34 Thus, systems with less than 60mA current capability from +12V cannot program two 8-bit flash chips simulta- neously, and need separate controls for VPP1 and VPP2. Figure 1 shows an example of a power-control circuit using the MAX613 to control VPP1 and VPP2 separately. Figure 1's circuit uses a MAX662 charge-pump DC-DC converter to convert +5V to +12V at 30mA output current capability without an inductor. When higher VPP cur- rent is required, the MAX734 can supply 120mA. Use the MAX614 for single-slot applications that do not require a separate VPP1 and VPP2. Figure 2 shows the MAX614 interfaced to the Vadem VG-465 single-slot controller. To prevent VPP overshoot resulting from parasitic inductance in the +12V supply, the VPPIN bypass capacitors value must be at least 10 times greater than the capacitance from AVPP or BVPP to GND; the AVPP and BVPP bypass capacitors must be at least 0.01p1F. MAAXLLADual-Slot PCMCIA Analog Power Controllers +5V L Vv sigasepy | 100k | L VPPIN VCCIN VCCI PCMCIA Mt cf DRV3 SLOT A MAXIM vec MAX613 avepo A: Vep1_ENO (A_VPP1ENO) vPPt C AVPP AVPP1 AVppt_EN1 (A_VPP1EN1) IWF a BvPPO ANVpp2_ENO (A_VPP2ENO) vep2 ' = BVPP BVPPI A.Vpp2_EN1 (A_VPP2EN1) at vf ome | exp Veco A-Vec_EN (A_VCCEN) INTEL 82365SL i L + VADEM VG-365 or VADEM VG-468) y Si99seDY | 100k | , VPPIN VCCIN VCCI PCMCIA Me DRV3 AVPPO B-Vppt_ENO (B_VPPTENO) SLOT B MAAXLMA AVPP i fe B:Vpp1_EN1 (B_VPP1EN1) vec MAX613_BYPPO B:Vpp2_ENO (B_VPP2ENO) vPP1 - AVPP BYPPt B'Vpp2_EN1 (B_VPP2EN1) ig i veco B:Vcc_EN (B_VCCEN) VPP2 : BVPP Oe | O.tpe Ve VSS A Ap + SND 47uF | I i i OAnF ise 1 T vec GND VOUT Cie _0.22uF ane ot MAXIM | | = MAX662 SHDN C2+ F--_ 0.22pF =o C2- LT Figure 1. MAX613 Dual Slot, Separate VPP1 and VPP2, 5V Only VCC Operating Circuit +12V +5V 32.76kHz 100k 50% DUTY CYCLE = 4.5VMIN +OnF 9.97 (WITH PCMCIA VPPIN. YCCIN VADEM 100k02 LOAD) SLOT ORV VG-465 oie MAXIM 00k u vec sk MAX614 AVPPO bug VPPIENO Hl AVPPI Jt VPPIENI NOTE: Terre 2 OSDLLATOR REQLENGY Coe tone vPPI Avpe vPP2EN1 Lt vPP2 VCCO [ng VCCEN INCREASED FOR HIGHER OUTPUT POWER. 4.5V MIN = GND = Figure 2. MAX614 Single-Slot Application MAAXLAN Figure 3. Charge Pump 4-35 S os : 5 : AMAX613/MAX614 Dual-Slot PCMCIA Analog Power Controllers VCC Switching The MAX613/MAX614 contain level shifters that simplify driving external power MOSFETs to switch PCMCIA card VCC. While a PCMCIA card is being inserted into the socket, the VCC pins on the card edge connector should be powered down to OV to prevent hot insertion that may damage the PCMCIA card. The MAX613/MAX614 MOSFET drivers are open drain. Their rise time is con- trolled by an external pull-up resistor, allowing slow turn- on of VCC power to the PCMCIA card. The DRV3 and DRV5 pins on the MAX613 and the DRV pin on the MAX614 are open-drain outputs pulled down with internal N-channel devices. The gate drive to these internal N-channel devices is powered from VCCIN, regardless of VPPIN's voltage. !f VCCIN is left unconnected or less than 2V is applied to VCCIN, the DRV3/DRV5/DRV gate drivers will not sink current. To switch VCC (M1 and M2 in Figure 1), use external N-channel power MOSFETs. M1 and M2 should be logic-level N-channel power MOSFETs with low on resistance. The Motorola MTP3055EL and Siliconix SI9956DY MOSFETs are both good choices. Turn on M1 and M2 by pulling their gates above +5V. With the gates pulled up to VPPIN as shown in Figure 1, VPPIN should be at least 10V so that with VCC = 5.5V, M1 and M2 have at least 4.5V of gate drive. Table 1. AVPP Control Logic LOGIC INPUT OUTPUT AVPP1 AVPPO AVPP 0 0 ov 0 1 VCCIN 1 0 VPPIN 1 1 HI-Z Table 2. BVPP Control Logic LOGIC INPUT OUTPUT BVPP1 BVPPO BVPP 0 0 ov 0 1 VCCIN 1 0 VPPIN 1 { HI-Z 4-36 Table 3. MAX613 DRV3 and DRV5 Control Logic (SHDN = VCCIN) LOGIC INPUT OUTPUT vcct vcco DRV3 DRV5S 0 0 ov ov 0 1 HI-Z ov 1 0 ov HI-Z 1 1 ov OV The gates of M1 and M2 can be pulled up to any 10V to 20V source, and do not need to be pulled up to VPPIN. Typically, the +12V used for VPPIN is supplied from a +5V to +12V switching regulator. To save power, the +5V to +12V switching regulator can be shut down when not using the VPP programming voltage, allowing VPPIN to fall below +5V. In this case, M1 and M2 should not be pulled up to VPPIN, since M1 and M2 cannot be turned on reliably when VPPIN falls below +10V. Any clock source can be used to generate a high-side gate-drive voltage by using capacitors and diodes to build an inexpensive charge pump. Figure 3 shows a charge-pump circuit that generates 10V from a +5V logic clock source. Applications Information The MAX613 contains all the gate drivers and switch- ing circuitry needed to support a +3.3V/4+5V VCC PCMCIA slot with minimal external components. Figure 4 shows the analog power control necessary to support two dual voltage PCMCIA slots. The A: VCC and B:VCC pins on the Inte! 82365SL DF power the drivers for the control signals that directly connect to the PCMCIA card. A 3.3V card needs 3.3V logic-level control signals and the capability to program VPP1 and VPP2 to 3.3V. The MAX613s VCCIN is switched with slot VCC, so AVPPO = 1 and AVPP1 = 0 causes AVPP = slot VCC. Likewise, A:'VCC and B:VCC are connected to VCCIN, so the Intel 82365SL DF control signals to the PCMCIA card are the right logic levels. PCMCIA card interface controllers other than the Intel 82365SL DF can be used with Figure 4's cir- cuit. Table 4 shows the pins on the Cirrus Logic CL-PD6720 that perform the same function as the Intel 82365SL DF pins. MAXIMADual-Siot PCMCIA Analog Power Controllers +5V +3.3V 1M motoroia 4 pit VWV r7-7ccC4 2N7002LT1 J NIHON | | | SI9956DY 1M E100803 yw iy Ly | yb yy T | T T Vp SILICONIX ( sigsspY | | VCCIN. VPPIN Hr) x | edt +H pave AvPPO PCMCIA t Vy AVPPI qr SLOTA ORVS BVPPO vec PA AXLAA pyprt VPPI avpp MAX613 veco vpP2 BVPP vect GND T GNO SUMIDA CD54 1841H 45V 43.3V LYN E100S03 MH 1M 2N7002LTI * ei WW r-c-ocf4 E10aso3| 3 Ly | Si9956DY 4M Lx Ve \ [Yy4 chnN ] Vout SHDNF-~#,, | ink 1 i+ L MAXIM | FT sau t TT MAX734 = Vy SI9956DY ' aauf | VREF r ; 1 | VCCIN _VPPIN GND ss} Hy x 1 ei }++- orva AVPPO = PCMCIA phy AVPPI SLOT B DRV5 BYPPO vec AAAXLAA Bvpri vPP1 aver MAX613 veco vpP2 ByPP vect GND GND ANcc A:Vep_END A:Vpp_EN1 AVoc_ENO ANec_EN1 INTEL 82365SL DF BVcc B:Vpp_ENO B:Vpp_EN1 B:Voc_ENO B:Vec_EN1 Figure 4. Mixed 3.3V/9V VCC Application Circuit MAAXIMA 4-37 PLOXVW/ELOXVANMAX613/MAX614 Dual-Slot PCMCIA Analog Power Controllers Table 4. Interchangeable Interface Controllers INTEL CIRRUS LOGIC 82365SL DF CL-PD6720 A:Vcc A_SLOT_VCC A:Vpp_ENO A_VPP_VCC A:Vpp_EN1 A_VPP_PGM A:Vcc_ENO A_-VCC_5 AVcc_EN1 A_-VCC_3 B:Vcc B_SLOT_VCC V:Vpp_ENO B_VPP_VCC B:Vpp_EN1 B_VPP_PGM B:Vcc_ENO B_-VCC_5 B:Vcc_EN1 B_-VCC_3 4-38 Chip Topographies MAX613 GND VPPIN VCCIN LL | AVPP1 AVPPO BVPP1 BVPPO / fF TN vect vcco DRVS OD TRANSISTOR COUNT: 982; SUBSTRATE CONNECTED TO GND. ] v3 MAX614 GND VPPIN VCCIN LA | | AVPP1J +. AVPP 1 AVPPO ai | | i li | pails I vcco DRV TRANSISTOR COUNT: 982; SUBSTRATE CONNECTED TO GND. MAAXKLAA