SEMICONDUCTOR
8-170
November 1996
ICM7555, ICM7556
General Purpose Timers
Features
• Exact Equivalent in Most Cases for SE/NE555/556 or
TLC555/556
• Low Supply Current
- ICM7555. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60µA
- ICM7556. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120µA
• Extremely Low Input Currents . . . . . . . . . . . . . . . 20pA
• High Speed Operation. . . . . . . . . . . . . . . . . . . . . . 1MHz
• Guaranteed Supply Voltage Range . . . . . . . 2V to 18V
• Temperature Stability . . . . . . . . . . . . 0.005%/oC at 25oC
• Normal Reset Function - No Crowbarring of Supply
During Output Transition
• Can be Used with Higher Impedance Timing Elements
than Regular 555/6 for Longer RC Time Constants
• Timing from Microseconds through Hours
• Operates in Both Astable and Monostable Modes
• Adjustable Duty Cycle
• High Output Source/Sink Driver can Drive TTL/CMOS
• Outputs have Very Low Offsets, HI and LO
Applications
• Precision Timing
• Pulse Generation
• Sequential Timing
• Time Delay Generation
• Pulse Width Modulation
• Pulse Position Modulation
• Missing Pulse Detector
Description
The ICM7555 and ICM7556 are CMOS RC timers providing
significantly improved performance over the standard SE/NE555/6
and 355 timers, while at the same time being direct replacements for
those devices in most applications. Impro ved parameters include low
supply current, wide operating supply voltage range, low
THRESHOLD, TRIGGER and RESET currents, no crowbarring of
the supply current during output transitions, higher frequency
performance and no requirement to decouple CONTROL VOLTAGE
for stab le operation.
Specifically, the ICM7555 and ICM7556 are stable controllers capa-
ble of producing accurate time delays or frequencies. The ICM7556
is a dual ICM7555, with the two timers operating independently of
each other, sharing only V+ and GND. In the one shot mode, the
pulse width of each circuit is precisely controlled by one external
resistor and capacitor. For astable operation as an oscillator, the
free running frequency and the duty cycle are both accurately con-
trolled by two external resistors and one capacitor. Unlike the regu-
lar bipolar 555/6 devices, the CONTROL VOLTAGE terminal need
not be decoupled with a capacitor. The circuits are triggered and
reset on falling (negative) waveforms, and the output inverter can
source or sink currents large enough to drive TTL loads, or provide
minimal offsets to drive CMOS loads .
Pinouts
Ordering Information
PART NUMBER
(BRAND) TEMP.
RANGE (oC) PACKAGE PKG.
NO.
ICM7555CBA
(7555CBA) 0 to 70 8 Ld SOIC M18.5
ICM7555IBA
(7555IBA) -25 to 85 8 Ld SOIC M18.5
ICM7555IPA -25 to 85 8 Ld PDIP E8.3
ICM7555ITV -25 to 85 8 Pin Metal Can T8.C
ICM7555MTV (Note) -55 to 125 8 Pin Metal Can T8.C
ICM7556IPD -25 to 85 14 Ld PDIP E14.3
ICM7556MJD (Note) -55 to 125 14 Ld CERDIP F14.3
NOTE: Add /883B to part number if 883B processing is desired.
ICM7555 (PDIP, SOIC)
TOP VIEW ICM7555 (METAL CAN)
TOP VIEW ICM7556 (PDIP, CERDIP)
TOP VIEW
GND
TRIGGER
OUTPUT
RESET
1
2
3
4
8
7
6
5
VDD
DISCHARGE
THRESHOLD
CONTROL
VOLTAGE
VDD AND CASE
THRESHOLD
TRIGGER
RESET
GND
OUTPUT
DISCHARGE
CONTROL
2
4
6
1
3
7
5
8
VOLTAGE
DISCHARGE
THRESH-
CONTROL
RESET
OUTPUT
TRIGGER
GND
VDD
DISCHARGE
THRESHOLD
CONTROL
RESET
OUTPUT
TRIGGER
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VOLTAGE
VOLTAGE
OLD
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1996 File Number 2867.2
8-171
Absolute Maximum Ratings Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18V
Input Voltage
Trigger, Control Voltage, Threshold,
Reset (Note 1). . . . . . . . . . . . . . . . . . . . . .V+ +0.3V to GND -0.3V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100mA
Operating Conditions
Temperature Range
ICM7555C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
ICM7555I, ICM7556I. . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC
ICM7555M, ICM7556M. . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Thermal Resistance (Typical, Note 2) θJA (oC/W) θJC (oC/W)
CERDIP Package . . . . . . . . . . . . . . . . 80 24
Metal Can Package . . . . . . . . . . . . . . . 165 80
14 Lead PDIP Package . . . . . . . . . . . . 115 N/A
8 Lead PDIP Package . . . . . . . . . . . . . 110 N/A
SOIC Package. . . . . . . . . . . . . . . . . . . 170 N/A
Maximum Junction Temperature (Hermetic Package) . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Due to the SCR structure inherent in the CMOS process used to fabricate these de vices , connecting an y terminal to a voltage g reater
than V+ +0.3V or less than V- -0.3V ma y cause destructive latchup . F or this reason it is recommended that no inputs from external sourc-
es not operating from the same pow er supply be applied to the de vice bef ore its po w er supply is established. In m ultiple supply systems ,
the supply of the ICM7555/6 must be turned on first.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Applies to ICM7555 and ICM7556, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS
TA = 25oC(NOTE 4)
-55oC TO 125oC
UNITSMIN TYP MAX MIN TYP MAX
Static Supply Current IDD ICM7555 VDD = 5V - 40 200 - - 300 µA
VDD = 15V - 60 300 - - 300 µA
ICM7556 VDD = 5V - 80 400 - - 600 µA
VDD = 15V - 120 600 - - 600 µA
Monostable Timing Accuracy RA = 10K, C = 0.1µF, VDD = 5V -2---- %
- - - 858 - 1161 µs
Drift with Temperature
(Note 3) VDD = 5V ----150-ppm/oC
VDD = 10V ----200-ppm/oC
VDD = 15V ----250-ppm/oC
Drift with Supply (Note 3) VDD = 5V to 15V - 0.5 - - 0.5 - %/V
Astable Timing Accuracy RA = RB = 10K, C = 0.1µF, VDD = 5V-2---- %
- - - 1717 - 2323 µs
Drift with Temperature
(Note 3) VDD = 5V ----150-ppm/oC
VDD = 10V ----200-ppm/oC
VDD = 15V ----250-ppm/oC
Drift with Supply (Note 3) VDD = 5V to 15V - 0.5 - - 0.5 - %/V
Threshold Voltage VTH VDD = 15V 62 67 71 61 - 72 % VDD
Trigger Voltage VTRIG VDD = 15V 28 32 36 27 - 37 % VDD
Trigger Current ITRIG VDD = 15V - - 10 - - 50 nA
Threshold Current ITH VDD = 15V - - 10 - - 50 nA
Control Voltage VCV VDD = 15V 62 67 71 61 - 72 % VDD
Reset Voltage VRST VDD = 2V to 15V 0.4 - 1.0 0.2 - 1.2 V
Reset Current IRST VDD = 15V - - 10 - - 50 nA
ICM7555, ICM7556
8-172
Functional Diagram
Discharge Leakage IDIS VDD = 15V - - 10 - - 50 nA
Output Voltage VOL VDD = 15V, ISINK = 20mA - 0.4 1.0 - - 1.25 V
VDD = 5V, ISINK = 3.2mA - 0.2 0.4 - - 0.5 V
VOH VDD = 15V, ISOURCE = 0.8mA 14.3 14.6 - 14.2 - - V
VDD = 5V, ISOURCE = 0.8mA 4.0 4.3 - 3.8 - - V
Discharge Output Voltage VDIS VDD = 5V, ISINK = 15mA - 0.2 0.4 - - 0.6 V
VDD = 15V, ISINK = 15mA -----0.4V
Supply Voltage (Note 3) VDD Functional Operation 2.0 - 18.0 3.0 - 16.0 V
Output Rise Time (Note 3) tRRL = 10M, CL = 10pF, VDD = 5V -75----ns
Output Fall Time (Note 3) tFRL = 10M, CL = 10pF, VDD = 5V -75----ns
Oscillator Frequency
(Note 3) fMAX VDD = 5V, RA = 470Ω, RB = 270Ω,
C = 200pF -1----MHz
NOTES:
3. These parameters are based upon characterization data and are not tested.
4. Applies only to military temperature range product (M suffix).
TRUTH TABLE
THRESHOLD VOLTAGE TRIGGER VOLTAGE RESET OUTPUT DISCHARGE SWITCH
Don’t Care Don’t Care Low Low On
>2/3(V+) >1/3(V+) High Low On
<2/3(V+) >1/3(V+) High Stable Stable
Don’t Care <1/3(V+) High High Off
NOTE: RESET will dominate all other inputs: TRIGGER will dominate over THRESHOLD.
Electrical Specifications Applies to ICM7555 and ICM7556, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS
TA = 25oC(NOTE 4)
-55oC TO 125oC
UNITSMIN TYP MAX MIN TYP MAX
+
-
THRESHOLD
CONTROL
VOLTAGE
6
53
1
+
-
TRIGGER
2
COMPARATOR
R
GND
B
COMPARATOR
A
R
VDD
8
OUTPUT
7
1
n
DISCHARGE
OUTPUT
DRIVERS
FLIP-FLOP
RESET
4
R
NOTE: This functional diagram reduces the circuitry down to its simplest equivalent components . Tie down unused inputs . R = 100kΩ,±20% (Typ)
ICM7555, ICM7556
8-173
Schematic Diagram
Application Information
General
The ICM7555/6 devices are, in most instances, direct
replacements for the NE/SE 555/6 devices. However, it is
possible to effect economies in the external component
count using the ICM7555/6. Because the bipolar 555/6
devices produce large crowbar currents in the output driver,
it is necessary to decouple the power supply lines with a
good capacitor close to the device. The 7555/6 devices pro-
duce no such transients. See Figure 1.
The ICM7555/6 produces supply current spikes of only
2mA - 3mA instead of 300mA - 400mA and supply decou-
pling is normally not necessar y. Also, in most instances, the
CONTROL VOLTAGE decoupling capacitors are not
required since the input impedance of the CMOS compara-
tors on chip are very high. Thus, for many applications 2
capacitors can be saved using an ICM7555, and 3 capaci-
tors with an ICM7556.
RESET DISCHARGE
TRIGGER
THRESHOLD
GND
OUTPUT
CONTROL
VOLTAGE
RNN
NPN
P
R
R
VDD
NNNNN
PP
NN
PP P
R = 100kΩ±20% (TYP)
TIME (ns)
400 8006002000
0
100
200
300
400
500
SUPPLY CURRENT (mA)
SE/NE555
TA = 25oC
ICM7555/56
FIGURE 1. SUPPLY CURRENT TRANSIENT COMPARED WITH
A STANDARD BIPOLAR 555 DURING AN OUTPUT
TRANSITION
ICM7555, ICM7556
8-174
Power Supply Considerations
Although the supply current consumed by the ICM7555/6
devices is very low, the total system supply current can be
high unless the timing components are high impedance.
Therefore, use high values for R and low values for C in Fig-
ures 2 and 3.
Output Drive Capability
The output driver consists of a CMOS inverter capable of
driving most logic families including CMOS and TTL. As
such, if driving CMOS, the output swing at all supply volt-
ages will equal the supply voltage. At a supply voltage of
4.5V or more the ICM7555/6 will drive at least 2 standard
TTL loads.
Astable Operation
The circuit can be connected to trigger itself and free r un as
a multivibrator, see Figure 2A. The output swings from rail to
rail, and is a true 50% duty cycle square wave. (Trip points
and output swings are symmetrical). Less than a 1% fre-
quency variation is observed, over a voltage range of +5V to
+15V.
The timer can also be connected as shown in Figure 2B. In
this circuit, the frequency is:
The duty cycle is controlled by the values of RA and RB, by
the equation:
Monostable Operation
In this mode of operation, the timer functions as a one-shot,
see Figure 3. Initially the external capacitor (C) is held dis-
charged by a transistor inside the timer. Upon application of
a negative TRIGGER pulse to pin 2, the internal flip-flop is
set which releases the short circuit across the external
capacitor and drives the OUTPUT high. The voltage across
the capacitor now increases exponentially with a time con-
stant t = RAC. When the voltage across the capacitor equals
2/3 V+, the comparator resets the flip-flop, which in tur n dis-
charges the capacitor rapidly and also drives the OUTPUT
to its low state. TRIGGER must return to a high state before
the OUTPUT can return to a low state.
Control Voltage
The CONTROL VOLTAGE terminal permits the two trip
voltages for the THRESHOLD and TRIGGER internal
comparators to be controlled. This provides the possibility of
oscillation frequency modulation in the astable mode or even
inhibition of oscillation, depending on the applied voltage. In
the monostable mode, delay times can be changed by
varying the applied voltage to the CONTROL VOLTAGE pin.
RESET
The RESET terminal is designed to have essentially the same
trip voltage as the standard bipolar 555/6, i.e., 0.6V to 0.7V. At
all supply voltages it represents an extremely high input
impedance. The mode of operation of theRESET function is,
however, much improved over the standard bipolar 555/6 in
that it controls only the internal flip-flop, which in turn controls
simultaneously the state of the OUTPUT and DISCHARGE
pins. This avoids the multiple threshold problems sometimes
encountered with slow falling edges in the bipolar devices.
f1
1.4 RC
------------------=
f 1.44 RA2RB
+()⁄ C=
DR
A
R
B
+()R
A
2RB
+()⁄=
GND
TRIGGER
OUTPUT
RESET
1
2
3
4
8
7
6
5
VDD
DISCHARGE
THRESHOLD
CONTROL
VOLTAGE
VDD
10K
ALTER-
OUTPUT
OPTIONAL
CAPACITOR
C
VDD
NATE
R
FIGURE 2A. ASTABLE OPERATION
OUTPUT
1
2
3
4
8
7
6
5
VDD
OPTIONAL
CAPACITOR
C
VDD
RA
RB
FIGURE 2B. ALTERNATE ASTABLE CONFIGURATION
TRIGGER
OUTPUT
RESET
1
2
3
4
8
7
6
5
VDD
DISCHARGE
THRESHOLD
CONTROL
VOLTAGE
OPTIONAL
CAPACITOR C
VDD ≤18V
RA
ICM7555
tOUTPUT = -ln (1/3) RAC = 1.1RAC
FIGURE 3. MONOSTABLE OPERATION
ICM7555, ICM7556
8-175
Typical Performance Curves
FIGURE 4. MINIMUM PULSE WIDTH REQUIRED FOR
TRIGGERING FIGURE 5. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 6. OUTPUT SOURCE CURRENT vs OUTPUT VOLTAGE FIGURE 7. OUTPUT SINK CURRENT vs OUTPUT VOLTAGE
FIGURE 8. OUTPUT SINK CURRENT vs OUTPUT VOLTAGE FIGURE 9. OUTPUT SINK CURRENT vs OUTPUT VOLTAGE
TA = 25oC
VDD = 2V
VDD = 18V
LOWEST VOLTAGE LEVEL OF TRIGGER PULSE (%VDD)
VDD = 5V
MINIMUM PULSE WIDTH (ns)
010203040
0
1200
1100
1000
900
800
700
600
500
400
300
200
100
SUPPLY VOLTAGE (V)
TA = 25oC
SUPPLY CURRENT (ICM7555) (µA)
SUPPLY CURRENT (ICM7556) (µA)
TA = -20oC
TA = 70oC
0 2 4 6 8 1012141618 20
0
200
180
160
140
120
100
80
60
40
20
400
360
320
280
240
200
160
120
80
40
0
TA = 25oC
VDD = 2V
VDD = 5V
VDD = 18V
OUTPUT SOURCE CURRENT (mA)
-100
-10.0
-1.0
-0.1
-0.01-0.1-1.0-10 OUTPUT VOLTAGE REFERENCED TO VDD (V)
TA = -20oC
OUTPUT LOW VOLTAGE (V)
VDD = 2V
VDD = 5V
VDD = 18V
OUTPUT SINK CURRENT (mA)
0.01 0.1 1.0 10.0
0.1
100
10.0
1.0
TA = 25oC
OUTPUT LOW VOLTAGE (V)
VDD = 2V
VDD = 5V
VDD = 18V
OUTPUT SINK CURRENT (mA)
0.01 0.1 1.0 10.0
0.1
100
10.0
1.0
TA =70oC
OUTPUT LOW VOLTAGE (V)
VDD = 2V
VDD = 5V
VDD = 18V
OUTPUT SINK CURRENT (mA)
0.01 0.1 1.0 10.0
0.1
100
10.0
1.0
ICM7555, ICM7556
8-176
FIGURE 10. NORMALIZED FREQUENCY ST ABILITY IN THE
ASTABLE MODE vs SUPPLY VOLTAGE FIGURE 11. DISCHARGE OUTPUT CURRENT vs DISCHARGE
OUTPUT VOLTAGE
FIGURE 12. PROPAGATION DELAY vs VOLTAGE LEVEL OF
TRIGGER PULSE FIGURE 13. NORMALIZED FREQUENCY STABILITY IN THE
ASTABLE MODE vs TEMPERATURE
FIGURE 14. FREE RUNNING FREQUENCY vs RA, RB AND C FIGURE 15. TIME DELAY IN THE MONOSTABLE MODE vs
RA AND C
Typical Performance Curves
(Continued)
SUPPLY VOLTAGE (V)
TA = 25oC
NORMALIZED FREQUENCY DEVIATION (%)
RA = RB = 10MΩ
0.1 1.0 10.0 100.0
8
8
6
4
2
0
2
4
6
C = 100pF
RA = RB = 10kΩ
C = 0.1µF
TA = 25oC
DISCHARGE LOW VOLTAGE (V)
VDD = 2V
VDD = 5V
VDD = 18V
DISCHARGE SINK CURRENT (mA)
0.01 0.1 1.0 10.0
0.1
100
10.0
1.0
TA = 25oC
LOWEST VOLTAGE LEVEL OF TRIGGER PULSE (%VDD)
VDD = 5V
PROPAGATION DELAY (ns)
010203040
0
600
500
400
300
200
100
TA = 70oC
TA = -20oC
TEMPERATURE (oC)
NORMALIZED FREQUENCY DEVIATION (%)
06080
-0.1
+0.1
0
RA = RB = 10kΩ
C = 0.1µF
4020-20
+0.2
+0.3
+0.4
+0.5
+0.6
+0.7
+0.8
+0.9
+1.0
VDD = 2V
VDD = 5V
VDD = 18V
TA = 25oC
FREQUENCY (Hz)
(RA + 2RB)1kΩ
10kΩ
100kΩ
1MΩ
10MΩ
100MΩ
100.1 1 100 1K 10K 100K 1M 10M
CAPACITANCE (F)
1.0
100m
10m
1m
100µ
10µ
1µ
100n
10n
1n
100p
10p
1p
TIME DELAY (s)
1kΩ
10kΩ
100kΩ
1MΩ
10MΩ
100MΩ
10µ
100n 1µ100µ1m 10m 100m 1 10
CAPACITANCE (F)
1.0
100m
10m
1m
100µ
10µ
1µ
100n
10n
1n
100p
10p
1p
RA
TA = 25oC
ICM7555, ICM7556
