© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice 1Doc. No. 3005, Rev. R
FEATURES
Precision monitoring of
+5.0 V (± 5%, ± 10%, ± 20%),
+3.3 V (± 5%, ± 10%),
+3.0 V (± 10%) and
+2.5 V (± 5%) power supplies
Manual reset input
Offered in two output configurations:
- CAT811: Active LOW reset
- CAT812: Active HIGH reset
Direct replacements for the MAX811 and
MAX812 in applications operating over the
industrial temperature range
Reset valid down to VCC = 1.0 V
6 µµ
µµ
µA power supply current
Power supply transient immunity
Available in SOT-143 packages with Sn or
NiPdAu Green Lead finishes.
Industrial temperature range: -40°°
°°
°C to +85°°
°°
°C
APPLICATIONS
Computers
Servers
Laptops
Cable modems
Wireless communications
Embedded control systems
White goods
Power meters
Intelligent instruments
PDAs and handheld equipment
PIN CONFIGURATION
THRESHOLD SUFFIX SELECTOR
Nominal Threshold Threshold Suffix
Voltage Designation
4.63V L
4.38V M
4.00V J
3.08V T
2.93V S
2.63V R
2.32V Z
1
2
4
3
GND
RESET
VCC
MR
CAT811
CAT812
CAT811, CAT812
4-Pin Microprocessor Power Supply Supervisors with Manual Reset
DESCRIPTION
The CAT811 and CAT812 are microprocessor
supervisory circuits that monitor power supplies. The
CAT811 and CAT812 are direct replacements for the
MAX811 and MAX812 in applications operating over the
industrial temperature range; both have a manual reset
input.
These devices generate a reset signal, which is asserted
while the power supply voltage is below a preset threshold
level and for at least 140 ms after the power supply level
has risen above that level. The underlying floating gate
technology, AE2(TM) used by Catalyst Semiconductor,
makes it possible to offer any custom reset threshold
value. Seven industry standard threshold levels are
offered to support +5.0 V, +3.3 V, +3.0 V and +2.5 V
systems.
The CAT811 features a RESET push-pull output (active
LOW) and the CAT812 features a RESET push-pull
output (active HIGH).
Fast transients on the power supply are ignored and the
output is guaranteed to be in the correct state at Vcc
levels as low as 1.0 V.
The CAT811/812 are fully specified over the industrial
temperature range (-40°C to 85°C) and are available in
a compact 4-pin SOT143 package.
CAT811, CAT812
2
Doc. No. 3005, Rev. R © 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
ORDERING INFORMATION
PIN DESCRIPTIONS
Pin Number
CAT811 CAT812
1 1 GND Ground
2—RESET Active LOW reset. RESET is asserted if VCC falls below the reset threshold
and remains low for at least 140ms after VCC rises above the reset threshold.
2 RESET Active HIGH reset. RESET is asserted if VCC falls below the reset
threshold and remains high for at least 140ms after VCC rises above
the reset threshold.
33MR Manual Reset Input. A logic LOW on MR asserts RESET. RESET remains
active as long as MR is LOW and for 140ms after MR returns HIGH. The
active low input has an internal 20k pull-up resistor. The input should be left
open if not used.
44V
CC Power supply voltage that is monitored.
Name Description
TOP MARKING
Notes
1) The “YM” in the SOT-143 package marking indicates the Year
and Month of production.
2) All NiPdAu devices will be marked to indicate product type and
package. Threshold and full part numbers will be provided on box
and reel labels as well as all Shipping documents.
Prefix Device # Suffix
811 STBI GT10
Device Type
811: Push-Pull / Active Low Output
812: Push-Pull / Active High Output
CAT
Trip Level
L: 4.63V
M: 4.38V
J: 4.00V
T: 3.08V
S: 2.93V
R: 2.63V
Z: 2.32V
Company ID Package Type
EUS: 4 pin SOT-143
TBI: 4 pin SOT-143 Green
Parts per Reel
T3: 3K units
T10: 10K units
GT3: 3K units (NiPdAu Lead Finish)*
GT10: 10K units (NiPdAu Lead Finish)*
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8TAC11L MYMAMYHD
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8TAC11M MYNAMYJD
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T118TACMYPAMYLD
S118TACMYQAMYMD
R118TACMYRAMYND
Z118TACAMYYMYPC
L218TACMYSADMYR
EMYS
M218TACMYTADMYT
J218TACMYUADMYU
T218TACMYVADMYV
S218TACMYWADMYW
R218TACMYXADMYX
Z218TACMYICMYYC
The device shown in the examples (CAT811STBI-
GT10) has an Active Low, Push-Pull output; a trip level
of 2.85V to 3.00V and is provided in the Green SOT-23
package with a NiPdAu lead finish on tape and reel
with 10,000 units.
* NiPdAu is a Lead Finish Option on the Green
Packages only. Unless indicated with the G green
packages are shipped with a Sn Matte Lead Finish.
CAT811, CAT812
3Doc No. 3005, Rev. R
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
ELECTRICAL CHARACTERISTICS
VCC = Full range, TA = -40°C to +85°C unless otherwise noted. Typical values at TA = +25°C and VCC = 5 V for the
L/M/J versions, VCC = 3.3 V for the T/S versions, VCC = 3 V for the R version and VCC = 2.5 V for the Z version.
Parameter Symbol Conditions Min Typ Max Units
VCC Range TA = 0°C to +70°C 1.0 5.5
TA = -40°C to +85°C 1.2 5.5
VCC < 5.5 V, J/L/M 8 20
VCC < 3.6 V, R/S/T/Z 6 15
TA = +25°C 4.56 4.63 4.70
TA = -40°C to +85°C 4.50 4.75
TA = +25°C 4.31 4.38 4.45
TA = -40°C to +85°C 4.25 4.50
TA = +25°C 3.93 4.00 4.06
TA = -40°C to +85°C 3.89 4.10
TA = +25°C 3.04 3.08 3.11
TA = -40°C to +85°C 3.00 3.15
TA = +25°C 2.89 2.93 2.96
TA = -40°C to +85°C 2.85 3.00
TA = +25°C 2.59 2.63 2.66
TA = -40°C to +85°C 2.55 2.70
TA = +25°C 2.28 2.32 2.35
TA = -40°C to +85°C 2.25 2.38
TA = -40˚C to +85˚C
Supply Current ICC
V
µA
L Threshold
M Threshold
J Threshold
T Threshold
S Threshold
R Threshold
Z Threshold
V
Reset
Threshold
Voltage VTH
ABSOLUTE MAXIMUM RATINGS*
Any pin with respect to ground .......... -0.3 V to +6.0 V
Input Current, VCC ............................................. 20 mA
Output Current, RESET, RESET ...................... 20 mA
Rate of Rise, VCC ............................................................. 100 V/µs
Continuous Power Dissipation
Derate 4mW/°C above 70°C (SOT143)........ 320 mW
Operating Temperature Range........... -40°C to +85°C
Storage Temperature Range............ -65°C to +105°C
Lead Soldering Temperature (10 sec).............. 300°C
*COMMENT
Stresses above those listed under Absolute Maximum Ratings may
cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions
outside of those listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for extended periods
may affect device performance and reliability.
CAT811, CAT812
4
Doc. No. 3005, Rev. R © 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
ELECTRICAL CHARACTERISTICS
VCC = Full range, TA = -40˚C to +85˚C unless otherwise noted. Typical values at TA = +25˚C and VCC = 5 V for
L/M/J versions, VCC = 3.3 V for T/S versions, VCC = 3 V for R version and VCC = 2.5 V for Z version.
Parameter Symbol Conditions Min Typ(1) Max Units
Reset Threshold Tempco 30 ppm/˚C
VCC to Reset Delay (Note 2) VCC = VTH to (VTH - 100 mV) 20 µs
Reset Active Timeout Period TA = -40˚C to +85˚C 140 240 400 ms
VCC = VTH min, ISINK = 1.2 mA
CAT811R/S/T/Z
VCC = VTH min, ISINK = 3.2 mA
CAT811J/L/M
VCC > 1.0 V, ISINK = 50 µA 0.3
VCC = VTH max, ISOURCE = 500 µA
CAT811R/S/T/Z
VCC = VTH max, ISOURCE = 800 µA
CAT811J/L/M
VCC > VTH max, ISINK = 1.2 mA
CAT812R/S/T/Z
VCC > VTH max, ISINK = 3.2 mA
CAT812J/L/M
MR Minimum Pulse Width tMR 10 µs
MR Glitch Immunity Note 3 100 ns
MR to RESET Propagation
Delay tMD Note 2 0.5 µs
VIH VCC > VTH (MAX), CAT811/812L/M/J 2.3 V
VIL 0.8
VIH VCC > VIH (MAX), CAT811/812R/S/T/Z 0.7VCC
VIL 0.25VCC
MR Pull-up Resistance 10 20 30 k
(continued)
Note 1: Production testing done at TA = +25˚C; limits over temperature guaranteed by design only.
Note 2: RESET output for the CAT811; RESET output for the CAT812
Note 3: Glitches of 100 ns or less typically will not generate a reset pulse.
VOL 0.4 V
V
VOH
RESET Output Voltage High
(Push-pull, active LOW,
CAT811)
VOL
RESET Output Voltage Low
(Push-pull, active HIGH,
CAT812) V
VOH 1.8 V < VCC VTH min, ISOURCE = 150 µA 0.8 VCC
0.8 VCC
VCC - 1.5
V
RESET Output Voltage Low
(Push-pull, active LOW,
CAT811)
0.4
RESET Output Voltage High
(Push-pull active HIGH,
CAT812)
0.3
0.3
V
MR Input Threshold
CAT811, CAT812
5Doc No. 3005, Rev. R
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
TYPICAL OPERATING CHARACTERISTICS
VCC = Full range, TA = -40˚C to +85˚C unless otherwise noted. Typical values at TA = +25˚C and VCC = 5 V for
L/M/J versions, VCC=3.3 V for T/S versions, VCC = 3 V for R version and VCC = 2.5 V for Z version.
SUPPLY CURRENT VS. TEMPERATURE
(NO LOAD, CAT8xxR/S/T/Z)
12
10
8
6
4
2
0-50 0 50 100 150
SUPPLY CURRENT (µA)
TEMPERATURE (˚C)
POWER-DOWN RESET DELAY VS. TEMPERATURE
(CAT8xxR/S/T/Z)
14
12
10
8
6
4
2
0
POWER-DOWN RESET DELAY (µS)
TEMPERATURE (˚C)
POWER-UP RESET TIMEOUT
VS. TEMPERATURE
260
240
220
200
180
160
POWER-UP RESET TIMEOUT (mS)
TEMPERATURE (˚C)
NORMALIZED RESET THRESHOLD
VS. TEMPERATURE
1.0002
1
0.9998
0.9996
0.9994
0.9992
0.999
0.9988 0 20 40 60 80 100 120
NORMALIZED THRESHOLD
TEMPERATURE (˚C)
VCC=3.6V
VCC=5.5V
-50 0 50 100 150
VCC=5V
VCC=2.5V
-50 0 50 100 150
CAT811, CAT812
6
Doc. No. 3005, Rev. R © 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
DETAILED DESCRIPTIONS
RESET TIMING
The reset signal is asserted LOW for the CAT811 and
HIGH for the CAT812 when the power supply voltage
falls below the threshold trip voltage and remains asserted
for at least 140ms after the power supply voltage has
risen above the threshold.
Figure 1. Reset Timing Diagram
Figure 2. Maximum Transient Duration Without Causing a Reset Pulse vs. Reset Comparator Overdrive
30
25
20
15
10
5
0
TRANSIENT DURATION [µs)
RESET OVERDRIVE VTH - VCC [mV]
1 10 100 1000
TAMB = 25°C
CAT8xxM
CAT8xxZ
5V
0V
5V
0V
5V
0V
CAT811
CAT812
Threshold
Voltage
140ms
minimum
Reset T imeout Period
Power
Supply
Voltage
RESET
RESET
VCC TRANSIENT RESPONSE
The CAT811/812 protect µPs against brownout failure.
Short duration transients of 4µsec or less and 100 mV
amplitude typically do not cause a false RESET.
Figure 2 shows the maximum pulse duration of negative-
going VCC transients that do not cause a reset condition.
As the amplitude of the transient goes further below the
threshold (increasing VTH - VCC), the maximum pulse
duration decreases. In this test, the VCC starts from an
initial voltage of 0.5V above the threshold and drops
below it by the amplitude of the overdrive voltage (VTH
- VCC).
CAT811, CAT812
7Doc No. 3005, Rev. R
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
VALID RESET WITH VCC UNDER 1.0 V
To ensure that the CAT811 RESET pin is in a known
state when VCC is under 1.0 V, a 100 k pull-down
resistor between RESET pin and GND is recommended;
the value is not critical. For the CAT812, a pull-up
resistor from RESET pin to VCC is needed.
Figure 3. RESETRESET
RESETRESET
RESET Valid with VCC Under 1.0 V Figure 4. RESET Valid with VCC Under 1.1 V
Figure 5. Bi-directional Reset Pin Interfacing
CAT811
GND
VCC
100k
Power
Supply
RESET
CAT812
GND
VCC
100k
Power
Supply
RESET
MR
MR
CAT811
GND
VCC
4.7k
Power
Supply
RESET
Buffered
RESET
BUF
Bi-directional
I/O Pin
RESET
INPUT
GND
µP
(For example: 68HC11)
MR
BI-DIRECTIONAL RESET PIN INTERFACING
The CAT811/812 can interface with µP/µC bi-directional
reset pins by connecting a 4.7 k resistor in series with
the CAT811/812 reset output and the µP/µC bi-directional
reset pin.
CAT811, CAT812
8
Doc. No. 3005, Rev. R © 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
OTHER SUPERVISORY PRODUCTS
Function CAT1161/3 CAT1162 CAT809 CAT810 CAT811 CAT812
With 16k Bit Serial EEPROM Memory
Watchdog Timer
Manual Reset Input
Active Low Reset
Active High Reset
Dual Polarity Reset Outputs
Package 8-pin 8-pin 3-pin 3-pin 4-pin 4-pin
DIP and SOIC DIP and SOIC SOT23 and SOT23 and SOT143 SOT143
SC70 SC70
0.10 MAX
0.013 MIN
1.12 MAX
0.89 MIN
3.04 MAX
2.80 MIN
0.94 MAX
0.88 MIN
2.64 MAX
2.10 MIN
2.05 MAX
1.78 MIN
0.89 MAX
0.76 MIN
0.20 0.51 MAX
0.37 MIN
1.40 MAX
1.20 MIN
0.18 MAX
0.085 MIN
0.54 REF 0.41 MAX
0.21 MIN
0.20
GAUGE PLANE
PACKAGE INFORMATION
Plastic SOT143 (4-Pin)
Catalyst Semiconductor, Inc.
Corporate Headquarters
1250 Borregas Avenue
Sunnyvale, CA 94089
Phone: 408.542.1000
Fax: 408.542.1200
www.catalyst-semiconductor.com
Copyrights, Trademarks and Patents
Trademarks and registered trademarks of Catalyst Semiconductor include each of the following:
DPP AE2 MiniPot
Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. For a complete list of patents
issued to Catalyst Semiconductor contact the Companys corporate office at 408.542.1000.
CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS
PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE
RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING
OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.
Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or
other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a
situation where personal injury or death may occur.
Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets
labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale.
Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate
typical semiconductor applications and may not be complete.
REVISION HISTORY
Date Rev. Reason
10/22/03 L Updated Ordering Information
12/22/2003 M Updated Features
Replaced power-up reset timeout vs. temperature graph
with updated one
Replaced VCC Transient Response graph with updated
one
3/22/04 N General data sheet updates
3/25/2004 O Updated Electrical Characteristics (Reset Active
Timeout Period Max)
3/25/2004 P Corrected Pin Configure diagram
9/28/2004 Q Minor changes
12/28/2005 R Updated Features
Updated Ordering Information
Updated Yop Marking
Publication #: 3005
Revison: R
Issue date: 12/28/05