IRF730 - Intersil Corporation

4-232

File Number

1580.5

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

IRF730

5.5A, 400V, 1.000 Ohm, N-Channel Power

MOSFET

This is an N-Channel enhancement mode silicon gate power

ﬁeld effect transistor. It is an advanced power MOSFET

designed, tested, and guaranteed to withstand a speciﬁed

level of energy in the breakdown avalanche mode of

operation. All of these power MOSFETs are designed for

applications such as switching regulators, switching

convertors, motor drivers, relay drivers, and drivers for high

power bipolar switching transistors requiring high speed and

low gate drive power. These types can be operated directly

from integrated circuits.

Formerly developmental type TA17414.

Features

• 5.5A, 400V

•r

DS(ON) = 1.000Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

JEDEC TO-220AB

Ordering Information

PART NUMBER PACKAGE BRAND

IRF730 TO-220AB IRF730

NOTE: When ordering, use the entire part number. G

GATE

DRAIN (FLANGE)

SOURCE

DRAIN

Data Sheet July 1999

4-233

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Speciﬁed IRF730 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 400 V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . .VDGR 400 V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID

TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID5.5

3.5 A

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM 22 A

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD75 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . EAS 300 mJ

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . .TL

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 300

260

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. TJ= 25oC to 125oC.

Electrical Speciﬁcations TC = 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 10) 400 - - V

Gate Threshold Voltage VGS(TH) VDS = VGS, ID = 250µA 2.0 - 4.0 V

Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA

On-State Drain Current (Note 2) ID(ON) VDS >I

D(ON) xr

DS(ON)MAX,V

GS = 10V (Figure 7) 5.5 - - A

Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA

Drain to Source On Resistance (Note 2) rDS(ON) ID = 3.0A, VGS = 10V (Figure 8, 9) - 0.800 1.000 Ω

Forward Transconductance (Note 2) gfs VDS ≥ 10V, ID = 3.3A (Figure 12) 2.9 4.4 - S

Turn-On Delay Time td(ON) VDD = 200V, ID≈ 5.5A, RGS = 12Ω, RL = 35Ω

MOSFET Switching Times are Essentially

Independent of Operating Temperature

-1017ns

Rise Time tr-2029ns

Turn-Off Delay Time td(OFF) -3556ns

Fall Time tf-1524ns

Total Gate Charge

(Gate to Source + Gate to Drain) Qg(TOT) VGS = 10V, ID = 5.5A, VDS = 0.8 x Rated BVDSS,

Ig(REF) = 1.5mA, (Figure 14)

Gate Charge is Essentially Independent of

Operating Temperature

-2035nC

Gate to Source Charge Qgs - 3.0 - nC

Gate to Drain “Miller” Charge Qgd -10-nC

Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - 600 - pF

Output Capacitance COSS - 150 - pF

Reverse Transfer Capacitance CRSS -40-pF

Internal Drain Inductance LDMeasured From the

Contact Screw on Tab to

Center of Die

Modified MOSFET

Symbol Showing the

Internal Device

Inductances

- 3.5 - nH

Measured From the Drain

Lead, 6mm (0.25in) From

Package to Center of Die

- 4.5 - nH

Internal Source Inductance LSMeasured From the

Source Lead, 6mm

(0.25in) From Header to

Source Bonding Pad

- 7.5 - nH

Thermal Resistance Junction to Case RθJC - - 1.67 oC/W

Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 80 oC/W

IRF730

4-234

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current ISD Modified MOSFET Symbol

Showing the Integral

Reverse P-N Junction

Rectifier

- - 5.5 A

Pulse Source to Drain Current

(Note 3) ISDM - - 22 A

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 5.5A, VGS = 0V (Figure 13) - - 1.6 V

Reverse Recovery Time trr TJ = 25oC, ISD = 5.5A, dISD/dt = 100A/µs 140 300 660 ns

Reverse Recovery Charge QRR TJ = 25oC, ISD = 5.5A, dISD/dt = 100A/µs 0.93 2.1 4.3 µC

NOTES:

2. Pulse test: pulse width ≤300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 50V, starting TJ= 25oC, L = 17mH, RG= 25Ω, peak IAS = 5.5A.

Typical Performance Curves

Unless Otherwise Speciﬁed

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

0 50 100 150

TC, CASE TEMPERATURE (oC)

POWER DISSIPATION MULTIPLIER

0.2

0.4

0.6

0.8

1.0

1.2

050 100

ID, DRAIN CURRENT (A)

TC, CASE TEMPERATURE (oC)

15025 75 125

0.1

0.0110-5 10-4 10-3 10-2 10-1 100101

ZθJC, TRANSIENT

THERMAL IMPEDANCE (oC/W)

t1, RECTANGULAR PULSE DURATION (s)

PDM

NOTES:

DUTY FACTOR: D = t1/t2

PEAK TJ = PDM x ZθJC + TC

SINGLE PULSE

0.1

0.02

0.2

0.5

0.01

0.05

IRF730

4-235

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

VDS, DRAIN TO SOURCE VOLTAGE (V)

ID, DRAIN CURRENT (A)

100

101

0.1 1000

10µs

100µs

1ms

10ms

SINGLE PULSE

TJ = MAX RATED

TC = 25oC

OPERATION IN THIS AREA

IS LIMITED BY rDS(ON)

ID, DRAIN CURRENT (A)

0 40 80 120 160

200

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 10V

VGS = 6.0V

VGS = 4.5V

VGS = 4.0V

VGS = 5.5V

VGS = 5.0V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

0369 15

ID, DRAIN CURRENT (A)

VDS, DRAIN TO SOURCE VOLTAGE (V)

10 VGS = 10V

VGS = 5.0V

VGS = 4.5V

VGS = 6.0V

VGS = 5.5V

VGS = 4.0V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

02468

VGS, GATE TO SOURCE VOLTAGE (V)

0.1

0.01

IDR, DRAIN CURRENT (A)

TJ = 150oC

TJ = 25oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VDS ≥ 50V

ID, DRAIN CURRENT (A)

rDS(ON), DRAIN TO SOURCE

00 3 6 9 12 15

VGS = 20V

VGS = 10V

ON RESISTANCE (Ω)

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

NORMALIZED DRAIN TO SOURCE

3.0

1.8

1.2

0.6

0-40 0 40

TJ, JUNCTION TEMPERATURE (oC)

120

2.4

80 160

ON RESISTANCE

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

VGS = 10V, ID = 5.5A

IRF730

4-236

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

NORMALIZED DRAIN TO SOURCE

1.25

1.05

0.95

0.85

0.75 -40 0 40

TJ, JUNCTION TEMPERATURE (oC)

120

1.15

ID = 250µA

160

BREAKDOWN VOLTAGE

VDS, DRAIN TO SOURCE VOLTAGE (V)

C, CAPACITANCE (pF)

1500

1200

900

600

300

0110100

CISS = CGS + CGD

CRSS = CGD

COSS ≈ CDS + CGD

VGS = 0V, f = 1MHz

CISS

COSS

CRSS

00246810

ID, DRAIN CURRENT (A)

gfs, TRANSCONDUCTANCE (S)

TJ = 25oC

TJ = 150oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

0 0.4 0.8 1.2 1.6

VSD, SOURCE TO DRAIN VOLTAGE (V)

100

0.1

ISD, SOURCE TO DRAIN CURRENT (A)

TJ = 150oC

2.0

TJ = 25oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

0 8 16 24 32 40

ID = 5.5A

Qg, GATE CHARGE (nC)

VGS, GATE TO SOURCE VOLTAGE (V)

VDS = 200V

VDS = 320V

VDS = 80V

IRF730

4-237

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

VGS

0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VDD

VDS

BVDSS

IAS

tAV

VGS

DUT

-VDD

tON

td(ON)

90%

10%

VDS 90%

10%

td(OFF)

tOFF

90%

50%

10% PULSE WIDTH

VGS

0.3µF

12V

BATTERY 50kΩ

VDS

DUT

Ig(REF)

(ISOLATED

VDS

0.2µF

CURRENT

REGULATOR

ID CURRENT

SAMPLING

IG CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR

SAME TYPE

AS DUT Qg(TOT)

Qgd

Qgs

VDS

VGS

VDD

Ig(REF)

IRF730

4-238

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see w eb site http://www.intersil.com

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P. O. Box 883, Mail Stop 53-204

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TEL: (407) 724-7000

FAX: (407) 724-7240

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FAX: (886) 2 2715 3029

IRF730