Preliminary PlasticPath Features = Low Power Monolithic CMOS 512K x 8 SRAM = Operating Temperature Range e Full Military (-55C to +125C) e Industrial (-40C to +85C) = Burn-in and Temperature Cycle Available m@ 15,17, 20 & 25ns Access Times mg +5V Power Supply g Industry Standard Pinouts e Center Power / Ground Pins = TTL Compatible l/O # 3.3V Device I/O Interfacing mg JEDEC Standard 36 pin Plastic SOJ Package e 36 Lead, .93" x .405" x 0.148" Small Outline J lead (SOW), Aeroflex code# "L2" m Fully Static Operation e No Clocks or Refresh Required (\EROFLEX CIRCUIT TECHNOLOGY www.aeroflex.com/act1.htm Block Diagram SOJ (L2) CE WE OE AO A18 J | Vss 512Kx8 t 1/00-7 Vec Pin Description 1/Oo-7 Data I/O Ao-18 Address Inputs WE Write Enable CE Chip Enable OE Output Enable < cc Power Supply Vss Ground NC Not Connected General Description The ACT-PS512K8 is a Plastic High Speed, 4 Megabit (4,194,304 bits) CMOS Monolithic SRAM organized as 524,288 words by 8 bits. Designed for high-speed, high density, high reliablility, mass memory and fast cache system applications. The plastic monolithic is input and output TIL compatible. Writing is executed when the write enable (WE) and chip enable (CE) inputs are low. Reading is accomplished when WE is high and CE and _ output enable (OE) are both low. Access time grades of 15ns, 17ns, 20ns and 25ns maximum are standard. The +5 Volt power supply version is standard and +3.3 Volt lower power model is a future optional product. The ACT-PS512K8 _ is Up-screened in Aeroflexs 80,000 square foot MIL-H-38534 certified facility in Plainview, N.Y. A\ eroflex Circuit Technology - Advanced Multichip Modules PS512K8 REV A2 5/5/97Absolute Maximum Ratings Symbol Parameter MINIMUM MAXIMUM Units To Case Operating Temp. +125 C Tsta@ Storage Temperature +150 C Pp Maximum Package Power Dissipation 1.0 W Ve Maximum Signal Voltage to Ground Veco + 0.5 Vv Vec Power Supply Voltage +7.0 V Recommended Operating Conditions Symbol Parameter Minimum Maximum Units Voc Power Supply Voltage +4.5 +55 V Vgs Ground ) ) V Vin Input High Voltage +2.2 Voc + 0.5 V Vit Input Low Voltage -0.5 +0.8 V Ta Operating Temperature (Military) -55 +125 C Ta Operating Temperature (Industrial) -40 +85 C Truth Table Mode CE | WE | OE Data /0 Supply Current Standby H X X High Z Isp Output Disable L H H High Z lec Read L H L Data OUT lec Write L L Xx Data IN lec Capacitance (Vin & Vout = OV, f = 1MHz, Ta = 25C, unless otherwise noted, Guaranteed but not tested) Symbol Parameter Maximum Units Cin Input Capacitance (Ap.42, WE & OE) 6 pF Cout Output Capacitance (I/Og.7 & CE) 8 pF DC Characteristics (Vcc = 4.5V to 5.5V, Vss = OV, TA = -55C to +125C or -40C to +85C) Parameter Sym Conditions Min Max Units Input Leakage Current lu | Veg = Max, Vin = Vgg to Veo -10 +10 HA Output Leakage Current | lLo | CE = Viy, OE = Vin, Vout = Vgg to Voc -10 +10 LA Operating Supply Current} Icc | CE = Vy, OE = Viy,f =5MHz,Vec=5.5V 130 mA Standby Current Isp | CE = Viq, OE= Viy, f =5MHz,Vcc=5.5V 20 mA Output Low Voltage Vor | lo, = 8 mA, Voc = 4.5V 0.4 V Output High Voltage Vou | low = -4 mA, Vec = 4.5V 2.4 V Note: DC Test conditions: VIL = 0.3V, VIH = Vcc - 0.3V. Aeroflex Circuit Technology PS512K8 Rev A2 5/5/97 Plainview NY (516) 694-6700AC Characteristics (Vcc = 4.5V to 5.5V, Vss= OV, TA= -55C to +125C or -40C to +85C) Read Cycle Parameter sym Min Max Min Max Min Max Min Max Units Read Cycle Time tac 15 17 20 25 ns Address Access Time tana 15 17 20 25 ns Chip Enable Access Time tace 15 17 20 25 ns Output Hold from Address Change tou 3 3 4 5 ns Output Enable to Output Valid lor 8 8 10 12 ns Chip Enable to Output in Low Z (1) teLz 3 3 3 3 ns Output Enable to Output in Low Z (1) toLz 0 0 0 0 ns Chip Deselect to Output in High Z (1) tonz 10 ns Output Disable to Output in High Z (1) touz 10 ns Note 1. Guaranteed by design, but not tested Write Cycle -01 -017 020 -02 Parameter sym Min Mex Min Max Min Max Min Mex Units Write Cycle Time two 15 17 20 25 ns Chip Enable to End of Write tow 12 12 13 15 ns Address Valid to End of Write taw 12 12 13 15 ns Data Valid to End of Write tow 8 8 9 10 ns Write Pulse Width twp 12 12 13 15 ns Address Setup Time tas 0 0 0 0 ns Address Hold Time tay 0 0 0 0 ns Output Active from End of Write (1) tow 3 3 4 5 ns Write to Output in High Z (1) twHz 8 8 8 10 ns Data Hold from Write Time tou 0 0 0 0 ns Note 1. Guaranteed by design, but not tested Data Retention Electrical Characteristics (Special Order Only) (TA = -55C to +125C) Parameter Sym Test Conditions . All Speeds Units Min Typ Max Voc for Data Retention Vor CE > Veg 0.2V 2 5.5 V Data Retention Current locpR1 Voc = 8V 0.5 2.0 mA 3 Aeroflex Circuit Technology PS512K8 Rev A2 5/5/97 Plainview NY (516) 694-6700Timing Diagrams Read Cycle Timing Diagrams Read Cycle 1 (CE = OE = VIL, WE = Vi) b<_ tre Ao-rs SK P<_ tara Dio Previous Data Valid Data Valid Read Cycle 2 (WE = VIH) tre a Ao-18 K < TACE > TCHZ <_ tcLz >} __ SEE NOTE OE toe ~ SEE NOTE tOoLz > SEE NOTE Dvo _ High Z Data Valid UNDEFINED DON'T CARE Note: Guaranteed by design, but not tested. Write Cycle Timing Diagrams Write Cycle 1 (WE Controlled, OE = VIL) at two wn a t Taw = TAH [< Write Cycle 2 (CE Controlled, OE = ViH ) < two > how MK a beg tay, > TAH fe V/V. 7 t+< tow > tDH Dvo Data Valid Note: Guaranteed by design, but not tested. ri mM AC Test Circuit Current Source | Io To Device Under Test CL= 50 pF Lt I lou Current Source Notes: Vz ~ 1.5 V (Bipolar Supply) Parameter Typical Units Input Pulse Level 0-3.0 Vv Input Rise and Fall 5 ns Input and Output Timing Reference 1.5 Vv Output Lead Capacitance 50 pF 1) VZ is programmable from -2V to +7V. 2) |OL and IOH programmable from 0 to 16 mA. 3) Tester Impedance ZO = 75Q. 4) VZ is typically the midpoint of VOH and Vot. 5) IOL and IOH are adjusted to simulate a typical resistance load circuit. 6) ATE Tester includes jig capacitance. Aeroflex Circuit Technology PS512K8 Rev A2 5/5/97 Plainview NY (516) 694-6700Pin Numbers & Functions 36 Pins SOJ Pin # Function Pin # Function 1 Ao 19 NC Al 20 A10 3 A2 21 Att 4 A3 22 A12 5 A4 23 A13 6 CE 24 A14 7 1/Oo 25 04 8 O41 26 /O5 9 Vcc 27 Vcc 10 Vss 28 Vss 11 1/02 29 1/06 12 1/03 30 1/07 13 WE 31 OE 14 Ad 32 A15 15 A6 33 A16 16 A7 34 A17 17 A8 35 A18 18 Ag 36 NC Package Outline "L2" SOJ Package, 36 Leads leg. 23.62 (0.930) ______, 36 23.37 (0.920) 49 OOOO OOOO 1 | 11.30 (0.445) 11.05 (0.435) ) QO) |} 10.29 (0.405) 9.65 (0.380) 10.03 (0.395) 9.14 (0.360) OOOOUOOOOOOOOOOOOO 1 18 VOR ao oe | 3.76 (0.148) MAX _ _ . [ 4 10-10 [=J.004 MAX | 1.27 -0.05 (0. 050) (017+ +0. g04)! All dimensions in inches 0.95 (0.037) Dimensions in millmeters mm Dimensions in inches () Aeroflex Circuit Technology PS512K8 Rev A2 5/5/97 Plainview NY (516) 694-6700Ty ee pee i WitLYyvy UU N yi LLL JZN ALR Ps Huinlol Ocy So CO Ordering Information Model Number Speed Package ACT-PS512K8N-015L2T 15ns 36 Lead SOJ ACT-PS512K8NB-017L2T 17ns 36 Lead SOJ ACT-PS512K8N-020L2T 20ns 36 Lead SOJ ACT-PS512K8N-025L2T 25ns 36 Lead SOJ Part Number Breakdown ACT- PS 512K 8 N- 015 L2 T Aeroflex Circuit J__ =] T Technology Plastic ; ; Electrical Testing Memory Type | = Industrial Temp, -40C to +85C S = SRAM T = Military Temp, -55C to +125C Memory Depth, Locations Memory Width, Bits Package Type & Size Options L2 = 36 Pin SOJ N= None W = Burn-in * X = Temperature Cycle * Y = Burn-in & Temperature Cycle * Memory Speed, ns * Screened to the test methods of MIL-STD-883 Aeroflex Circuit Technology Telephone: (516) 694-6700 35 South Service Road FAX: (516) 694-6715 Plainview New York 11830 Toll Free Inquiries: 1-(800) 843-1553 6 Aeroflex Circuit Technology PS512K8 Rev A2 5/5/97 Plainview NY (516) 694-6700