Document Number: MC33186
Rev. 7.0, 10/2011
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2007 - 2011. All rights reserved.
*This document contains certain information on a product under development. Fre-
escale reserves the right to change or discontinue this product withou t notice
H-Bridge Driver
The 33186 is a monolithic H-Bridge ideal for fractional horsepower
DC-motor and bi-directional thrust solenoid control. The IC
incorporates internal control logic, charge pump, gate drive, and lo w
RDS(ON) MOSFET output circuitry. The 33186 is able to control
continuous inductive DC load currents up to 5.0 A. Output loads can
be pulse width modulated (PWM-ed) at frequencies up to 10 kHz.
The 33186 is parametrically specified over a temperature range of
-40°C ≤ TA ≤ 125°C, 5.0 V ≤ V+ ≤ 28 V. The IC can also be operated
up to 40 V with de-rating of the specifications. The IC is available in a
surface mount power package with exposed pad for heat sinking.
Features
• Overtemperature, Short-Circuit Protection, and Overvoltage
Protection against Transients up to 40 V at VBAT Typical
• RDSon = 150 mΩ for each output Transistor at 25°C
• Continuous DC Load Current 5 A (TC < 100°C)
• Output Current Limitation at typ 6,5 A +/- 20%
• Short-Circuit Shutdown for Output Currents over 8 A
• Logic Inputs TTL/CMOS Compatible
• Operating Frequency up to 20 kHz
• Undervoltage Disable Function
• Diagnostic Output, 2 Disable Input
• Coding Input for Alternative Functions
• Stable Operation with an External Capacitance of Maximum 47 μF
at VBAT
• Pb-Free Packaging Designated by Suffix Code VW
Figure 1. 33186 Simplified Block Diagram
H-BRIDGE MOTOR DRIVER
33186
ORDERING INFORMATION
Device Temperature
Range (TA)Package
MC33186DH1/R2 - 40°C to 125°C 20 HSOP
MC33186VW1/R2
DH SUFFIX
VW SUFFIX (PB-FREE)
PLASTIC PACKAGE
98ASH70702A
20-PIN HSOP
5.0 V VPWR
MOTOR
MCU
or
DSP OUT2
OUT1
VBAT
CP
PGND
SF
IN1
DI1
IN2
DI2
33186
Analog Integrated Circuit Device Data
2Freescale Semiconductor
33186
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
Figure 2. 33186 Simplified Internal Block Diagram
Charge-Pump
Overcurrent
High-Side
Overcurrent
Current Limit
Overtemperature
Current limitatio n
Logic
Undervoltage
SF
IN1
IN2
DI1
DI2
COD
PGND
OUT2
OUT1
VBAT
CP
Gate Control: 3-4
Gate Control: 1-2
Internal 5V
VBAT
VBAT
Low-Side
Analog Integrated Circuit Device Data
Freescale Semiconductor 3
33186
PIN CONNECTIONS
PIN CONNECTIONS
Figure 3. 33186 Pin Locations
Table 1. 33186 Pin Description
Pin Name Description
9, 10, 11, 12
Metal slug PGND Power Ground. All the ground are connected together, they should be connected as short as
possible on the PCB.
1AGND
Analog ground. All the ground are connected together, they should be connected as short as
possible on the PCB.
2Output
Status flag (SF)
Open drain output, active low. Is set according to the truth table. When a fault appears, SF changes
typically in less than 100 ms.
3,13
18, 19 Inputs IN1, IN2,
DI1, DI2, COD
Voltage controlled inputs with hysteresis
8COD
When not connected or connected to GND, a stored failure will be reset by change of the voltage-
level on DI1 or DI2.
When connected to VCC, the disable Pin DI1 and DI2 are inactive. A stored failure will be reset by
change of the voltage-level on IN1 or IN2.
6, 7, 14, 15 OUT1, OUT2 H-Bridge outputs with integrated free-wheeling diodes.
1
2
3
5
4
6
7
8
9
10 1
2
3
5
4
6
7
8
9
20
1
1
1
1
1
1
1
1
1
Metal slug is connected to power ground
PIN CONNECTIONS
(Top V iew)
AGND
SF
IN1
VBAT
VBAT
COD
PGND
PGND PGND
PGND
DI2
OUT2
OUT2
DI1
OUT1
OUT1
CP
VBAT
IN2
NC
Analog Integrated Circuit Device Data
4Freescale Semiconductor
33186
PIN CONNECTIONS
4, 5, 16 VBAT The Pins 4 and 5 are internally connected. These Pins supply the left high side and the analog/logic
part of the device.
The Pin 16 supplies the right high side and the charge pump.
The Pins 4, 5 and 16 should be connected together on the printed circuit board with connections as
short as possible.
Supervision and protection functions
a) Supply voltage supervision
The supply voltage is supervised. If it is below its specific threshold, the power stages are switched
in tristate and the status flag is switched low.
If the supply voltage is over the specific threshold again, the power stage switches independently
into normal operation, according to the input Pins and the status flag is reset.
b) Thermal supervision
In case of overtemperature, the power stages are switched in tristate independent of the inputs
signals and the status flag is switched low.
If the level changes from high to low on DI1 (IN1) or low to high on DI2 (IN2), the output stage
switches on again if the temperature is below the specified limit.The status-flag is reset to high level
(Pin names in brackets refer to coding Pin = VCC).
c) Supervision of overcurrent on high sides and low sides
In case of over-current detection, the power stages are switched in tristate independent of the inputs
signals and the status flag is set.
If the level changes from high to low on DI1 (IN1) or low to high on DI2 (IN2) the output stage
switches on again and the status flag is reset to high level (Pin names in brackets refer to coding Pin
= VCC).
The output stage switches into the mode defined by the inputs Pins provided, and/if the temperature
is below the specified limits.
d) Current limiting on low sides
The maximum current which can flow under normal operating conditions is limited to Imax = 6,5 A
+/- 20%. When the maximum current value is reached, the output stages are switched tristate for a
fixed time. According to the time constant the current decreases until the next switch on occurs. See
page 8 for schematics.
17 CP Charge Pump output Pin
A filtering capacitor (up to 33 nF) can be connected between Pin 17 and Gnd. Device can operate
without external capacitor, although Pin 17 decoupling capacitor help in noise reduction and allows
the device to perform a maximum speed, timing and PWM frequency.
Table 1. 33186 Pin Description(continued)
Pin Name Description
Analog Integrated Circuit Device Data
Freescale Semiconductor 5
33186
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. MAXIMUM RATINGS
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings Symbol Min Typ Max Unit
ELECTRICAL RATINGS
Supply Voltage
Static Destruction Proof
Dynamic Destruction Proof t < 0,5 s VBAT
VBat
- 1.0
- 2.0 –
–28
40
V
Logic Inputs (IN1, IN2, DI1, DI2, CODE) U - 0.5 – 7.0 V
Output Status - Flag SF USF - 0.5 – 7.0 V
THERMAL RATINGS
Junction Temperature TJ- 40 – +150 °C
Storage Temperature TS- 55 – +125 °C
Ambient Temperature TA- 40 – +125 °C
Thermal Resistance (with power applied on 2
power MOS) RthJC ––
+1.5 K/W
Thermal Resistance (with power applied on 2
power MOS) RthJC ––
+1.5 K/W
Peak Package Reflow Temperature During
Reflow (1), (2) TPPRT Note 2. °C
Notes
1. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits
may cause malfunction or permanent damage to the device.
2. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL),
Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.
MC33xxxD enter 33xxx), and review parametrics.
Analog Integrated Circuit Device Data
6Freescale Semiconductor
33186
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. STATIC ELECTRICAL CHARACTERISTICS
Characteristic noted under conditions -40°C to +125 °C, VBAT from 5 V to 28 V, unless otherwise note. Typical values reflect
approximate mean at 25°C, nominal VCC, at time of device characterization.
Characteristics Symbol Min Typ Max Unit
POWER SUPPLY
Operating Range:
Static
Dynamic (t < 500 ms) VBAT
VBAT
5.0
––
–28
40 V
V
Stand-by current
f = 0 to 10 KHz; IOUT = 0 A I VBAT ––35 mA
VBAT-undervoltage switch-off (without load)
Switch-off Voltage
Switch-on Voltage
Hysteresis
4.15
4.5
150
4.4
4.75
–
4.65
5.0
–
V
V
mV
CHARGE-PUMP SUPPLY
VBAT = 4.15 V
VBAT < 40 V VCP - VBAT
VCP - VBAT
3.35
––
––
20 V
V
LOGIC INPUTS
Input High VINH 3.4 – – V
Input Low VINL – – 1.4 V
Input Hysteresis U0.71.0–V
Input Pull Up Current (IN1, IN2, DI1)
UIN = 0.0 V I - 200 - 80 – μA
Input Pull Down Current (DI2,COD)(3)
UDI2 = 5.0 V IDI2 – 25 100 μA
POWER OUTPUTS: OUT1, OUT2
Switch on resistance:
ROUT - VBAT; ROUT - GND
VBAT = 5 to 28 V; CCP = 0 to 33 nF – – 300 mΩ
Switch-off Current during Current Limitation
on Low Sides (IOUT) MAX 5.2 6.5 7.8 A
Switch-off Time during Current Limitation on
Low Sides tA15 20.5 26 μs
Blanking Time during Current Limitation on
Low Sides tB12 16.5 21 μs
Notes
3. In case of negative voltage at OUT2 (respectively OUT1) this maximum pull down current at DI2 (respectively COD) Pin can be
exceeded. This happens during recirculation when the current is flowing in the low side. See curve 22.
Analog Integrated Circuit Device Data
Freescale Semiconductor 7
33186
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
High Side Overcurrent Detection(4)
Low Side Overcurrent Detection IOCHS
IOCLS
11
8.0 –
––
–A
Leakage Current
Output Stage Switched off – – 100 μA
Free-Wheeling Diode Forward Voltage
IOU = 3.0 A UD––2.0 V
Free-Wheeling Diode Reverse
Recovery Time
IFM =1.0 A, di/dt = 4.0 A/µs tRR –2.05.0 μs
Switch-off Temperature
Hysteresis 160
20 –
–190
30
°C
°C
OUTPUT STATUS FLAG (OPEN DRAIN OUTPUT)
Output High (SF not set)
USF = 5.0 V ISF ––10 μA
Output Low (SF set)
ISF = 300 µA VSF – – 1.0 V
TIMING
PWM frequency
CCP = 33 nF f––10KHz
Maximum Switching Frequency During
Current Limitation
VBAT = 6....28 V.....CCP = 33 nF f––20KHz
Output ON Delay
IN1.....>OUT1 or IN2.....>OUT2 tDON ––15 μs
Output OFF Delay
IN1.....>OUT1 or IN2.....>OUT2 tDOFF ––15 μs
Output Switching Time
CCP = 0 to 33 nF
OUTiH.....OUTiL, OUTiL.....OUTiH,
IOUT = 3.0 A tr, tf2.0 – 5.0 μs
Disable Delay Time
DIi.....OUTi tDDIS ––8.0 μs
Turn off in Case of Overcurrent or
Overtemperature –4.08.0 μs
Power On Delay Time (CCP = 33 nF)(5) –1.05.0 ms
Notes
4. In case of overcurrent, the time when the current is greater than 7.8 A is lower than 30 μs, with a maximum frequency of 1 kHz.
5. This parameter corresponds to the time for CCP to reach its nominal value when VBAT is applied.
Table 3. STATIC ELECTRICAL CHARACTERISTICS(continued)
Characteristic noted under conditions -40°C to +125 °C, VBAT from 5 V to 28 V, unless otherwise note. Typical values reflect
approximate mean at 25°C, nominal VCC, at time of device characterization.
Characteristics Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
8Freescale Semiconductor
33186
ELECTRICAL CHARACTERISTICS
TRUTH TABLE
TRUTH TABLE
Table 4. TRUTH TABLE
Device State Input Conditions Status Outputs
DI1 (8) DI2 (8) IN1 IN2 SF(9) SF(10) OU1 OU2
1-Forward LHHLHH H L
2-Reverse LHLHHH L H
3-Free Wheeling Low LHLLHH L L
4-Free Wheeling High LHHHHH H H
5-Disable 1 HXXXLH Z Z
6-Disable 2 XLXXLH Z Z
7-IN1 Disconnected LHZXHH H X
8-IN2 Disconnected LHXZHH X H
9-DI1 Disconnected ZXXXLH Z Z
10-DI2 Disconnected XZXXLH Z Z
11-Current Limit.active LHXXHH Z Z
12-Undervoltage(6) XXXXLL Z Z
13-Overtemperature(7) XXXXLL Z Z
14-Overcurrent(7) XXXXLL Z Z
Notes
6. In case of undervoltage, tristate and status-flag are reset automatically.
7. Whenever overcurrent or overtemperature is detected, the fault is stored (i.e.status-flag remains low). The tristate conditions and the
status-flag are reset via DI1 (IN1) or DI2 (IN2). Pin names in brackets refer to coding Pin (COD = VCC).
8. If COD = VCC then DI1 and DI2 are not active.
9. COD = nc or GND
10. COD = VCC
L = Low
H = High
X = High or Low
Z = High impedance (all outpu t stage transistors are switched of f).
Analog Integrated Circuit Device Data
Freescale Semiconductor 9
33186
ELECTRICAL CHARACTERISTICS
Figure 4. Typical Application
Figure 5. Output Delay Time
M
Micro controller
10k
Voltage
47µF
VBAT
Regulator
VCC Ccp=33nF
VBAT
CP
IN1
SF
Power Ground
OUT1
OUT2
IN2
DI1
COD
DI2
GND
Power Ground
50%50%
90%
10%
tDON tDOFF
INn
OUn
Analog Integrated Circuit Device Data
10 Freescale Semiconductor
33186
ELECTRICAL CHARACTERISTICS
Figure 6. Disable Delay Time
Figure 7. Output Switching Time
10%
50%
tDDIS
Z
DIn
OUn
90%
10%
90%
10%
tf tr
OUn
Analog Integrated Circuit Device Data
Freescale Semiconductor 11
33186
ELECTRICAL CHARACTERISTICS
Figure 8. Curren t Limitation on Low Sid e
Analog Integrated Circuit Device Data
12 Freescale Semiconductor
33186
ELECTRICAL CHARACTERISTICS
Figure 9. Stand-by Current vs. Temper ature
Figure 10. VBAT Undervoltage vs. Temperature
Figure 11. Low Threshold Input Voltage vs. Temperature
Figure 12. High Threshold Inpu t Voltage vs.
Temperature
Figure 13. Vcp vs. Battery Voltage
Figure 14. RDSON vs. Temperatu re
10,5
11
T, TEMPERATURE (
°
C)
IVBAT (mA)
-50 0 25 100-25 50 75 125
11,5
12
12,5
13,5
10
9,5
9
VBAT=12V
13
4,60
4,70
T, TEMPERATURE (
°
C)
VBAT(V)
-50 0 25 100-25 50 75 125
4,80
4,90
5,00
4,50
4,40
4,30
4,20
Switch o ff Voltage
Switch on Voltage
1,83
1,84
T, TEMPERATURE (
°
C)
VinL (V )
-50 0 25 100-25 50 75 125
1,85
1,86
1,87
1,88
1,82
1,81
1,89
T, TEMPERATURE (
°
C)
Vin H (V)
-50 0 25 100-25 50 75 125
2,77
2,78
2,79
2,80
2,81
2,82
2,76
2,75
2,83
BATTERY VOLTAGE (V)
Vcp (V)
010 15 305202535
15
20
25
30
35
45
10
5
0
40 Tambient=25°C
without Ccp
T, TEMPERATURE (
°
C)
RDSon (m
Ω
)
150
160
-50 0 25 100-25 50 75 125
170
180
190
140
130
120
200 VBAT=5V without Ccp
110
Analog Integrated Circuit Device Data
Freescale Semiconductor 13
33186
ELECTRICAL CHARACTERISTICS
Figure 15. Switch off Current vs. Temperature
Figure 16. Overcurrent Detection vs. Temperature
Figure 17. Current Limitation
Figure 18. Switch off Time
Figure 19. Output Switching Time: Tr
Figure 20. Output Switching Time: Tf
T, TEMPERATURE (
°
C)
IOUT max (A)
6,70
6,80
-50 0 25 100-25 50 75 125
6,90
7,00
7,10
6,30
6,60
6,50
6,40
7,20
T, TEMPERATURE (
°
C)
14,50
15,00
-50 0 25 100-25 50 75 125
15,50
16,00
16,50
17,50
14,00
13,50
13,00
17,00
High side switch
IOCHS (A)
Imotor (1A/div)
I(out) max= 7A
Imotor (1A/div)
Out1 (5V/div)
Out2 (5V/div)
ta=20.5µs
Out1 (5V/div)
tr=3.7µs
Out1 (5V/div)
tf=2.6µs
Analog Integrated Circuit Device Data
14 Freescale Semiconductor
33186
ELECTRICAL CHARACTERISTICS
Figure 21. Output OFF Del ay
Figure 22. Output ON Delay
Figure 23. Disable Delay Time
Figure 24. High Side Overcurrent High Side Detection
Figure 25. Maximum Di2 Input Current vs. Iout2, current
Out1 (2V/d iv )
in1 (1V/div)
tdoff=12.5µs
Out1 (2V/d iv )
in1 (1V/div)
tdon=5.8µs
di2 (1V/div)
Out1 (2V/div)
tdiss=0.9µs
I(5A/div) Io ch s= 16A
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
3
3.2
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
I OU T2 (A)
Note: Current through internal recirculation diode, @125°C in case of
negative voltage at OUT2
Analog Integrated Circuit Device Data
Freescale Semiconductor 15
33186
PACKAGING
SOLDERING
PACKAGING
SOLDERING
The 20 HSOP package is designed for enhanced thermal
performance. The particularity of this package is its copper
base plate on which the power die is soldered. The base plate
is soldered on a PCB to provide heat flow to the ambient and
also to provide a large thermal capacitance.
Of course, the more copper area on the PCB, the better
the power dissipation and transient behavior.
We characterized the 20 HSOP on a double side PCB.
The bottom side area of the copper is 7.8 cm2. The top
surface is 2.7 cm2, see Figure 26.
Figure 26. PCB Test Layout
Figure 27. PHSOP20 Thermal Re sponse
Figure 27 shows the thermal response with the device
soldered on to the test PCB described on Figure 26.
Top Side Bottom Side
0,1
1
10
100
0,001 0,01 0,1 1 10 100 1000 10000
t, Time (s)
Rth (°C/W)
Analog Integrated Circuit Device Data
16 Freescale Semiconductor
33186
PACKAGING
PACKAGE DIMENSIONS
PACKAGE DIMENSIONS
Important: Package dimensions are provided in package drawings. To find the most current package outline drawing, go to
www.freescale.com and perform a keyword search for the drawing’s document number.
Dimensions shown are provided for reference ON LY (For Layou t and Design, refer to the Package Outline Drawing listed in
the following figures).
Table 5. Package Drawing Information
Package Suffix Package Outline Drawing Number
20-PIN HSOP DH/VW 98ASH70702A
Analog Integrated Circuit Device Data
Freescale Semiconductor 17
33186
PACKAGING
PACKAGE DIMENSIONS
Analog Integrated Circuit Device Data
18 Freescale Semiconductor
33186
PACKAGING
PACKAGE DIMENSIONS
Analog Integrated Circuit Device Data
Freescale Semiconductor 19
33186
PACKAGING
PACKAGE DIMENSIONS
Analog Integrated Circuit Device Data
20 Freescale Semiconductor
33186
ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
Introduction
This thermal addendum is provided as a supplement to the MC33186 tech nical
datasheet. The addendum provides thermal performance information that may be
critical in the design and development of system applications. All electrical,
application, and packaging information is provided in the datasheet.
Package and Ther mal Considerations
The MC33186 is offered in a 20 pin HSOP exposed pad, sing le die package.
There is a single heat source (P), a single junction temperature (TJ), and thermal
resistance (RθJA).
The stated values are solely for a thermal performance comparison of one
package to another in a standardi zed environment. This methodology is not
meant to and will not predict the performance of a package in an application-
specific environment. Stated values were obtained by me asurement and
simulation according to the standard s listed below.
20-PIN
HSOP-EP
33186DH
33186VW
DH SUFFIX
VW SUFFIX (Pb-FREE)
98ASH70273A
20-PIN HSOP-EP
Note For package dimensions, refer to
the 33186 data sheet.
TJ=RθJA .P
1.0
1.0
0.2
0.2
* All measurements
are in millimeters
Soldermast
openings
Thermal vias
connected to top
buried plane
20 Pin HSOP-EP
1.6 mm Pitch
16.0 mm x 11.0 mm Body
12.3 mm x 7.1 mm Exposed Pad
Analog Integrated Circuit Device Data
Freescale Semiconductor 21
33186
ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
Figure 29. Thermal Test Board
Device on Thermal Test Board Table 7. Thermal Resistance Performance
RθJA is the thermal resistance between die junction and
ambient air.
A
33186DH1 Pin Connections
20-Pin HSOP-EP
1.6 mm Pitch
16.0 mm x 11.0 mm Body
12.3 x 7.1 mm exposed pad
NCAGND IN2
DI1
CP
VBAT
OUT2
OUT2
DI2
PGND
PGND
SF
VBAT
OUT1
OUT1
COD
PGND
PGND
IN1
VBAT
1
2
3
4
5
6
7
8
9
10
20
19
16
15
14
13
12
11
18
17
Material: Single layer printed circuit board
FR4, 1.6 mm thickness
Cu traces, 0.07 mm thickness
Outline: 80 mm x 100 mm board ar ea,
including edge connector for
thermal testing
Area A: Cu heat-spreading areas on board
surface
Ambient Conditions : Natural convection, still air
A [mm2]R
θJA [°C/W]
070
300 49
600 47
Analog Integrated Circuit Device Data
22 Freescale Semiconductor
33186
ADDITIONAL DOCUMENTATION
THERMAL ADDENDUM (REV 2.0)
Figure 30. Device on Thermal Test Board RθJA
Figure 31. Transient Thermal Resistance RθJA
1 W Step Response, Device on Thermal Test Board Area A = 600 (mm2)
0
10
20
30
40
50
60
70
80
H eat spr eading area A [mm²]
Therm al Resist ance [ ºC/W
]
0 300 600
R
θ
JA
[
°C/W]
x
Heat Spreading Area A [mm2]
0 300 600
Thermal Resistance [°C/W]
80
70
60
50
40
30
20
10
0
0.1
1
10
100
1.00E-03 1.00E-02 1.00E-01 1.00E+00 1.00E+01 1.00E+02 1.00E+03 1.00E+04
Time[s]
T hermal Resistance [º C/W ]
R
θ
JA
[
°C/W]
x
Thermal Resistance [°C/W]
100
10
1
0.1
Time [s] 1.00E+041.00E+031.00E+021.00E+011.00E+001.00E-011.00E-021.00E-03
Analog Integrated Circuit Device Data
Freescale Semiconductor 23
33186
REVISION HISTORY
REVISION HISTORY
REVISION DATE DESCRIPTION OF CHANGES
5.0 5/2006 • Implemented Revision History page
• Added Lead Free (Pb-Free) Part Number MC33186VW1
6.0 10/2006 • Updated data sheet formal
• Removed Peak Package Reflow Temperature During Reflow (solder reflow) parameter from
MAXIMUM RATINGS on page 5. Added note with instructions to obtain this information from
www.freescale.com.
7.0 10/2011 • Updated Package Dimensions according to the latest Freescale package specification
98ASH70702A_C
• Updated to the current Freescale form and style.
How to Reach Us:
Home Page:
www.freescale.com
Web Support:
http://www.freescale.com/support
USA/Europe or Locations Not Listed:
Freescale Semiconductor, Inc.
Technical Information Center, EL516
2100 East Elliot Road
Tempe, Arizona 85284
1-800-521-6274 or +1-480-768-21 30
www.freescale.com/support
Europe, Middle East, and Africa:
Freescale Halbleiter Deutschland GmbH
Technical Information Center
Schatzbogen 7
81829 Muenchen, Germany
+44 1296 380 456 (English)
+46 8 52200080 (English)
+49 89 92103 559 (German)
+33 1 69 35 48 48 (French)
www.freescale.com/support
Japan:
Freescale Semiconductor Japan Ltd.
Headquarters
ARCO Tower 15F
1-8-1, Shimo-Meguro, Meguro-ku,
Tokyo 153-0064
Japan
0120 191014 or +81 3 5437 9125
support.japan@freescale.com
Asia/Pacific:
Freescale Semiconductor China Ltd.
Exchange Building 23F
No. 118 Jianguo Road
Chaoyang District
Beijing 100022
China
+86 10 5879 8000
support.asia@freescale.com
For Literature Requests Only:
Freescale Semiconductor Literature Distribution Center
P.O. Box 5405
Denver, Colorado 80217
1-800-441-2447 or +1-303-675-21 40
Fax: +1-303-675-2150
LDCForFreescaleSemiconductor@hibbertgroup.com
Information in this document is provided solely to enable system and
software impl ementers to use Freescale Semico nductor products. Ther e are
no express or implied copyright licenses granted hereunder to design or
fabricate any integrated circuits or integrated circuits based on the
information in this document.
Freescale Semiconducto r reserves the right to make change s without further
to products herein. Freescale Semiconductor makes no warran ty,
representation or regardin g the suitability of its products for any particular
purpose, nor does Fre escale Semiconduct or assume any liabili ty arising out
of the or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation consequential or incidental damages.
“T ypical” parameters that may be provided in Freescale Semiconductor data
sheets and/or specifications can and do vary in different applications and
actual perfor mance may vary over time. All op er ati n g parameters, including
“Typicals”, be validated for each customer application by technical experts.
Freescale Semiconducto r does not convey any license under i ts patent right s
nor the rights of others. Freescale Semiconductor products are designed,
intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or
sustain life, or for any other application in which the failure of the Freescale
Semiconductor product could create a situation where personal injury or
death may occur. Should Buyer purchase or use Freescale Semiconductor
products for any such unintended or unauthorized application, Buyer shall
indemnify and hold Freesca le Semiconductor and its officers, employees,
subsidiaries, af filiates, and harmless aga inst all claims, costs, d amages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that Freescale Semiconductor
was negligent regarding the design or manufacture of the part.
Freescale and the Freescale logo are trademarks of Freescale
Semiconductor, In c., Reg. U.S. Pat. & Tm. Off. Qorivva, S 12 MagniV,
SMARTMOS and Xtrinsic are trademarks of Freescale
Semiconductor, Inc. ARM is the registered trademark of ARM
Limited. The Power Architecture and Power.org word marks and the
Power and Power.org logos and related marks are trademarks and
service marks licensed by Power.org. All other product or service
names are the propert y of their respect ive owners. ©2011 Fr eescale
Semiconductor, Inc.
MC33186
Rev. 7.0
10/2011