IRS2092STRPBF - International Rectifier

October 18, 2010

IRS2092

PROTECTED DIGITAL AUDIO AMPLIFIER

Features

• Integrated analog input Class D audio amplifier

driver in a small 16 pin package

• Floating inputs enable easy half bridge

implementation

• Programmable bidirectional over-current

protection with self-reset function

• Programmable preset deadtime for improved

THD performances

• Start and stop click noise reduction

• High noise immunity

• ±100 V ratings deliver up to 500 W in output

power

• Operates up to 800 kHz

• RoHS compliant

Typical Applications

• Home theater systems

• Mini component stereo systems

• Powered speaker systems

• General purpose audio power amplifiers

Product Summary

VOFFSET (max) ± 100 V

Io+ 1.0 A

Gate driver Io - 1.2 A

Selectable Deadtime 25/40/65/105 ns

OC protection delay (max) 500 ns

DC offset <20 mV

PWM frequency ~800 kHz

Error amplifier open loop gain >60 dB

THD+N* (1kHz, 50W, 4) 0.01 %

Residual Noise*

(AES-17 Filter) 200 µVrms

* measured with recommended circuit

Package Options

SOIC16N PDIP16

Typical Connection Diagram

IRS2092

12V

VAA

GND

IN-

OCSET

COM

COMP

VSS LO

VCC

VREF

CSD

CSH

INPUT

-B

Vcc

Speaker

161

IRS2092

Table of Contents Page

Description 3

Simplified Block Diagram 4

Typical Application Diagram 4

Qualification Information 5

Absolute Maximum Ratings 6

Recommended Operating Conditions 7

Electrical Characteristics 8

Waveform Definitions 10

Functional Block Diagram 11

Input/Output Pin Equivalent Circuit Diagram 12

Lead Definitions 13

Lead Assignments 13

Package Details 14

Tape and Reel Details 16

Part Marking Information 17

Ordering Information 18

IRS2092

Description

The IRS2092 is a high voltage, high performance Class D audio amplifier driver with PWM modulator and protection.

In conjunction with two external MOSFET and a few external components, a complete Class D audio amplifier with

protection can be realized.

International Rectifier’s proprietary noise isolation technology allows high current gate drive stage and high speed

low noise error amplifier reside on a single small silicon die.

Open elements of PWM modulator section allow flexible PWM topology implementation.

IRS2092

Simplified Block Diagram

Typical Application Diagram

1 k

4.7 

Refer to IRAUDAMP5 reference design for details.

IRS2092

Qualification Information†

Industrial††

(per JEDEC JESD 47E)

Qualification Level Comments: This IC has passed JEDEC’s Industrial

qualification. IR’s Consumer qualification level is granted

by extension of the higher Industrial level.

SOIC16N MSL2†††

(per IPC/JEDEC J-STD-020C)

Moisture Sensitivity Level

DIP16 Not applicable

Machine Model Class B

(per JEDEC standard JESD22-A114D)

Human Body Model Class 2

(per EIA/JEDEC standard EIA/JESD22-A115-A)

ESD

Charged Device Model Class IV

(per JEDEC standard JESD22-C101C)

IC Latch-Up Test Class I, Level A

(per JESD78A)

RoHS Compliant Yes

† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/

†† Higher qualification ratings may be available should the user have such requirements. Please contact your

International Rectifier sales representative for further information.

††† Higher MSL ratings may be available for the specific package types listed here. Please contact your

International Rectifier sales representative for further information.

IRS2092

Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All

voltage parameters are absolute voltages referenced to COM; all currents are defined positive into any lead.

The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air

conditions.

Symbol Definition Min Max Units

VB High side floating supply voltage -0.3 220

VS High side floating supply voltage (Note2) VB -20 VB +0.3

VHO High side floating output voltage VS -0.3 VB +0.3

VCSH CSH pin input voltage VS -0.3 VB +0.3

VCC Low side fixed supply voltage (Note2) -0.3 20

VLO Low side output voltage -0.3 Vcc+0.3

VAA Floating input positive supply voltage (Note2) (See IAAZ) 210

VSS Floating input negative supply voltage (Note2) -1

(See ISSZ) GND +0.3

VGND Floating input supply ground voltage

VSS -0.3

(See ISSZ) VAA +0.3

(See IAAZ)

IIN- Inverting input current (Note1) --- ±3 mA

VCSD SD pin input voltage VSS -0.3 VAA +0.3

VCOMP COMP pin input voltage VSS -0.3 VAA +0.3

VDT DT pin input voltage -0.3 VCC +0.3

VOCSET OCSET pin input voltage -0.3 VCC+0.3

IAAZ Floating input positive supply zener clamp current (Note2) --- 20

ISSZ Floating input negative supply zener clamp current (Note2) --- 20

ICCZ Low side supply zener clamp current (Note3) --- 10

IBSZ Floating supply zener clamp current (Note3) --- 10

IOREF Reference output current --- 5

dVS/dt Allowable Vs voltage slew rate --- 50 V/ns

dVSS/dt Allowable Vss voltage slew rate (Note3) --- 50 V/ms

SOIC16N --- 1.0

Pd Maximum power dissipation @ TA ≤ +25°C DIP16 --- 1.6

SOIC16N --- 115

RthJA Thermal resistance, Junction to ambient DIP16 --- 75

°C/W

TJ Junction Temperature --- 150 °C

TS Storage Temperature -55 150 °C

TL Lead temperature (soldering, 10 seconds) --- 300 °C

Note1: IN- contains clamping diode to GND.

Note2: VDD – IN+, GND -VSS, VCC-COM and VB-VS contain internal shunt zener diodes. Please note that the

voltage ratings of these can be limited by the clamping current.

Note3: For the rising and falling edges of step signal of 10 V. VSS=15 V to 200 V.

IRS2092

Recommended Operating Conditions

For proper operation, the device should be used within the recommended conditions below. The Vs and COM offset ratings

are tested with supplies biased at VAA-VSS=10 V, VCC=12 V and VB-VS=12 V. All voltage parameters are absolute voltages

referenced to COM; all currents are defined positive into any lead.

Symbol Definition Min. Max. Units

VB High side floating supply absolute voltage VS +10 VS +18

VS High side floating supply offset voltage (Note 1) 200 V

IAAZ Floating input positive supply zener clamp current 1 11

ISSZ Floating input negative supply zener clamp current 1 11 mA

VSS Floating input supply absolute voltage 0 200

VHO High side floating output voltage Vs VB

VCC Low side fixed supply voltage 10 18

VLO Low side output voltage 0 VCC

VGND GND pin input voltage VSS (Note 3) V

AA (Note 3)

VIN- Inverting input voltage VGND -0.5 VGND +0.5

VCSD CSD pin input voltage VSS V

VCOMP COMP pin input voltage VSS V

CCOMP COMP pin phase compensation capacitor to GND 1 - nF

VDT DT pin input voltage 0 VCC V

IOREF Reference output current to COM (Note 2) 0.3 0.8 mA

VOCSET OCSET pin input voltage 0.5 5

VCSH CSH pin input voltage Vs VB V

dVss/dt Allowable Vss voltage slew rate upon power-up (Note4) - 50 V/ms

IPW Input pulse width 10 (Note 5) - ns

fSW Switching Frequency - 800 kHz

TA Ambient Temperature -40 125 °C

Note 1: Logic operational for Vs equal to –5 V to +200 V. Logic state held for Vs equal to –5 V to –VBS.

Note 2: Nominal voltage for VREF is 5.1 V. IOREF of 0.3 – 0.8 mA dictates total external resistor value on VREF to be 6.3 k to

16.7 k.

Note 3: GND input voltage is limited by IAAZ and ISSZ.

Note 4: VSS ramps up from 0 V to 200 V.

Note 5: Output logic status may not respond correctly if input pulse width is smaller than the minimum pulse width.

IRS2092

Electrical Characteristics

VCC,VBS= 12 V, VSS=VS=COM=0 V, VAA=10 V, CL=1 nF and TA=25 °C unless otherwise specified.

Symbol Definition Min Typ Max Units Test Conditions

Low Side Supply

UVCC+ Vcc supply UVLO positive threshold 8.4 8.9 9.4

UVCC- Vcc supply UVLO negative threshold 8.2 8.7 9.2

UVCCHYS UVCC hysteresis - 0.2 -

IQCC Low side quiescent current - - 3 mA VDT=VCC

VCLAMPL Low side zener diode clamp voltage 19.6 20.4 21.6 V ICC=5 mA

High Side Floating Supply

UVBS+ High side well UVLO positive threshold 8.0 8.5 9.0

UVBS- High side well UVLO negative threshold 7.8 8.3 8.8

UVBSHYS UVBS hysteresis - 0.2 -

IQBS High side quiescent current - - 1 mA

ILKH High to Low side leakage current - - 50 µA VB=VS =200 V

VCLAMPH High side zener diode clamp voltage 19.6 20.4 21.6 V IBS=5 mA

Floating Input Supply

UVAA+

VA+, VA- floating supply UVLO positive

threshold from VSS 8.2 8.7 9.2 VSS =0 V, GND pin

floating

UVAA- VA+, VA- floating supply UVLO negative

threshold from VSS 7.7 8.2 8.7 VSS =0 V, GND pin

floating

UVAAHYS UVAA hysteresis - 0.5 -

VSS =0 V, GND pin

floating

IQAA0 Floating Input positive quiescent supply

current - 0.5 2 VAA=10 V, VSS =0 V,

VCSD =VSS

IQAA1 Floating Input positive quiescent supply

current - 8 11 VAA=10 V, VSS =0 V,

VCSD =VAA

IQAA2 Floating Input positive quiescent supply

current - 8 11

VAA=10 V, VSS =0 V,

VCSD =GND

ILKM Floating input side to Low side leakage

current - - 50 µA

VAA=VSS=VGND=

100 V

VCLAMPM+ VAA floating supply zener diode clamp

voltage, positive, with respect to GND 6.0 7.0 8.0

IAA=5 mA, ISS=5 mA,

VGND=0 V,

VCSD =VSS

VCLAMPM- VSS floating supply zener diode clamp

voltage, negative, with respect to GND -8.0 -7.0 -6.0

V IAA=5 mA, ISS=5 mA,

VGND=0 V,

VCSD =VSS

Audio Input (VGND=0, VAA=5V, VSS=-5V)

VOS Input offset voltage -15 0 15 mV

IBIN Input bias current - - 40 nA

BW Small signal bandwidth - 9 - MHz CCOMP=2 nF,

Rf=3.3 k

VCOMP OTA Output voltage VAA-1 - VSS+1 V

gm OTA transconductance - 100 - mS VIN-=10 mV

GV OTA gain 60 - - dB

VNrms OTA input noise voltage - 250 - mVrms

BW=20 kHz,

Resolution

BW=22 Hz

Fig.5

SR Slew rate - ±5 - V/us CCOMP=1 nF

CMRR Common-mode rejection ratio - 60 -

PSRR Supply voltage rejection ratio - 65 - dB

PWM comparator

VthPWM PWM comparator threshold in COMP - (VAA-VSS)/2 - V

fOTA COMP pin star-up local oscillation 0.7 1.0 1.5 MHz VCSD =GND

IRS2092

frequency

Protection

VREF Reference output voltage 4.8 5.1 5.4 IOREF =0.5 mA

VthOCL Low side OC threshold in Vs 1.1 1.2 1.3 OCSET=1.2 V,

Fig.6

VthOCH High side OC threshold in VCSH 1.1+ Vs 1.2+ Vs 1.3+ Vs Vs=200 V,

Vth1 CSD pin shutdown release threshold 0.62xVAA 0.70xVAA 0.78xVAA

Vth2 CSD pin self reset threshold 0.26xVAA 0.30xVAA 0.34xVAA

ICSD+ CSD pin discharge current 70 100 130 VCSD = VSS +5 V

ICSD- CSD pin charge current 70 100 130 µA VCSD = VSS +5 V

tSD Shutdown propagation delay from VCSD >

VSS + VthOCH to Shutdown - - 250

tOCH Propagation delay time from VCSH >

VthOCH to Shutdown - - 500 Fig.3

tOCL Propagation delay time from Vs> VthOCL

to Shutdown - - 500

Fig.4

Gate Driver

Io+ Output high short circuit current (Source) - 1.0 - A Vo=0 V, PW<10 µs

Io- Output low short circuit current (Sink) - 1.2 - A Vo=12 V, PW<10 µs

VOL Low level out put voltage

LO – COM, HO - VS - - 0.1

VOH High level out put voltage

VCC – LO, VB - HO - - 1.4

V Io=0 A

ton High and low side turn-on propagation

delay - 360 - VDT = VCC

toff High and low side turn-off propagation

delay - 335 - VDT = VCC

tr Turn-on rise time - 20 50

tf Turn-off fall time - 15 35

DT1

Deadtime: LO turn-off to HO turn-on

(DTLO-HO) & HO turn-off to LO turn-on

(DTHO-LO)

15 25 35 VDT>VDT1,

DT2

Deadtime: LO turn-off to HO turn-on

(DTLO-HO) & HO turn-off to LO turn-on

(DTHO-LO)

25 40 55 VDT1>VDT> VDT2,

DT3

Deadtime: LO turn-off to HO turn-on

(DTLO-HO) & HO turn-off to LO turn-on

(DTHO-LO)

50 65 85 VDT2>VDT> VDT3,

DT4

Deadtime: LO turn-off to HO turn-on

(DTLO-HO) & HO turn-off to LO turn-on

(DTHO-LO)VDT= VDT4

85 105 135

VDT3>VDT> VDT4,

VDT1 DT mode select threshold 2 0.51xVcc 0.57xVcc 0.63xVcc

VDT2 DT mode select threshold 3 0.32xVcc 0.36xVcc 0.40xVcc

VDT3 DT mode select threshold 4 0.21xVcc 0.23xVcc 0.25xVcc

IRS2092

Waveform Definitions

Vth1

tSD

90%

CSD

HO/LO

Figure 1: Switching Time Waveform Definitions Figure 2: CSD to Shutdown Waveform Definitions

VthOCL

tOCL

90%

VthOCH

tOCH

90%

CSH

Figure 3: VS > VthOCL to Shutdown Waveform Figure 4: VCSH > VthOCH to Shutdown Waveform

Figure 5: OTA input noise voltage mesurent circuit

IRS2092

Functional Block Diagram: IRS2092

HIGH

SIDE

IN-

LOW SIDE CS

CSD

DETECT

DEAD TIME

VCC

COM

VAA

GND

COMP

VSS

CSH

PROTECTION

CONTROL

VREF

DETECT

CHARGE/

DISCHARGE

LEVEL

SHIFT

LEVEL

SHIFT

LEVEL

SHIFT

FLOATING INPUT

FLOATING HIGH SIDE

LEVEL

SHIFT

LEVEL

SHIFT

5V REG

OCSET

OTA

VAA+VSS

2COMP

PWM MODULATOR

CLICK NOISE

ELLIMINATION

IRS2092

Input/Output Pin Equivalent Circuit Diagrams: IRS2092

ESD

Diode

ESD

Diode

ESD

Diode

ESD

Diode

COM

200 V

20 V

Clamp

20 V

Clamp

VCC

ESD

Diode

ESD

Diode

VAA

COMP

or CSD

VSS

ESD

Diode

ESD

Diode

VCC

DT, VREF

OCSET

COM

IRS2092

Lead Definitions: IRS2092

Pin # Symbol Description

1 VAA Floating input positive supply

2 GND Floating input supply return

3 IN- Analog inverting input

4 COMP Phase compensation input, comparator input

5 CSD Shutdown timing capacitor

6 VSS Floating input negative supply

7 VREF 5V reference voltage to program OCSET pin

8 OCSET Low side over current threshold setting

9 DT Deadtime program input

10 COM Low side supply return

11 LO Low side output

12 VCC Low side supply

13 VS High side floating supply return

14 HO High side output

15 VB High side floating supply

16 CSH High side over current sensing input

Lead Assignments

VAA

GND

IN-

OCSET

COM

COMP

CSD

VCC

VREF

VSS

CSH

IRS2092

PDIP16 and SOIC16N

IRS2092

Package Details: PDIP16

IRS2092

Package Details: SOIC16N

IRS2092

Tape and Reel Details: SOIC16N

CARRIER TAPE DIMENSION FOR 16SOICN

Code Min Max Min Max

A 7.90 8.10 0.311 0.318

B 3.90 4.10 0.153 0.161

C 15.70 16.30 0.618 0.641

D 7.40 7.60 0.291 0.299

E 6.40 6.60 0.252 0.260

F 10.20 10.40 0.402 0.409

G 1.50 n/a 0.059 n/a

H 1.50 1.60 0.059 0.062

REEL DIMENSIONS FOR 16SOICN

Code Min Max Min Max

A 329.60 330.25 12.976 13.001

B 20.95 21.45 0.824 0.844

C 12.80 13.20 0.503 0.519

D 1.95 2.45 0.767 0.096

E 98.00 102.00 3.858 4.015

F n/a 22.40 n/a 0.881

G 18.50 21.10 0.728 0.830

H 16.40 18.40 0.645 0.724

Metric Imperial

OTE : CONTROLLING

DIMENSION IN MM

LOADED TAPE FEED DIRECTION

IRS2092

Part Marking Information

IRS2092

Ordering Information

Standard Pack

Base Part Number Package Type Form Quantity Complete Part Number

PDIP16 Tube/Bulk 25 IRS2092PBF

Tube/Bulk 45 IRS2092SPBF

IRS2092 SOIC16N

Tape and Reel 2500 IRS2092STRPBF

The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility for

the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of other

rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any patent or

patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This document

supersedes and replaces all information previously supplied.

For technical support, please contact IR’s Technical Assistance Center

http://www.irf.com/technical-info/

WORLD HEADQUARTERS:

233 Kansas St., El Segundo, California 90245

Tel: (310) 252-7105