www.irf.com 1
07/09/08
IRF8910PbF
HEXFET® Power MOSFET
Notes through are on page 10
SO-8
Benefits
lVery Low RDS(on) at 4.5V VGS
lUltra-Low Gate Impedance
lFully Characterized Avalanche Voltage
and Current
l20V VGS Max. Gate Rating
D1
D1
D2
D2
G1
S2
G2
S1
Top View
8
1
2
3
45
6
7
Applications
lDual SO-8 MOSFET for POL
converters in desktop, servers,
graphics cards, game consoles
and set-top box
lLead-Free
VDSS RDS(on) max ID
20V 13.4m
:
@VGS = 10V 10A
Absolute Maximum Ratin
g
s
Parameter Units
VDS Drain-to-Source Voltage V
VGS Gate-to-Source Voltage
ID @ TA = 25°C Continuous Drain Current, VGS @ 10V
ID @ TA = 70°C Continuous Drain Current, VGS @ 10V A
IDM Pulsed Drain Current
c
PD @TA = 25°C Power Dissipation W
PD @TA = 70°C Power Dissipation
Linear Derating Factor W/°C
TJ Operating Junction and °C
TSTG Storage Temperature Range
Thermal Resistance
Parameter Typ. Max. Units
RθJL Junction-to-Drain Lead ––– 42 °C/W
RθJA Junction-to-Ambient
fg
––– 62.5
Max.
10
8.3
82
± 20
20
-55 to + 150
2.0
0.016
1.3
PD -95673A
IRF8910PbF
2www.irf.com
S
D
G
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. T
y
p. Max. Units
BVDSS Drain-to-Source Breakdown Voltage 20 ––– ––– V
∆ΒVDSS
/
∆TJ Breakdown Voltage Temp. Coefficient ––– 0.015 ––– V/°C
RDS(on) Static Drain-to-Source On-Resistance ––– 10.7 13.4 mΩ
––– 14.6 18.3
VGS(th) Gate Threshold Voltage 1.65 ––– 2.55 V
∆VGS(th)
/
∆TJGate Threshold Voltage Coefficient ––– -4.8 ––– mV/°C
IDSS Drain-to-Source Leakage Current ––– ––– 1.0 µA
––– ––– 150
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA
Gate-to-Source Reverse Leakage ––– ––– -100
gfs Forward Transconductance 24 ––– ––– S
QgTotal Gate Charge ––– 7.4 11
Qgs1 Pre-Vth Gate-to-Source Charge ––– 2.4 –––
Qgs2 Post-Vth Gate-to-Source Charge ––– 0.80 ––– nC
Qgd Gate-to-Drain Charge ––– 2.5 –––
Qgodr Gate Charge Overdrive ––– 1.7 ––– See Fig. 6
Qsw Switch Char
g
e (Qgs2 + Qgd)––– 3.3 –––
Qoss Output Charge ––– 4.4 ––– nC
td(on) Turn-On Delay Time ––– 6.2 –––
trRise Time –––10––– ns
td(off) Turn-Off Delay Time ––– 9.7 –––
tfFall Time ––– 4.1 –––
Ciss Input Capacitance ––– 960 –––
Coss Output Capacitance ––– 300 ––– pF
Crss Reverse Transfer Capacitance ––– 160 –––
Avalanche Characteristics
Parameter Units
EAS
Si
n
gl
e
P
u
l
se
A
va
l
anc
h
e
E
ner
gy
d
mJ
IAR
A
va
l
anc
h
e
C
urrent
c
A
Diode Characteristics
Parameter Min. T
y
p. Max. Units
ISContinuous Source Current ––– ––– 2.5
(Body Diode) A
ISM Pulsed Source Current ––– ––– 82
(Body Diode)
c
VSD Diode Forward Voltage ––– ––– 1.0 V
trr Reverse Recovery Time ––– 17 26 ns
Qrr Reverse Recovery Charge ––– 6.5 9.7 nC
–––
ID = 8.2A
VGS = 0V
VDS = 10V
VGS = 4.5V, ID = 8.0A
e
VGS = 4.5V
Typ.
–––
VDS = VGS, ID = 250µA
Clamped Inductive Load
VDS = 10V, ID = 8.2A
VDS = 16V, VGS = 0V, TJ = 125°C
TJ = 25°C, IF = 8.2A, VDD = 10V
di/dt = 100A/
µ
s
e
TJ = 25°C, IS = 8.2A, VGS = 0V
e
showing the
integral reverse
p-n junction diode.
MOSFET symbol
VDS = 10V, VGS = 0V
VDD = 10V, VGS = 4.5V
ID = 8.2A
VDS = 10V
VGS = 20V
VGS = -20V
VDS = 16V, VGS = 0V
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 10A
e
Conditions
Max.
19
8.2
ƒ = 1.0MHz
IRF8910PbF
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Fig 4. Normalized On-Resistance
vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
ID, Drain-to-Source Current (A)
VGS
TOP 10V
8.0V
5.5V
4.5V
3.5V
3.0V
2.8V
BOTTOM 2.5V
≤60µs PULSE WIDTH
Tj = 25°C
2.5V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
ID, Drain-to-Source Current (A)
2.5V ≤60µs PULSE WIDTH
Tj = 150°C
VGS
TOP 10V
8.0V
5.5V
4.5V
3.5V
3.0V
2.8V
BOTTOM 2.5V
123456
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
ID, Drain-to-Source Current (Α)
TJ = 25°C
TJ = 150°C
VDS = 10V
≤60µs PULSE WIDTH
-60 -40 -20 020 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
0.5
1.0
1.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 10A
VGS = 10V
IRF8910PbF
4www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
C, Capacitance(pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
012345678910
QG Total Gate Charge (nC)
0.0
1.0
2.0
3.0
4.0
5.0
6.0
VGS, Gate-to-Source Voltage (V)
VDS= 16V
VDS= 10V
ID= 8.2A
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VSD, Source-to-Drain Voltage (V)
0.01
0.10
1.00
10.00
100.00
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 150°C
VGS = 0V
0 1 10 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
TA = 25°C
Tj = 150°C
Single Pulse
IRF8910PbF
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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Fig 9. Maximum Drain Current vs.
Ambient Temperature
Fig 10. Threshold Voltage vs. Temperature
25 50 75 100 125 150
TA , Ambient Temperature (°C)
0
1
2
3
4
5
6
7
8
9
10
ID, Drain Current (A)
1E-006 1E-005 0.0001 0.001 0.01 0.1 110 100
t1 , Rectangular Pulse Duration (sec)
0.01
0.1
1
10
100
Thermal Response ( Z thJA )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
τJ
τJ
τ1
τ1τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
Ci= τi/Ri
Ci= τi/Ri
τ4
τ4
R4
R4
τC
τC
τ5
τ5
R5
R5
Ri (°C/W) τi (sec)
1.2647 0.000091
2.0415 0.000776
18.970 0.188739
23.415 0.757700
16.803 25.10000
-75 -50 -25 025 50 75 100 125 150
TJ , Temperature ( °C )
1.0
1.5
2.0
2.5
VGS(th) Gate threshold Voltage (V)
ID = 250µA
IRF8910PbF
6www.irf.com
Fig 13. Maximum Avalanche Energy
vs. Drain Current
Fig 16. Switching Time Test Circuit Fig 17. Switching Time Waveforms
Fig 12. On-Resistance vs. Gate Voltage
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 15. Gate Charge Test Circuit
Fig 14. Unclamped Inductive Test Circuit
and Waveform
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
VDD
VDS
LD
D.U.T
+
-
VGS
VDS
90%
10%
td(on) td(off)
trtf
25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
0
10
20
30
40
50
60
70
80
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 3.4A
4.9A
BOTTOM 8.2A
3 4 5 6 7 8 9 10
VGS, Gate -to -Source Voltage (V)
0.00
10.00
20.00
30.00
40.00
RDS(on), Drain-to -Source On Resistance (mΩ)
ID = 10A
TJ = 125°C
TJ = 25°C
IRF8910PbF
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Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Fig 16. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
IRF8910PbF
8www.irf.com
Control FET
Special attention has been given to the power losses
in the switching elements of the circuit - Q1 and Q2.
Power losses in the high side switch Q1, also called
the Control FET, are impacted by the Rds(on) of the
MOSFET, but these conduction losses are only about
one half of the total losses.
Power losses in the control switch Q1 are given
by;
Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput
This can be expanded and approximated by;
P
loss =Irms
2×Rds(on )
()
+I×Qgd
ig
×Vin ×f
⎛
⎝
⎜ ⎞
⎠
⎟ +I×Qgs 2
ig
×V
in ×f
⎛
⎝
⎜ ⎞
⎠
⎟
+Qg×Vg×f
()
+Qoss
2×Vin ×f
⎛
⎝ ⎞
⎠
This simplified loss equation includes the terms Qgs2
and Qoss which are new to Power MOSFET data sheets.
Qgs2 is a sub element of traditional gate-source
charge that is included in all MOSFET data sheets.
The importance of splitting this gate-source charge
into two sub elements, Qgs1 and Qgs2, can be seen from
Fig 16.
Qgs2 indicates the charge that must be supplied by
the gate driver between the time that the threshold
voltage has been reached and the time the drain cur-
rent rises to Idmax at which time the drain voltage be-
gins to change. Minimizing Qgs2 is a critical factor in
reducing switching losses in Q1.
Qoss is the charge that must be supplied to the out-
put capacitance of the MOSFET during every switch-
ing cycle. Figure A shows how Qoss is formed by the
parallel combination of the voltage dependant (non-
linear) capacitances Cds and Cdg when multiplied by
the power supply input buss voltage.
Synchronous FET
The power loss equation for Q2 is approximated
by;
P
loss =P
conduction +P
drive +P
output
*
P
loss =Irms
2×Rds(on)()
+Qg×Vg×f
()
+Qoss
2×Vin ×f
⎛
⎝
⎜ ⎞
⎠ +Qrr ×Vin ×f
(
)
*dissipated primarily in Q1.
For the synchronous MOSFET Q2, Rds(on) is an im-
portant characteristic; however, once again the im-
portance of gate charge must not be overlooked since
it impacts three critical areas. Under light load the
MOSFET must still be turned on and off by the con-
trol IC so the gate drive losses become much more
significant. Secondly, the output charge Qoss and re-
verse recovery charge Qrr both generate losses that
are transfered to Q1 and increase the dissipation in
that device. Thirdly, gate charge will impact the
MOSFETs’ susceptibility to Cdv/dt turn on.
The drain of Q2 is connected to the switching node
of the converter and therefore sees transitions be-
tween ground and Vin. As Q1 turns on and off there is
a rate of change of drain voltage dV/dt which is ca-
pacitively coupled to the gate of Q2 and can induce
a voltage spike on the gate that is sufficient to turn
the MOSFET on, resulting in shoot-through current .
The ratio of Qgd/Qgs1 must be minimized to reduce the
potential for Cdv/dt turn on.
Power MOSFET Selection for Non-Isolated DC/DC Converters
Figure A: Qoss Characteristic
IRF8910PbF
www.irf.com 9
SO-8 Package Outline(Mosfet & Fetky)
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Dimensions are shown in milimeters (inches)
SO-8 Part Marking Information
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(;$03/(7+,6,6$1,5)026)(7
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;;;;
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Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
IRF8910PbF
10 www.irf.com
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 0.57mH, RG = 25Ω, IAS = 8.2A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
When mounted on 1 inch square copper board.
Rθ is measured at TJ of approximately 90°C.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/2008
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
FEED DIRECTION
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
SO-8 Tape and Reel
Dimensions are shown in milimeters (inches)
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
