©1999 Burr-Brown Corporation PDS-1530A Printed in U.S.A. June, 1999
®
FEATURES
●DESIGNED FOR LOW COST
●SINGLE, DUAL VERSIONS
●LOW OFFSET VOLTAGE DRIFT:
±450µV max, ±5µV/°C max
●LOW GAIN ERROR: 0.05% max
●WIDE BANDWIDTH: 1.5MHz
●HIGH SLEW RATE: 5V/µs
●FAST SETTLING TIME: 5.5µs to 0.01%
●LOW QUIESCENT CURRENT: 950µA
●WIDE SUPPLY RANGE: ±2.25V to ±18V
●SO-8 and SO-14 PACKAGES
APPLICATIONS
●DIFFERENTIAL INPUT AMPLIFIER
BUILDING BLOCK
●DIFF IN/ DIFF OUT AMPLIFIER
●UNITY-GAIN INVERTING AMPLIFIER
●GAIN = +1/2 OR G = +2 AMPLIFIER
●SUMMING AMPLIFIER
●SYNCHRONOUS DEMODULATOR
●CURRENT/DIFFERENTIAL LINE RECEIVER
●VOLTAGE-CONTROLLED CURRENT SOURCE
●BATTERY POWERED SYSTEMS
●LOW COST AUTOMOTIVE
DESCRIPTION
The INA133 and INA2133 are high slew rate, unity-
gain difference amplifiers consisting of a precision op
amp with a precision resistor network. The on-chip
resistors are laser trimmed for accurate gain and high
common-mode rejection. Excellent TCR tracking of the
resistors maintains gain accuracy and common-mode
rejection over temperature. They operate over a wide
supply range, ±2.25V to ±18V (+4.5V to +36V single
supply), and input common-mode voltage range extends
beyond the positive and negative supply rails.
INA133
INA2133
High-Speed, Precision
DIFFERENCE AMPLIFIERS
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
The differential amplifier is the foundation of many
commonly used circuits. The low cost INA133 and
INA2133 provide this precision circuit function without
using an expensive precision network.
The single version, INA133, package is the SO-8 surface
mount. The dual version, INA2133, package is the SO-14
surface mount. Both are specified for operation over the
extended industrial temperature range, –40°C to +85°C.
Operation is from –55°C to +125°C.
25kΩ25kΩ
Sense
INA133
Output
V+
Ref
–In
+In
5
6
1
2
7
V–
4
3
25kΩ25kΩ
Sense A
INA2133
Out A
V+
Ref A
–In A
+In A
12
13
14
2
11
V–
4
3
25kΩ25kΩ
25kΩ25kΩ
25kΩ25kΩ
25kΩ25kΩ
B
A
Sense B
Out B
Ref B
–In B
+In B
10
9
8
6
5
INA133
INA2133
For most current data sheet and other product
information, visit www.burr-brown.com
SBOS115
2
®
INA133, INA2133
INA133U INA133UA
INA2133U INA2133UA
SPECIFICATIONS: VS = ±15V
At TA = +25°C, VS = ±15V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
OFFSET VOLTAGE(1) RTO
Initial(1) VCM = 0V ±150 ±450 ✻±900 µV
vs Temperature TA = –40°C to +85°C±2±5 See Typical Curve µV/°C
vs Power Supply VS = ±2.25V to ±18V ±10 ±30 900 ±50 µV/V
vs Time 0.3 ✻µV/√mo
Channel Separation (dual) dc 120 ✻dB
INPUT IMPEDANCE(2)
Differential 50 ✻kΩ
Common-Mode VCM = 0V 25 ✻kΩ
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
Positive VO = 0V
2(V+) –3 2(V+) –2
✻✻ V
Negative VO = 0V
2(V–) +3 2(V–) +2
✻✻ V
Common-Mode Rejection Ratio
VCM = –27V to +27V, RS = 0Ω
80 90 74 ✻dB
OUTPUT VOLTAGE NOISE(3) RTO
f = 0.1Hz to 10Hz 2 ✻µVp-p
f = 10Hz 80 ✻nV/√Hz
f = 100Hz 60 ✻nV/√Hz
f = 1kHz 57 ✻nV/√Hz
GAIN
Initial 1✻V/V
Error VO = –14V to +13.5V ±0.02 ±0.05 ✻±0.1 %
vs Temperature TA = –40°C to +85°C±1±10 ✻✻ppm/°C
Nonlinearity VO = –14V to +13.5V ±0.0001 ±0.001 ✻±0.002 % of FS
OUTPUT
Voltage Output Gain Error < 0.1%
Positive RL = 10kΩ to Ground (V+) –1.5 (V+)–1.3 ✻✻ V
Negative RL = 10kΩ to Ground (V–) +1 (V–)+0.8 ✻✻ V
Positive RL = 100kΩ to Ground (V+)–0.8 ✻V
Negative RL = 100kΩ to Ground (V–)+0.3 ✻V
Current Limit,
Continuous-to-Common
–25/+32 ✻mA
Capacitive Load (stable operation) 1000 ✻pF
FREQUENCY RESPONSE
Small-Signal Bandwidth –3dB 1.5 ✻MHz
Slew Rate 5✻V/µs
Settling Time: 0.1% 10V Step, CL = 100pF 4 ✻µs
0.01% 10V Step, CL = 100pF 5.5 ✻µs
Overload Recovery Time 50% Overdrive 4 ✻µs
POWER SUPPLY
Rated Voltage ±15 ✻V
Operating Voltage Range
Dual Supplies ±2.25 ±18 ✻✻V
Single Supply +4.5 +36 ✻✻V
Quiescent Current (per amplifier) IO = 0 ±0.95 ±1.2 ✻✻mA
TEMPERATURE RANGE
Specification –40 +85 ✻✻°C
Operation –55 +125 ✻✻°C
Storage –55 +125 ✻✻°C
Thermal Resistance
θ
JA
SO-8 Surface Mount 150 ✻°C/W
SO-14 Surface Mount 100 ✻°C/W
✻ Specifications the same as INA133U, INA2133U.
NOTES: (1) Includes the effects of amplifier’s input bias and offset currents. (2) 25kΩ resistors are ratio matched but have ±20% absolute value. (3) Includes effects
of amplifier’s input current noise and thermal noise contribution of resistor network.
3
®
INA133, INA2133
INA133U INA133UA
INA2133U INA2133UA
SPECIFICATIONS: VS = ±5V
At TA = +25°C, VS = ±5V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted.
Supply Voltage, V+ to V–.................................................................... 36V
Input Voltage Range........................................................................ 2 • VS
Output Short-Circuit (to ground)(2) .......................................... Continuous
Operating Temperature ..................................................–55°C to +125°C
Storage Temperature .....................................................–55°C to +125°C
Junction Temperature.................................................................... +150°C
Lead Temperature (soldering, 10s)............................................... +300°C
NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. (2) One channel per package.
ABSOLUTE MAXIMUM RATINGS(1) ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap-
propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE SPECIFIED
DRAWING TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE NUMBER(1) RANGE MARKING NUMBER(2) MEDIA
Single
INA133U SO-8 Surface Mount 182 –40°C to +85°C INA133U INA133U Rails
"""""INA133U/2K5 Tape and Reel
INA133UA SO-8 Surface Mount 182 –40°C to +85°C INA133UA INA133UA Rails
"""""INA133UA/2K5 Tape and Reel
Dual
INA2133U SO-14 Surface Mount 235 –40°C to +85°C INA2133U INA2133U Rails
"""""INA2133U/2K5 Tape and Reel
INA2133UA SO-14 Surface Mount 235 –40°C to +85°C INA2133UA INA2133UA Rails
"""""INA2133UA/2K5 Tape and Reel
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash ( /) are
available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “INA133UA/2K5” will get a single
2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
OFFSET VOLTAGE(1) RTO
Initial(1) VCM = 0V ±300 ±750 ✻±1500 µV
vs Temperature ±2✻µV/°C
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
Positive VO = 0V
2(V+) –3 2(V+) – 2
✻✻ V
Negative VO = 0V
2(V–) +3 2(V–) +2
✻✻ V
Common-Mode Rejection Ratio
VCM = –7V to +7V, RS = 0Ω
80 90 74 ✻dB
GAIN
Initial 1✻V/V
Gain Error VO = –4V to 3.5V ±0.02 ±0.05 ✻±0.1 %
Nonlinearity VO = –4V to 3.5V ±0.0001 ±0.001 ✻±0.002 % of FS
OUTPUT
Voltage Output Gain Error < 0.1%
Positive RL = 10kΩ to Ground (V+) –1.5 (V+) –1.3 ✻✻ V
Negative RL = 10kΩ to Ground (V–) +1 (V–) +0.8 ✻✻ V
Positive RL = 100kΩ to Ground (V+) –0.8 ✻V
Negative RL = 100kΩ to Ground (V–) +0.3 ✻V
POWER SUPPLY
Rated Voltage ±15 ✻V
Operating Voltage Range
Dual Supplies ±2.25 ±18 ✻✻V
Single Supply +4.5 +36 ✻✻V
Quiescent Current (per amplifier) IO = 0 ±0.92 ±1.2 ✻✻mA
✻ Specifications the same as INA133U, INA2133U.
NOTES: (1) Includes the effects of amplifier’s input bias and offset currents.
4
®
INA133, INA2133
PIN CONFIGURATIONS
Top View SO-8 Top View SO-14
Ref
–In
+In
V–
NC
V+
Output
Sense
NC = No Connection
INA133
1
2
3
4
8
7
6
5
NC
–In A
+In A
V–
+In B
–In B
NC
Ref A
Out A
Sense A
V+
Sense B
Out B
Ref B
NC = No Connection
1
2
3
4
5
6
7
14
13
12
11
10
9
8
A
B
INA2133
5
®
INA133, INA2133
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted.
GAIN vs FREQUENCY
Frequency (Hz)
Closed-Loop Gain (dB)
10k 1M100k 10M
10
0
–10
–20
–30
–40
–50 V
S
= ±15V or ±5V
+125°C
+25°C
–55°C
COMMON-MODE REJECTION vs FREQUENCY
Frequency (Hz)
Common-Mode Rejection (dB)
100 100k1k 10k 1M
100
90
80
70
60
50
40 V
S
= ±15V or ±5V
POWER SUPPLY REJECTION vs FREQUENCY
Frequency (Hz)
Power Supply Rejection (dB)
1 100 1k 10k10 100k
120
100
80
60
40
20
–PSRR
+PSRR
CHANNEL SEPARATION vs FREQUENCY
Channel Separation (dB)
Frequency (Hz)
130
120
110
100
90100 1k 10k 100k
INA2133
INPUT COMMON-MODE VOLTAGE
vs OUTPUT VOLTAGE
Output Voltage (V)
Common-Mode Voltage (V)
–15 0 5 10–5–10 15
40
30
20
10
0
–10
–20
–30
–40
V
S
= ±5V
V
S
= ±15V
TOTAL HARMONIC DISTORTION+NOISE
vs FREQUENCY
Frequency (Hz)
THD+N (%)
20 1k 10k100 20k
0.1
0.01
0.001
500kHz Filter
6
®
INA133, INA2133
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted.
VOLTAGE NOISE DENSITY vs FREQUENCY
Frequency (Hz)
Voltage Noise (nV/√Hz)
1 10010 10k1k
1000
100
10
QUIESCENT CURRENT vs TEMPERATURE
Temperature (°C)
Quiescent Current (µA)
–75 –50 –25 25 50 75 1000 125
1400
1300
1200
1100
1000
900
800
700
Per Amplifier
SLEW RATE vs TEMPERATURE
Temperature (°C)
Slew Rate (V/µs)
–75 –50 –25 25 50 75 1000 125
7
6
5
4
3
–SR
+SR
V
S
= ±15V
V
S
= ±5V
SHORT-CIRCUIT CURRENT vs TEMPERATURE
Temperature (°C)
Short-Circuit |mA|
–75 –50 –25 25 50 75 1000 125
40
35
30
25
20
15
+I
SC
+I
SC
–I
SC
–I
SC
V
S
= ±15V
V
S
= ±5V
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
Output Current (mA)
Output Voltage (V)
0±5±10 ±20 ±25 ±30±15 ±35
–40°C
85°C
85°C
25°C
–40°C
(V+)
(V+) –5
(V+) –10
0
(V–) +10
(V–) +5
V–
25°C
0.1Hz TO 10Hz PEAK-TO-PEAK
VOLTAGE NOISE
500µs/div
1µV/div
7
®
INA133, INA2133
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
V
S
= ±15V
Percent of Units (%)
Offset Voltage (µV)
35
30
25
20
15
10
5
0
–900
–800
–700
–600
–500
–400
–300
–200
–100
0
100
200
300
400
500
600
700
800
900
Typical production
distribution of
packaged units.
Singles and duals
included.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
V
S
= ±5V
Percent of Units (%)
Offset Voltage (µV)
30
25
20
15
10
5
0
–1400
–1200
–1000
–800
–600
–400
–200
0
200
400
600
800
1000
1200
1400
Typical production
distribution of
packaged units.
Singles and duals
included.
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
V
S
= ±15V
Percent of Units (%)
Offset Voltage Drift (µV/°C)
50
45
40
35
30
25
20
15
10
5
0
012345678910
Typical production
distribution of
packaged units.
Singles and duals
included.
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
V
S
= ±5V
Percent of Units (%)
Offset Voltage Drift (µV/°C)
60
50
40
30
20
10
0
012345678910
Typical production
distribution of
packaged units.
Singles and duals
included.
SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE
Overshoot (%)
Load Capacitance (pF)
60
50
40
30
20
10
0100 1k 10k 100k
V
S
= ±5V
V
S
= ±15V
+Overshoot
–Overshoot
–Overshoot
+Overshoot
SETTLING TIME vs LOAD CAPACITANCE
Capacitive Load (pF)
Settling Time (µs)
100 1k 10k
14
12
10
8
6
4
2
0
V
S
= ±15V
V
S
= ±5V
10V Step
0.1%
0.01%
8
®
INA133, INA2133
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted.
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY
Frequency (Hz)
Peak-to-Peak Output Voltage (V)
10k 100k 1M
32
28
24
20
16
12
8
4
0
V
S
= ±15V
V
S
= ±5V
SMALL-SIGNAL STEP RESPONSE
2.5µs/div
100mV/div
CL = 100pF
CL = 1000pF
LARGE-SIGNAL STEP RESPONSE
2.5µs/div
2V/div
CL = 1000pF
9
®
INA133, INA2133
APPLICATIONS INFORMATION
The INA133 and INA2133 are high-speed difference ampli-
fiers suitable for a wide range of general purpose applica-
tions. Figure 1 shows the basic connections required for
operation of the INA133. Decoupling capacitors are strongly
recommended in applications with noisy or high impedance
power supplies. The capacitors should be placed close to the
device pins as shown in Figure 1. All circuitry is completely
independent in the dual version assuring lowest crosstalk
and normal behavior when one amplifier is overdriven or
short-circuited.
As shown in Figure 1, the differential input signal is con-
nected to pins 2 and 3. The source impedances connected to
the inputs must be nearly equal to assure good common-
mode rejection. A 5Ω mismatch in source impedance will
degrade the common-mode rejection of a typical device to
approximately 80dB (a 10Ω mismatch degrades CMR to
74dB). If the source has a known impedance mismatch, an
additional resistor in series with the opposite input can be
used to preserve good common-mode rejection.
The INA133’s internal resistors are accurately ratio trimmed
to match. That is, R1 is trimmed to match R2 and R3 is
trimmed to match R4. However, the absolute values may not
be equal (R1 + R2 may be slightly different than R3 + R4).
Thus, large series resistors on the input (greater than 250Ω),
even if well matched, will degrade common-mode rejection.
Circuit board layout constraints might suggest possible varia-
tions in connections of the internal resistors. For instance, it
appears that pins 1 and 3 could be interchanged. However,
because of the ratio trimming technique used (see paragraph
above) CMRR will be degraded. If pins 1 and 3 are inter-
changed, pins 2 and 5 must also be interchanged to maintain
proper ratio matching.
OPERATING VOLTAGE
The INA133 and INA2133 operate from single (+4.5V to
+36V) or dual (±2.25V to ±18V) supplies with excellent
performance. Specifications are production tested with ±5V
and ±15V supplies. Most behavior remains unchanged
throughout the full operating voltage range. Parameters which
vary significantly with operating voltage are shown in the
Typical Performance Curves.
INPUT VOLTAGE
The INA133 and INA2133 can accurately measure differen-
tial signals that are above and below the supply rails. Linear
common-mode range extends from 2 • (V+)–3V to 2 • (V–)
+3V (nearly twice the supplies). See the typical performance
curve, “Input Common-Mode Voltage vs Output Voltage.”
OFFSET VOLTAGE TRIM
The INA133 and INA2133 are laser trimmed for low offset
voltage and drift. Most applications require no external offset
adjustment. Figure 2 shows an optional circuit for trimming
the output offset voltage. The output is referred to the output
reference terminal (pin 1), which is normally grounded. A
voltage applied to the Ref terminal will be summed with the
output signal. This can be used to null offset voltage as
shown in Figure 2. The source impedance of a signal applied
to the Ref terminal should be less than 10Ω to maintain good
common-mode rejection.
V
3
5
6
1
3
INA133
V
OUT
= V
3
–
V
2
Gain Error = ±0.01%
CMR = 90dB
Nonlinearity = ±0.0001%
2
R
3
25kΩR
4
25kΩ
R
1
25kΩR
2
25kΩ
V
2
–In
+In
1µF
V–
4
1µF
V+
7
FIGURE 1. Precision Difference Amplifier (Basic Power
Supply and Signal Connections).
V
3
5
6
3
V
O
INA133
V
O
= V
3
–
V
2
Offset Adjustment
Range = ±1mV
2
R
3
R
1
R
2
R
4
V
2
10Ω
150kΩ
10Ω
100kΩ
+15V
–15V
1
FIGURE 2. Offset Adjustment.
10
®
INA133, INA2133
TYPICAL APPLICATIONS
5
6
1
3
INA133
2
V
1
V
O
A
2
A
1
R
2
R
2
R
1
–In
V
2
+In V
O
= (1 + 2R
2
/R
1
) (V
2
–V
1
)
FIGURE 3. Precision Instrumentation Amplifier.
SIMILAR COMPLETE
A
1
, A
2
FEATURE BURR-BROWN IA
OPA2227 Low Noise INA103
OPA129 Ultra Low Bias Current (fA) INA116
OPA2277 Low Offset Drift, Low Noise INA114, INA128
OPA2130 Low Power, FET-Input (pA) INA121
OPA2234 Single Supply, Precision, Low Power INA122, INA118
OPA2237 Single Supply, Low Power, MSOP-8 INA122, INA126
The INA133 can be combined with op amps to form a complete instrumenta-
tion amplifier with specialized performance characteristics. Burr-Brown offers
many complete high performance IAs. Products with related performances
are shown at the right in the table below.
100Ω
(1)
1%
V–
5
6
3
INA133
2
100Ω
(1)
1%
1
V
0
0 to 2V
I
IN
0 to 20mA
NOTE: (1) Input series resistors should be less than
250Ω (1% max mismatch) to maintain excellent CMR.
With 100Ω resistors, gain error is increased to 0.5%.
FIGURE 4. Current Receiver with Compliance to Rails.
5
6
2
V
O
= (V+)/2
INA133
V+
1
7
4
V+
CommonCommon
3
5
6V
O
= –V
2
INA133
Gain Error = 0.05% maximum
Nonlinearity = 0.001% maximum
Gain Drift = 1ppm/°C
2
V
2
13
FIGURE 5. Pseudoground Generator.
FIGURE 6. Precision Unity-Gain Inverting Amplifier.
11
®
INA133, INA2133
V
1
5
6
1
3
V
O
= 2 •
V
1
INA133
Gain Error = 0.025% maximum
Gain Drift = 2ppm/°C
2
V
3
5
6
3
2
INA133
1
V
O
=V
3
2
±0.05% max
(V
1
+ V
3
)
2
V
O
=
±0.05% max
V
1
5
6
1
3
2
INA133
V
3
V
O
= V
1
+ V
3
±0.05% max
V
1
5
6
1
3
INA133
2
V
3
5
6
1
3 Ref
2
Output
INA133
Voltage
Source
(1)
Device
VFC320
VFC100
DAC80
DAC703
XTR110
Output
0-10kHz
0-F
CLOCK
/2
0-FS (12 bits)
0-FS (16 bits)
4-20mA
Ref must be driven
by low impedance.
NOTE: (1) Unipolar Input Device.
OPA277
V
1
6
1
3
V
O
INA133
V
3
25
R
1
R
2
V
O
= 1 +
R
2
R
1
V
1
+
V
3
2
( )( )
For G = 10,
See INA143.
FIGURE 7. Precision Gain = 2 Amplifier. FIGURE 8. Precision Gain = 1/2 Amplifier.
FIGURE 9. Precision Average Value Amplifier.
FIGURE 10. Precision Summing Amplifier.
FIGURE 11. Precision Bipolar Offsetting. FIGURE 12. Precision Summing Amplifier with Gain.
12
®
INA133, INA2133
Shield
5
61
2
INA133
A
1
A
2
11
12
A
3
Output
G = 1 + 50kΩ
R
G
Feedback
3
Noise (60Hz hum)
Noise (60Hz hum)
Transducer or
Analog Signal
13 7
V+ V–
8 Ref10
25kΩ
25kΩ
25kΩ
25kΩ
INA115
1
25kΩ
25kΩ
4
2
3
14
15
5
R
G
100kΩ
V
1
12
13
A
3
14
1/2 INA2133
2
V
2
V
3
10
9
5
8
V
O
=
V
3
+
V
4
– V
1
– V
2
1/2 INA2133
6
V
4
B
FIGURE 13. Instrumentation Amplifier Guard Drive Generator.
FIGURE 14. Precision Summing Instrumentation Amplifier.
13
®
INA133, INA2133
FIGURE 15. Precision Voltage-to-Current Converter with
Differential Inputs.
5
6
3
INA133
2
1
V
1
V
2
Load
I
O
= (V
1
– V
2
) (1/25k + 1/R) I
O
R
R
5
6
3
INA133
2
1
V3
V2
Load
IO = (V3 – V2)/R
IO
R
OPA131
FIGURE 16. Differential Input Voltage-to-Current Con-
verter for Low IOUT.
5
6
3
INA133
2
1
V
3
V
2
Load I
O
R
R
Gate can be
+V
S
–5V
I
O
= (V
3
– V
2
) (1/25k + 1/R)
R < 200Ω
12
13
3
1/2 INA2133
2
V
01
14
10
9
5
1/2 INA2133
A
B
6
V
01
– V
02
= 2 (V
2
– V
1
)
V
02
8
V
2
V
1
5
6
3
INA133
2
1
V
3
V
2
Load I
O
R
Gate can be
+V
CC
–5V
I
O
= (V
3
– V
2
)
R
(R ≥ 200Ω)
FIGURE 17. Isolating Current Source.
FIGURE 18. Differential Output Difference Amplifier.
FIGURE 19. Isolating Current Source with Buffering Am-
plifier for Greater Accuracy.
14
®
INA133, INA2133
FIGURE 20. Differential Input Data Acquisition.
5
6
1
INA133
ADS7806
2
3
4
7
+5V
V
S
12 Bits
Out
0V-4V
Input
Transducer
or
Analog
Signal
–5V
Eliminates errors due to different grounds.
5
6
3
1
INA133
2
1
V
O
DG188
V
1
Logic
In
Logic In
0
1
V
O
–V
1
+V
1
V1
Input
5
6
3
1
V0 = |V1|
INA133
2
R4
R3
R1R2
OPA130
10pF
D1
D2
R5
2kΩ
FIGURE 21. Digitally Controlled Gain of ±1 Amplifier.
FIGURE 22. Precision Absolute Value Buffer.
15
®
INA133, INA2133
5
6
1
3
INA133
2
4
2+15V
6
–10V Out
+10V Out
REF102
5
7
6
3
V
3
INA133
2
4
V
2
1
4
2+15V OPA227
REF102 6
10V
I
O
= 4 to 20mA
0V to 10V
In
12.5kΩ1kΩ
50kΩ
R
LOAD
V+
Set R
1
= R
2
R
2
50.1Ω
R
1
50.1Ω
2N3904
25kΩ25kΩ
25kΩ25kΩ
For 4-20mA applications,
the REF102 sets the 4mA
low-scale output for 0V input.
I
O
= V
3
– V
2
+
1
25kΩ1
R
2
FIGURE 25. Precision Voltage-to-Current Conversion.
FIGURE 23. ±10V Precision Voltage Reference. FIGURE 24. High Output Current Precision Difference
Amplifier.
5
6
1
INA133
BUF634
2
3
VO
RL
–In
+In
BUF634 inside feedback
loop contributes no error.
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
INA133U ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA133U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA133U/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA133UA ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) Call TI Level-3-260C-168 HR
INA133UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA133UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA133UAE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) Call TI Level-3-260C-168 HR
INA133UE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA2133U ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA2133U/2K5E4 OBSOLETE SOIC D 14 TBD Call TI Call TI
INA2133UA ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA2133UA/2K5E4 OBSOLETE SOIC D 14 TBD Call TI Call TI
INA2133UAE4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA2133UAG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA2133UE4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA2133UG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 4-Sep-2009
Addendum-Page 1
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 4-Sep-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
INA133U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
INA133UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Sep-2009
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA133U/2K5 SOIC D 8 2500 346.0 346.0 29.0
INA133UA/2K5 SOIC D 8 2500 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Sep-2009
Pack Materials-Page 2
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