Order this document by MTP8N50E/D SEMICONDUCTOR TECHNICAL DATA N-Channel Enhancement-Mode Silicon Gate This high voltage MOSFET uses an advanced termination scheme to provide enhanced voltage-blocking capability without degrading performance over time. In addition, this advanced TMOS E-FET is designed to withstand high energy in the avalanche and commutation modes. This new energy efficient design also offers a drain-to-source diode with a fast recovery time. Designed for low voltage, high speed switching applications in power supplies, converters, PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. * Robust High Voltage Termination * Avalanche Energy Specified * Source-to-Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode * Diode is Characterized for Use in Bridge Circuits * IDSS and VDS(on) Specified at Elevated Temperature TMOS POWER FET 8.0 AMPERES 500 VOLTS RDS(on) = 0.8 OHM D G S CASE 221A-06, Style 5 TO-220AB MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Drain-to-Source Voltage Symbol Value Unit VDSS 500 Vdc Drain-to-Gate Voltage (RGS = 1.0 MW) VDGR 500 Vdc Gate-to-Source Voltage - Continuous Gate-to-Source Voltage - Non-repetitive (tp 10 ms) VGS VGSM 20 40 Vdc Vpk Drain Current -- Continuous @ TC = 25C Drain Current -- Continuous @ TC = 100C Drain Current -- Single Pulse (tp 10 ms) ID ID IDM 8.0 5.0 32 Adc Total Power Dissipation @ TC = 25C Derate above 25C PD 125 1.0 Watts W/C TJ, Tstg - 55 to 150 C EAS 510 mJ RqJC RqJA 1.0 62.5 C/W TL 260 C Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy - STARTING TJ = 25C (VDD = 25 Vdc, VGS = 10 Vdc, PEAK IL = 8.0 Apk, L = 16 mH, RG = 25 W) Thermal Resistance - Junction-to-Case - Junction-to-Ambient Maximum Lead Temperature for Soldering Purposes, 1/8 from Case for 5 sec. Apk This document contains information on a new product. Specifications and information herein are subject to change without notice. E-FET and Designer's are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. REV 2 TMOS Motorola Motorola, Inc. 1996 Power MOSFET Transistor Device Data 1 MTP8N50E ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted) Characteristic Symbol Min Typ Max Unit 500 -- -- 500 -- -- Vdc mV/C -- -- -- -- 250 1000 -- -- 100 2.0 -- 2.8 6.3 4.0 -- -- 0.6 0.8 -- -- 5.0 -- 7.2 6.4 4.0 -- -- Ciss -- 1450 1680 Coss -- 190 246 Crss -- 45.4 144 td(on) -- 15 50 tr -- 33 72 td(off) -- 40 150 tf -- 32 60 QT -- 40 64 Q1 -- 8.0 -- Q2 -- 17 -- Q3 -- 17.3 -- OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 Adc) Temperature Coefficient (Positive) V(BR)DSS Zero Gate Voltage Drain Current (VDS = 500 Vdc, VGS = 0 Vdc) (VDS = 400 Vdc, VGS = 0 Vdc, TJ = 125C) IDSS Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0 Vdc) IGSS mAdc nAdc ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = VGS, ID = 250 Adc) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain-to-Source On-Resistance (VGS = 10 Vdc, ID = 4.0 Adc) RDS(on) Drain-to-Source On-Voltage (VGS = 10 Vdc) (ID = 8.0 Adc) (ID = 4.0 Adc, TJ = 125C) VDS(on) Forward Transconductance (VDS = 15 Vdc, ID = 4.0 Adc) Vdc mV/C Ohms Vdc gFS mhos DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance (VDS = 25 Vdc, Vdc VGS = 0 Vdc, Vdc f = 1.0 MHz) Transfer Capacitance pF SWITCHING CHARACTERISTICS (2) Turn-On Delay Time Rise Time (Rgo + C17n C1 = 9.1 9 1 W) Turn-Off Delay Time Fall Time Gate Charge (see Figure 8) ((VDS = 400 Vdc, Vd , ID = 8 8.0 0 Ad Adc,, VGS = 10 Vdc) ns nC SOURCE-DRAIN DIODE CHARACTERISTICS VSD Forward On-Voltage Vdc (IS = 8.0 Adc, VGS = 0 Vdc) -- 1.2 2.0 (IS = 8.0 Adc, VGS = 0 Vdc, TJ = 125C) -- 1.1 -- trr -- 320 -- ta -- 179 -- tb -- 141 -- QRR -- 3.0 -- -- 4.5 -- -- 7.5 -- Reverse Recovery Time ((IS = 8.0 8 0 Adc, Ad , VGS = 0 Vdc, Vd , dIS/dt = 100 A/ms) Reverse Recovery Stored Charge ns mC INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from the drain lead 0.25 from package to center of die) LD Internal Source Inductance (Measured from the source lead 0.25 from package to source bond pad) LS nH (1) Pulse Test: Pulse Width 300 ms, Duty Cycle 2.0%. (2) Switching characteristics are independent of operating junction temperature. 2 Motorola TMOS Power MOSFET Transistor Device Data MTP8N50E TYPICAL ELECTRICAL CHARACTERISTICS 16 16 VGS = 10 V 7V 12 6V 8.0 4.0 VDS 10 V 14 8V I D, DRAIN CURRENT (AMPS) I D, DRAIN CURRENT (AMPS) TJ = 25C 5V 12 10 8.0 100C 6.0 25C 4.0 TJ = -55C 2.0 0 2.0 0 12 2.0 4.0 6.0 8.0 10 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 0 14 2.5 1.6 1.4 VGS = 10 V TJ = 100C 1.2 1.0 0.8 25C 0.6 0.4 -55C 0.2 0 0 2.0 4.0 8.0 12 6.0 10 ID, DRAIN CURRENT (AMPS) 16 14 TJ = 25C 0.85 0.80 0.75 VGS = 10 V 0.70 15 V 0.65 0.60 0.55 0 4.0 6.0 8.0 10 14 12 16 Figure 4. On-Resistance versus Drain Current and Gate Voltage 100,000 VGS = 0 V VGS = 10 V ID = 8 A TJ = 125C 10,000 IDSS, LEAKAGE (nA) RDS(on) , DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 2.0 ID, DRAIN CURRENT (AMPS) 2.5 1.5 1.0 100C 1,000 25C 100 10 0.5 0 -50 7.0 0.90 Figure 3. On-Resistance versus Drain Current and Temperature 2.0 6.5 Figure 2. Transfer Characteristics R DS(on), DRAIN-TO-SOURCE RESISTANCE (OHMS) R DS(on), DRAIN-TO-SOURCE RESISTANCE (OHMS) Figure 1. On-Region Characteristics 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 1.0 -25 0 25 50 75 100 125 150 0 100 200 300 400 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current versus Voltage Motorola TMOS Power MOSFET Transistor Device Data 500 3 MTP8N50E TYPICAL ELECTRICAL CHARACTERISTICS 10,000 4000 3000 VGS = 0 V VGS = 0 V TJ = 25C Ciss C, CAPACITANCE (pF) C, CAPACITANCE (pF) VDS = 0 V 2000 Ciss Crss 1000 TJ = 25C Ciss 1,000 Coss 100 Coss Crss 0 -10 Crss -5.0 0 5.0 15 10 20 10 10 25 100 DRAIN-TO-SOURCE VOLTAGE (VOLTS) VGS VDS 1000 Figure 8. High Voltage Capacitance Variation GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) 12 1000 400 QT 10 V DS , DRAIN-TO-SOURCE VOLTAGE (VOLTS) TJ = 25C ID = 8 A VDD = 250 V VGS = 10 V 300 8.0 VGS Q1 6.0 Q2 200 4.0 TJ = 25C ID = 8 A 2.0 0 0 Q3 VDS 8.0 16 24 Qg, TOTAL GATE CHARGE (nC) 100 10 1.0 100 Figure 10. Resistive Switching Time Variation versus Gate Resistance 100 8.0 VGS = 20 V SINGLE PULSE TC = 25C TJ = 25C VGS = 0 V I D, DRAIN CURRENT (AMPS) I S , SOURCE CURRENT (AMPS) 10 RG, GATE RESISTANCE (OHMS) Figure 9. Gate-to-Source and Drain-to-Source Voltage versus Total Charge 6.0 4.0 2.0 10 10 ms 100 ms 1 ms 10 ms dc 1.0 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 0.01 0 0.5 4 td(off) tr tf td(on) 100 0 40 32 t, TIME (ns) V GS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 0.1 1.0 10 100 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 11. Diode Forward Voltage versus Current Figure 12. Maximum Rated Forward Biased Safe Operating Area 1000 Motorola TMOS Power MOSFET Transistor Device Data MTP8N50E EAS , SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 600 ID = 8 A 500 400 300 200 100 0 25 75 125 50 100 TJ, STARTING JUNCTION TEMPERATURE (C) 150 Figure 13. Maximum Avalanche Energy versus Starting Junction Temperature r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1.0 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 0.0001 0.00001 0.001 0.01 t, TIME (seconds) 0.1 1.0 10 Figure 14. Thermal Response Motorola TMOS Power MOSFET Transistor Device Data 5 MTP8N50E PACKAGE DIMENSIONS -T- B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. SEATING PLANE C F T S 4 A Q 1 2 3 STYLE 5: PIN 1. 2. 3. 4. U H K Z L R V J G D N GATE DRAIN SOURCE DRAIN DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 --- --- 0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 --- --- 2.04 CASE 221A-06 ISSUE Y Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. 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Box 5405, Denver, Colorado 80217. 303-675-2140 or 1-800-441-2447 JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 81-3-3521-8315 Mfax: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 INTERNET: http://Design-NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 6 MTP8N50E/D Motorola TMOS Power MOSFET Transistor Device Data