1. Product profile
1.1 General description
PNP low VCEsat Breakthrough In Small Signal (BISS) transistor, encapsulated in an ultra
thin SOT1061 leadless small Surface-Mounted Device (SMD) plastic package with
medium power capability.
NPN complement: PBSS4612PA.
1.2 Features and benefits
Low collector-emitter saturation voltage VCEsat
High collector current capability IC and ICM
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
Exposed heat sink for excellent thermal and electrical conductivity
Leadless small SMD plastic package with medium power capability
1.3 Applications
Loadswitch
Battery-driven devices
Power management
Charging circuits
Power switches (e.g. motors, fans)
1.4 Quick reference data
[1] Pulse test: tp300 μs; δ≤0.02.
PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
Rev. 01 — 7 May 2010 Product data sheet
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCEO collector-emitter voltage open base - - 12 V
ICcollector current - - 6A
ICM peak collector current single pulse;
tp1ms --7A
RCEsat collector-emitter
saturation resistance IC=6A;
IB=300 mA [1] -3350mΩ
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 2 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
2. Pinning information
3. Ordering information
4. Marking
5. Limiting values
Ta ble 2. Pinnin g
Pin Description Simplified outline Graphic symbol
1base
2emitter
3 collector
Transparent top view
12
3
sym01
3
3
2
1
Table 3. Ordering i nformation
Type number Package
Name Description Version
PBSS5612PA HUSON3 plastic thermal enhanced ultra thin small outline package;
no leads; three terminals; body 2 ×2×0.65 mm SOT1061
Table 4. Marking codes
Type number Marking code
PBSS5612PA A9
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VCBO collector-base voltage open emitter - 12 V
VCEO collector-emitter voltage open base - 12 V
VEBO emitter-base voltage open collector - 7V
ICcollector current - 6A
ICM peak collector current single pulse;
tp1ms -7A
IBbase current - 600 mA
Ptot total power dissipation Tamb 25 °C[1] -500mW
[2] -1W
[3] -1.4W
[4] -2.1W
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 3 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2.
[4] Device mounted on a ceramic PCB, Al2O3, standard footprint.
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2.
[4] Device mounted on a ceramic PCB, Al2O3, standard footprint.
Tjjunction temperature - 150 °C
Tamb ambient temperature 55 +150 °C
Tstg storage temperature 65 +150 °C
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 6 cm2
(3) FR4 PCB, mounting pad for collector 1 cm2
(4) FR4 PCB, standard footprint
Fig 1. Power derating curves
Table 5. Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Tamb (°C)
75 17512525 7525
006aab978
1.0
1.5
0.5
2.0
2.5
Ptot
(W)
0.0
(1)
(3)
(2)
(4)
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-a) thermal resistance from
junction to ambient in free air [1] --250K/W
[2] --125K/W
[3] --90K/W
[4] --60K/W
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 4 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
FR4 PCB, standard footprint
Fig 2. Transient thermal impe da n ce from ju nc tio n to ambient as a function of pulse duration; typical values
FR4 PCB, mounting pad for collector 1 cm2
Fig 3. Transient thermal impe da n ce from ju nc tio n to ambient as a function of pulse duration; typical values
006aab979
10
1
102
103
Zth(j-a)
(K/W)
101
10510102
104102
101
tp (s)
103103
1
0
duty cycle = 1
0.01
0.02
0.05
0.1
0.2
0.33
0.5
0.75
006aab980
10
1
102
103
Zth(j-a)
(K/W)
101
10510102
104102
101
tp (s)
103103
1
0
duty cycle = 1
0.01
0.02
0.05
0.1
0.2
0.33
0.5
0.75
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 5 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
FR4 PCB, mounting pad for collector 6 cm2
Fig 4. Transient thermal impe da n ce from ju nc tio n to ambient as a function of pulse duration; typical values
Ceramic PCB, Al2O3, standard footprint
Fig 5. Transient thermal impe da n ce from ju nc tio n to ambient as a function of pulse duration; typical values
006aab981
10
1
102
103
Zth(j-a)
(K/W)
101
10510102
104102
101
tp (s)
103103
1
0
duty cycle = 1
0.01
0.02
0.05
0.1
0.2
0.33
0.5
0.75
006aab982
10510102
104102
101
tp (s)
103103
1
10
1
102
Zth(j-a)
(K/W)
101
0
duty cycle = 1
0.01
0.02
0.05
0.1
0.2
0.33
0.5
0.75
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 6 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
7. Characteristics
[1] Pulse test: tp300 μs; δ≤0.02.
Ta ble 7. Ch aracteristics
Tamb =25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
ICBO collector-base
cut-off current VCB =9.6 V; IE=0A - - 100 nA
VCB =9.6 V; IE=0A;
Tj= 150 °C--50 μA
ICES collector-emitter
cut-off current VCE =9.6 V; VBE =0V - - 100 nA
IEBO emitter-base
cut-off current VEB =5V; I
C=0A - - 100 nA
hFE DC current gain VCE =2V [1]
IC=0.5 A 220 335 -
IC=1 A 200 320 -
IC=2 A 190 285 -
IC=6 A 130 190 -
VCEsat collector-emitter
saturation voltage IC=0.5 A; IB=50 mA [1] -20 35 mV
IC=1A; I
B=50 mA [1] -40 60 mV
IC=1A; I
B=10 mA [1] -60 90 mV
IC=2A; I
B=20 mA [1] -95 150 mV
IC=3A; I
B=30 mA [1] -135 200 mV
IC=4A; I
B=400 mA [1] -130 200 mV
IC=6A; I
B=300 mA [1] -200 300 mV
RCEsat collector-emitter
saturation resistance IC=6A; I
B=300 mA [1] - 3350mΩ
VBEsat base-emitter
saturation voltage IC=1A; I
B=10 mA [1] -0.75 0.9 V
IC=6A; I
B=300 mA [1] -0.95 1.1 V
VBEon base-emitter
turn-on voltage VCE =2V; I
C=2A [1] -0.74 0.9 V
tddelay time VCC =9V; I
C=2A;
IBon =0.1 A;
IBoff =0.1A
-23-ns
trrise time - 61 - ns
ton turn-on time - 84 - ns
tsstorage time - 185 - ns
tffall time - 60 - ns
toff turn-off time - 245 - ns
fTtransition frequency VCE =10 V;
IC=100 mA;
f=100MHz
40 60 - MHz
Cccollector capacitance VCB =10 V;
IE=i
e=0A; f=1MHz - 140 175 pF
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 7 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
VCE =2V
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =55 °C
Tamb =25°C
Fig 6. DC current gain as a function of collector
current; typical values Fig 7. Collector current as a fun ction of
collector-emitter voltage; typical values
VCE =2V
(1) Tamb =55 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
IC/IB=20
(1) Tamb =55 °C
(2) Tamb =25°C
(3) Tamb = 100 °C
Fig 8. Base-emitter voltage as a function of collector
current; typical values Fig 9. Base-emitter saturation voltage as a function
of collector current; typica l values
006aac096
200
400
600
hFE
0
IC (mA)
101104
103
1102
10
(2)
(1)
(3)
VCE (V)
0.0 5.04.02.0 3.01.0
006aac097
4
2
6
8
IC
(A)
0
IB (mA) = 40
4
8
32
36
28
24
20
16
12
006aac098
0.4
0.8
1.2
VBE
(V)
0.0
IC (mA)
101104
103
1102
10
(2)
(1)
(3)
006aac099
0.4
0.8
1.2
VBEsat
(V)
0.0
IC (mA)
101104
103
1102
10
(2)
(1)
(3)
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 8 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =55 °C
Tamb =25°C
(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10
Fig 10. C ol le cto r -emitter saturation voltage as a
function of collector current; typical values Fig 11. Collector-emitter sa turation voltage as a
function of collector current; typical values
IC/IB=20
(1) Tamb = 100 °C
(2) Tamb =25°C
(3) Tamb =55 °C
Tamb =25°C
(1) IC/IB= 100
(2) IC/IB=50
(3) IC/IB=10
Fig 12. Collector-emitter saturation resistance as a
function of collector current; typical values Fig 13. Collector-emitter saturation resistance as a
function of collector current; typical values
006aac100
101
102
1
VCEsat
(V)
103
IC (mA)
101104
103
1102
10
(2)
(1)
(3)
006aac101
101
102
1
VCEsat
(V)
103
IC (mA)
101104
103
1102
10
(2)
(1)
(3)
IC (mA)
101104
103
1102
10
006aac102
1
101
102
10
103
RCEsat
(Ω)
102
(2)
(1)
(3)
IC (mA)
101104
103
1102
10
006aac103
1
101
102
10
103
RCEsat
(Ω)
102
(2)
(1)
(3)
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 9 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
8. Test information
Fig 14. BISS transistor switching time definition
VCC =9V; I
C=2A; I
Bon =0.1 A; IBoff =0.1A
Fig 15. Test circu it for swi t ch ing times
006aaa266
IBon (100 %)
IB
input pulse
(idealized waveform)
IBoff
90 %
10 %
IC (100 %)
IC
td
ton
90 %
10 %
tr
output pulse
(idealized waveform)
tf
t
ts
toff
RC
R2
R1
DUT
mgd624
Vo
RB
(probe)
450 Ω
(probe)
450 Ω
oscilloscope oscilloscope
VBB
VI
VCC
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 10 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
9. Package outline
10. Packing information
[1] For further information and the availability of packing methods, see Section 14.
Fig 16. Package outline SOT1061 (HUSON3)
09-11-12Dimensions in mm
0.65
max
2.1
1.9
1.6
1.4
0.35
0.25
0.45
0.35
2.1
1.9
1.1
0.9
0.3
0.2
1.05
0.95
1.3
2
3
1
Table 8. Packing methods
The indicated -xxx are the last thre e digits of the 12NC ordering code.[1]
Type number Package Description Packing quantity
3000
PBSS5612PA SOT1061 4 mm pitch, 8 mm tape and reel -115
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 11 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
11. Soldering
Reflow soldering is the only recommended soldering method.
Fig 17. Reflow soldering footprint SOT1061 (HUSON3)
occupied area
solder paste = solder lands Dimensions in mm
sot1061_fr
solder resist
0.4
2.1
1.3
0.25
0.25 0.25
1.1 1.2
0.55
0.6
2.3
0.5 (2×)
0.5 (2×) 0.6 (2×)
0.4 (2×)
0.5
1.6
1.7
1.05
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 12 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
12. Revision history
Table 9. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PBSS5612PA v.1 20100507 Product data sheet - -
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 13 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
13. Legal information
13.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
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use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semicond uctors sales
office. In case of any inconsistency or conflict wit h the short data sheet, th e
full data sheet shall pre va il.
Product specificat io nThe information and data provided in a Product
data sheet shall define the specification of the product as agr eed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
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Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applicati ons or customer product
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NXP Semiconductors does not accept any liability related to any default,
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customer’s applications or products, or the application or use by customer’s
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testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
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products are sold subject to the general terms and conditions of commercial
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Export control — This document as well as the item(s) described herein
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Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
PBSS5612PA All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 01 — 7 May 2010 14 of 15
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
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in accordance with automotive testing or application requirements. NXP
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In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standards, custome r
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
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liability, damages or failed product cl aims resulting f rom customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specificat ions.
13.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to : salesaddresses@nxp.com
NXP Semiconductors PBSS5612PA
12 V, 6 A PNP low VCEsat (BISS) transistor
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 7 May 201 0
Document identifier: PBSS5612PA
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
15. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Thermal characteristics . . . . . . . . . . . . . . . . . . 3
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 9
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
10 Packing information . . . . . . . . . . . . . . . . . . . . 10
11 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
12 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
13 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
13.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
13.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
13.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
14 Contact information. . . . . . . . . . . . . . . . . . . . . 14
15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15