© 2009 Microchip Technology Inc. DS41341E-page 297
PIC16F72X/PIC16LF72X
Special Function Registers .................................................20
Special Function Registers (SFRs).....................................24
SPI Mode ..........................................................................173
Associ a te d Re gisters........ ..................... ...................176
Typical Master/Slave Connection .............................167
SSP...................................................................................167
I2C Mode...................................................................177
Acknowledge ....................................................178
Addressing........................................................179
Clock Stretching................................................184
Clock Synchronization ......................................185
Firmware Master Mode.....................................184
Hardware Setup.............. ............... ...................177
Multi-Master Mode............................................184
Reception..........................................................180
Sleep Operation. ...............................................185
Start/Stop Conditions. .......................................178
Transmission ....................................................182
Master Mode.............................................................169
SPI Mode..................................................................167
Slave Mode.......................................................171
Typical SPI Master/Slave Connection.......................167
SSPADD Regist e r........... ..................... .............. .................25
SSPBUF Register...............................................................24
SSPCON Register ..............................................24, 174, 186
SSPEN bit........................................................ .........174, 186
SSPM bits .................................................................174, 186
SSPMSK Register................... ..................... ..................... ..25
SSPOV bit.................................................................174, 186
SSPSTAT Register .............................................25, 175, 187
STATUS Regi ster ............... ..................... ..................... ......27
Synchronous Serial Port Enable bit (SSPEN). ..........174, 186
Synchronous Serial Port Mode Select bits (SSPM)..174, 186
T
T1CON Regis te r ........... ..................... ..................... ....24, 124
TMR1ON Bit..............................................................125
T1GCON Register.............................................................125
T2CON Register .................................... .... .... .. ...24, 128, 176
Thermal Considerations....................................................220
Time-out Sequence........................................ .... ......... .... ....38
Timer0...............................................................................111
Associ a te d Re gisters........ ..................... ...................113
Interrupt.....................................................................113
Operation..........................................................111, 116
Specifications............................................................229
Timer1...............................................................................115
Associ a te d registers................................... ...............126
Asynchronous Counter Mode ...................................117
Reading and Writing ....... ....... .. .. .. .. .. .. .. ....... .. .. ..117
Interrupt.....................................................................120
Modes of Operation ....................... .. .... .... .. ......... .... ..116
Module On/Off (TMR1ON Bit)...................................125
Operation During Sleep ............................................120
Oscillator...................................................................117
Prescaler...................................................................117
Specifications............................................................229
Timer1 Gate
Selectin g So u rce............. ............... ...................118
TMR1H Register.......................................................115
TMR1L Register........................................................115
Timer2
Associ a te d registers................................... ...............128
Timers
Timer1
T1CON..............................................................124
T1GCON........................................................... 125
Timer2
T2CON ............................................................. 128
Timing Diagrams
A/D Conver sion ............ ............... ..................... ........ 231
A/D Conversion (Sleep Mode).................................. 232
Asynchronous Receptio n.. ........................................ 152
Asynchronous Tran smis sion .................................... 148
Asynchronous Tra nsmis sion (Back -to-B ack )............ 148
Brown-o u t Re set (BOR)................... ............... .......... 227
Brown-out Reset Situations........................................ 37
CLKOUT and I/O...................................................... 225
Cloc k Synch ro n i zati o n........ ...... ...... ...... . ...... ...... ...... . 18 5
Cloc k Timi n g.. .. ...... ...... ..... ...... ...... ...... ..... ...... ...... ..... 222
Enhanced Capture/Compare/PWM (ECCP)............. 230
I2C Bus Da t a...... ...... ...... ..... ...... .. ...... ..... ...... ...... ...... . 237
I2C Bus Start/Stop Bits............................................. 236
I2C Reception (7-bit Address)................................... 180
I2C Slave Mode with SEN = 0 (Reception,
10-bit Address)................................................. 181
I2C Tra n sm issio n (7-bi t Ad d re ss) ... .. .. ..... ...... ...... ..... 182
INT Pi n In t e r ru p t ...... ...... ..... ...... ...... ...... ..... ...... ...... .. ... 4 4
Reset, WDT, OST and Power-up Timer................... 226
Slave Select Synchron i zation.............. ............... ...... 173
SPI Master Mode...................................................... 170
SPI Mast e r Mode (CKE = 1, SMP = 1)..................... 234
SPI Mode (Slave Mode with CKE = 0)...................... 172
SPI Mode (Slave Mode with CKE = 1)...................... 172
SPI Slave Mode (CKE = 0)....................................... 235
SPI Slave Mode (CKE = 1)....................................... 235
Synchronous Reception (Master Mode, SREN)....... 162
Synchronous Transmission ..... ............ ..................... 160
Synchronous Transmiss ion (Through TXEN)........... 160
Time-out Sequence
Case 1. .. ...... ...... ...... ..... ...... ...... ..... .......... ...... ..... 39
Case 2. .. ...... ...... ...... ..... ...... ...... ..... .......... ...... ..... 39
Case 3. .. ...... ...... ...... ..... ...... ...... ..... .......... ...... ..... 39
Timer0 and Timer1 External Clock........................... 229
Timer1 Incrementing Edge....................................... 120
USART Synchronous Receive (Master/Slave)......... 233
USART Synchronous Transmission (Master/Slave). 232
Wake-up from Interrupt............................................. 194
Timing Parameter Symbology .......................................... 221
Timing Requirements
I2C Bus Da t a...... ...... ...... ..... ...... .. ...... ..... ...... ...... ...... . 238
I2C Bus Start/Stop Bits........ .......................... ........... 237
SPI Mode.................................................................. 236
TMR0 Register.................................................................... 24
TMR1H Register................................................................. 24
TMR1L Register.................................................................. 24
TMR2 Register.................................................................... 24
TMRO Register................................................................... 26
TRISA................................................................................. 54
TRISA Register............................................................. 25, 54
TRISB................................................................................. 62
TRISB Register............................................................. 25, 63
TRISC................................................................................. 73
TRISC Regist e r......... .............. ............... ............... ........ 25, 73
TRISD................................................................................. 80
TRISD Regist e r......... .............. ............... ............... ........ 25, 81
TRISE................................................................................. 84
TRISE Register............................................................. 25, 85
TXREG ............................................................................. 147
TXREG Register................................................................. 24
TXSTA Reg ister........................... ............................... 25, 154