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DATA SH EET
Product specification
Supersedes data of 1998 Jan 30
File under Discrete Semiconductors, SC13b
1998 Feb 11
DISCRETE SEMICONDUCTORS
BSH103
N-channel enhancement mode
MOS transistor
a
ndbook, halfpage
M3D088
1998 Feb 11 2
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor BSH103
FEATURES
•Very low threshold
•High-speed switching
•No secondary breakdown
•Direct interface to C-MOS, TTL etc.
APPLICATIONS
•Power management
•DC to DC converters
•Battery powered applications
•‘Glue-logic’; interface between logic blocks and/or
periphery
•General purpose switch.
DESCRIPTION
N-channel enhancement mode MOS transistor in a SOT23
SMD package.
PINNING - SOT23
PIN SYMBOL DESCRIPTION
1 g gate
2 s source
3 d drain
Fig.1 Simplified outline and symbol.
handbook, halfpage
MAM273
21
3
Top view
s
d
g
QUICK REFERENCE DATA
SYMBOL PARAMETERS CONDITIONS MIN. MAX. UNIT
VDS drain-source voltage (DC) −30 V
VSD source-drain diode forward voltage VGD = 0; IS= 0.5 A −1V
V
GS gate-source voltage (DC) −±8V
V
GSth gate-source threshold voltage VDS =V
GS; ID= 1 mA 0.4 −V
IDdrain current (DC) Ts=80°C−0.85 A
RDSon drain-source on-state resistance VGS = 2.5 V; ID= 0.5 A −0.5 Ω
Ptot total power dissipation Ts=80°C−0.5 W
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
1998 Feb 11 3
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor BSH103
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Notes
1. Ts is the temperature at the soldering point of the drain lead.
2. Pulse width and duty cycle limited by maximum junction temperature.
3. Device mounted on printed-circuit board with an Rth a-tp (ambient to tie-point) of 27.5 K/W.
4. Device mounted on printed-circuit board with an Rth a-tp (ambient to tie-point) of 90 K/W.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDS drain-source voltage (DC) −30 V
VGS gate-source voltage (DC) −±8V
I
Ddrain current (DC) Ts=80°C; note 1 −0.85 A
IDM peak drain current note 2 −3.4 A
Ptot total power dissipation Ts=80°C−0.5 W
Tamb =25°C; note 3 −0.75 W
Tamb =25°C; note 4 −0.54 W
Tstg storage temperature −55 +150 °C
Tjoperating junction temperature −55 +150 °C
Source-drain diode
ISsource current (DC) Ts=80°C−0.5 A
ISM peak pulsed source current note 2 −2A
Fig.2 Power derating curve.
handbook, halfpage
0 40 80 160
0.6
0.2
0
0.4
MGM190
120
Ptot
(W)
Ts (°C)
Fig.3 SOAR.
δ= 0.01; Ts=80°C.
(1) RDSon limitation.
(2) Pulsed.
handbook, halfpage
MBK502
10
1
110
10−3
10−2
10−1
102
10−1VDS (V)
IDS
(A)
tpT
P
t
tp
T
δ=DC
(1)
(2)
1998 Feb 11 4
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor BSH103
THERMAL CHARACTERISTICS
SYMBOL PARAMETER VALUE UNIT
Rth j-s thermal resistance from junction to soldering point 140 K/W
Fig.4 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values.
handbook, full pagewidth
103
102
10
1
10−610−5 10−410−310−210−11
MBK503
Rth j-s
(K/W)
tp (s)
δ = 1
0.75
0.5
0.33
0.2
0.1
0.05
0.02
0.01
0
tp
tp
T
P
t
T
δ =
1998 Feb 11 5
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor BSH103
CHARACTERISTICS
Tj=25°C unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V(BR)DSS drain-source breakdown voltage VGS = 0; ID=10µA30−−V
V
GSth gate-source threshold voltage VGS =V
DS; ID= 1 mA 0.4 −−V
I
DSS drain-source leakage current VGS = 0; VDS =24V −− 100 nA
IGSS gate leakage current VGS =±8 V; VDS =0 −− ±100 nA
RDSon drain-source on-state resistance VGS = 4.5 V; ID= 0.5 A −− 0.4 Ω
VGS = 2.5 V; ID= 0.5 A −− 0.5 Ω
VGS = 1.8 V; ID= 0.25 A −− 0.6 Ω
Ciss input capacitance VGS = 0; VDS =24V; f=1MHz −83 −pF
Coss output capacitance VGS = 0; VDS =24V; f=1MHz −27 −pF
Crss reverse transfer capacitance VGS = 0; VDS =24V; f=1MHz −14 −pF
QGtotal gate charge VGS = 4.5 V; VDD =15V;
I
D= 0.5 A; Tamb =25°C−2100 −pC
QGS gate-source charge VDD = 15 V; ID= 0.5 A;
Tamb =25°C−95 −pC
QGD gate-drain charge VDD = 15 V; ID= 0.5 A;
Tamb =25°C−670 −pC
Switching times
td(on) turn-on delay time VGS = 0 to 8 V; VDD =15V;
I
D= 0.5 A; Rgen =6Ω−2.5 −ns
tffall time VGS = 0 to 8 V; VDD =15V;
I
D= 0.5 A; Rgen =6Ω−3.5 −ns
ton turn-on switching time VGS = 0 to 8 V; VDD =15V;
I
D= 0.5 A; Rgen =6Ω−6−ns
td(off) turn-off delay time VGS = 8 to 0 V; VDD =15V;
I
D= 0.5 A; Rgen =6Ω−20 −ns
trrise time VGS = 8 to 0 V; VDD =15V;
I
D= 0.5 A; Rgen =6Ω−7−ns
toff turn-off switching time VGS = 8 to 0 V; VDD =15V;
I
D= 0.5 A; Rgen =6Ω−27 −ns
Source-drain diode
VSD source-drain diode forward
voltage VGD = 0; IS= 0.5 A −− 1V
t
rr reverse recovery time IS= 0.5 A; di/dt = −100 A/µs−25 −ns
1998 Feb 11 6
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor BSH103
Fig.5 Switching times test circuit with input and output waveforms.
h
andbook, full pagewidth
MAM274
90 %
10 %
10 %
90 %
Vin
Vout
td(on)
ton toff
tftr
td(off)
0
0
VDD
RL
Vout
Vin
Fig.6 Gate-source and drain-source voltages as
functions of total gate charge; typical values.
VDD = 15 V; ID= 0.5 A; Tamb =25°C.
(1) VDS.
(2) VGS.
handbook, halfpage
QG (pC)
VGS
(V)
VDS
(V)
MBK507
(1) (2)
0
1
2
3
4
5
0
2
4
6
8
10
12
14
16
0
200
400
600
800
1000
1000
1600
1800
1800
2000
2200
Fig.7 Output characteristics; typical values.
Tamb =25°C; tp= 300 µs; δ=0.
(1) VGS = 7.5 V.
(2) VGS = 5.5 V.
(3) VGS = 4.5 V.
(4) VGS = 3.5 V.
(5) VGS =3V.
(6) VGS = 2.5 V.
(7) VGS =2V.
(8) VGS = 1.5 V.
(9) VGS =1V.
handbook, halfpage
0
4
3
2
1
0210
MBK505
468
V
DS (V)
ID
(A)
(1)(2) (3)(4)
(9)
(8)
(5)
(6)
(7)
1998 Feb 11 7
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor BSH103
Fig.8 Transfer characteristic; typical values.
VDS = 10 V; Tamb =25°C; tp= 300 µs; δ=0.
handbook, halfpage
0
4
3
2
1
03
MBK506
12
V
GS (V)
ID
(A)
Fig.9 Capacitance as a function of drain-source
voltage; typical values.
VGS = 0 ; f = 1 MHz; Tamb =25°C.
handbook, halfpage
0
300
200
100
030
MBK504
10 20
C
(pF)
VDS (V)
Ciss
Coss
Crss
Fig.10 Source current as a function of source-drain
diode forward voltage; typical values.
VGD =0.
(1) Tamb = 150 °C.
(2) Tamb =25°C.
(3) Tamb =−65 °C.
handbook, halfpage
0 0.4 1.2
2
0
0.4
1.6
1.2
0.8
MBK508
0.8 VSD (V)
IS
(A)
(2) (3)(1)
Fig.11 Drain-source on-state resistance as a function
of gate-source voltage; typical values.
Tamb =25°C; tp= 300 µs; δ=0.
(1) ID= 0.1 A.
(2) ID= 0.22 A.
(3) ID= 0.45 A.
(4) ID= 0.9 A.
(5) ID= 1.8 A.
(6) ID= 3.6 A.
handbook, halfpage
10
10−1
1
106240
MBK509
8
(5)
(4)(3)(2)(1)
RDSon
(Ω)
VGS (V)
(6)
1998 Feb 11 8
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor BSH103
Fig.12 Temperature coefficient of gate-source
threshold voltage as a function of junction
temperature; typical values.
.k VGSth at Tj
VGSth at 25°C
--------------------------------------
= VGSth at VDS =V
GS; ID= 1 mA.
handbook, halfpage
−65 185
0
0.4
MBK510
0.8
1.2
−15 35 85 135Tj (°C)
k
Fig.13 Temperature coefficient of drain-source
on-resistance as a function of junction
temperature; typical values.
.k RDSon at Tj
RDSon at 25 °C
-----------------------------------------
=(1) RDSon at VGS = 4.5 V; ID= 0.5 mA.
(2) RDSon at VGS = 2.5 V; ID= 0.5 mA.
handbook, halfpage
−65 185
0
0.8
MBK511
0.4
1.2
1.6
−15 35 85 135Tj (°C)
k(2)
(1)
1998 Feb 11 9
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor BSH103
PACKAGE OUTLINE
UNIT A1
max. bpcDE e1HELpQwv
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
97-02-28
IEC JEDEC EIAJ
mm 0.1 0.48
0.38 0.15
0.09 3.0
2.8 1.4
1.2 0.95
e
1.9 2.5
2.1 0.55
0.45 0.1
0.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
SOT23
bp
D
e1
e
A
A1
Lp
Q
detail X
HE
E
wM
vMA
B
AB
0 1 2 mm
scale
A
1.1
0.9
c
X
12
3
Plastic surface mounted package; 3 leads SOT23
1998 Feb 11 10
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor BSH103
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
Data Sheet Status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
1998 Feb 11 11
Philips Semiconductors Product specification
N-channel enhancement mode
MOS transistor BSH103
NOTES
Internet: http://www.semiconductors.philips.com
Philips Semiconductors – a worldwide company
© Philips Electronics N.V. 1998 SCA57
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
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Printed in The Netherlands 135108/00/04/pp12 Date of release: 1998 Feb 11 Document order number: 9397 750 03303
