
©2001 Fairch ild Semicond uctor C orpo ration HGTG20N60C3D Rev. B
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge built
in the handler’s body capaci t ance is not discharged through
the device. With proper handl i n g and application procedures,
how ever, IGBTs are currently being extensiv ely us ed in
production by numerous equipment manufacturers in military,
industrial and consumer applica tions, with virtually no damage
problems due to electrostatic discharge. IGBTs can be
handled safely if the foll owing basic precautions are taken:
1. Prior to assem b ly int o a circui t, all l eads s hould be k ept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD™ LD26” or e quivalent.
2. When de vice s are remov ed by hand from thei r carriers,
the hand being u sed shoul d be grou nded b y any suitab le
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. De vices sho uld n e v er b e ins erted into or remo v e d from
circuits with power on.
5. Gate Voltage Rating - Ne v er e xceed the gate- vol tage
rat ing of VGEM. Exceeding the ra ted VGE can result in
permanent damage to the oxide la yer in the gate regio n.
6. Gate Terminatio n - The gates of these de vi ces are
essentially capacitors. Circuits that leave the gate
open-circuited or floating should be avoided. These
conditions can result in turn-on of the device due to
v oltage buil dup on the input ca pac ito r due to leak age
currents or pickup.
7. Gate Protection - The se de vices do no t hav e an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
Operating Frequency Information
Op erating frequen cy in formation f or a typ ic al device
(Figure 3) is presented as a gui de for estimating device
performance for a specific application. Other typical
frequency vs collector current (ICE) plots are possible using
the inf o rmation s hown f or a ty pical un it in Figure s 5, 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows fMAX1 or fMAX2; whichever is smaller at each
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
fMAX1 is defin ed by fMAX1 = 0.05/(td(OFF)I+ td(ON)I).
Deadti me (the de nominato r) has bee n arbit rarily held to 10%
of the on -sta te tim e for a 50% duty factor. Other definitions
are possible. td(OFF)I and td(ON)I are defined in Figure 20.
Device turn-off delay can establish a n addit io nal frequen cy
limitin g con diti on for an applic at ion other than TJM. td(OFF)I
is important when controlling output ripple under a lightly
loaded condition.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The
allow able dissipation (PD) is defined by PD = (TJM - TC)/RθJC.
The sum of device switchi ng and condu ction losses must
not exceed PD. A 50% duty factor was used (Figure 3) and
the conduction losses ( PC) are approx imated by
PC=(V
CE xI
CE)/2.
EON and EOFF are defined in the switching waveforms
shown in Figure 20. EON is the integral of the instantaneous
power loss (ICE x VCE) during turn-on and EOFF is the
integral of the instantaneous power loss (ICE x VCE) during
turn-off. All tail losses are included in the calculation for
EOFF; i.e., the collector current equals zero (ICE = 0).
Test Circuit and Waveforms
FIGURE 19. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 20. SWITCHING TEST WAVEFORMS
RG = 10Ω
L = 1mH
VDD = 480V
+
-
HGTG20N60C3D
tfI
td(OFF)I trI
td(ON)I
10%
90%
10%
90%
VCE
ICE
VGE
EOFF
EON
HGTG20N60C3D