MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
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lating the output voltage back to its predetermined
value. The controller response time depends on the
closed-loop bandwidth. A higher bandwidth yields a
faster response time, preventing the output from deviat-
ing further from its regulating value. See the
Compen-
sation Design
section for more details.
Input-Capacitor Selection
The input capacitor reduces the current peaks drawn
from the input power supply and reduces switching
noise in the IC. The total input capacitance must be
equal or greater than the value given by the following
equation to keep the input-ripple voltage within specs
and minimize the high-frequency ripple current being
fed back to the input source:
where VIN-RIPPLE is the maximum allowed input ripple
voltage across the input capacitors and is recommend-
ed to be less than 2% of the minimum input voltage. D
is the duty cycle (VOUT/VIN) and TSis the switching
period (1/fS).
The impedance of the input capacitor at the switching
frequency should be less than that of the input source so
high-frequency switching currents do not pass through
the input source but are instead shunted through the
input capacitor. High source impedance requires high
input capacitance. The input capacitor must meet the
ripple current requirement imposed by the switching cur-
rents. The RMS input ripple current is given by:
where IRIPPLE is the input RMS ripple current.
Compensation Design
The power transfer function consists of one double pole
and one zero. The double pole is introduced by the out-
put filtering inductor L and the output filtering capacitor
CO. The ESR of the output filtering capacitor deter-
mines the zero. The double pole and zero frequencies
are given as follows:
where RLis equal to the sum of the output inductor’s
DCR and the internal switch resistance, RDS(ON). A typi-
cal value for RDS(ON) is 23mΩ. ROis the output load
resistance, which is equal to the rated output voltage
divided by the rated output current. ESR is the total
equivalent series resistance of the output filtering capaci-
tor. If there is more than one output capacitor of the same
type in parallel, the value of the ESR in the above equa-
tion is equal to that of the ESR of a single output capaci-
tor divided by the total number of output capacitors.
The high switching frequency range of the MAX8646
allows the use of ceramic output capacitors. Since the
ESR of ceramic capacitors is typically very low, the fre-
quency of the associated transfer function zero is higher
than the unity-gain crossover frequency, fC, and the zero
cannot be used to compensate for the double pole creat-
ed by the output filtering inductor and capacitor. The dou-
ble pole produces a gain drop of 40dB/decade and a
phase shift of 180°/decade. The error amplifier must com-
pensate for this gain drop and phase shift to achieve a
stable high-bandwidth closed-loop system. Therefore,
use type III compensation as shown in Figures 3 and 4.
Type III compensation possesses three poles and two
zeros with the first pole, fP1_EA, located at zero frequency
(DC). Locations of other poles and zeros of the type III
compensation are given by:
The above equations are based on the assumptions
that C1>>C2, and R3>>R2, which are true in most
applications. Placements of these poles and zeros are
determined by the frequencies of the double pole and
ESR zero of the power transfer function. It is also a
function of the desired close-loop bandwidth. The fol-
lowing section outlines the step-by-step design proce-
dure to calculate the required compensation
components for the MAX8646. When the output voltage
of the MAX8646 is programmed to a preset voltage, R3
is internal to the IC and R4 does not exist (Figure 3b).
When externally programming the MAX8646 (Figure
3a), the output voltage is determined by: