January 2012
© 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ17 • Rev. 1.0.6
NC7WZ17 — TinyLogic
®
UHS Dual Buffer with Schmitt Trigger Inputs
NC7WZ17
TinyLogic® UHS Dual Buffer with Schmitt Trigger Inputs
Features
Ultra-High Speed: tPD 3.6ns (Typical) into 50pF
at 5V VCC
High Output Drive: ±24mA at 3V VCC
Broad VCC Operating Range: 1.65V to 5.5V
Matches Performance of LCX when Operated
at 3.3V VCC
Power Down High Impedance Inputs/Outputs
Over-Voltage Tolerance Inputs Facilitate 5V to 3V
Translation
Proprietary Noise/EMI Reduction Circuitry
Ultra-Small MicroPak™ Packages
Space-Saving SC70 Package
Description
The NC7WZ17 is a dual buffer with Schmitt trigger
inputs from Fairchild's Ultra-High Speed (UHS) series
of TinyLogic® products. The device is fabricated with
advanced CMOS technology to achieve ultra-high
speed with high output drive, while maintaining low
static power dissipation over a very broad VCC
operating range. The device is specified to operate
over the 1.65V to 5.5V VCC range. The inputs and
outputs are high-impedance when VCC is 0V. Inputs
tolerate voltages up to 7V, independent of VCC
operating voltage. Schmitt trigger inputs achieve 1V
typical hysteresis between the positive- and negative-
going input threshold voltage at 5V.
Ordering Information
Part Number Operating
Temperature Top Mark Package Packing
Method
NC7WZ17P6X -40 to +85°C Z17 6-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3000 Units on
Tape & Reel
NC7WZ17L6X -40 to +85°C A5 6-Lead MicroPak™, 1.00mm Wide 5000 Units on
Tape & Reel
NC7WZ17FHX -40 to +85°C A5 6-Lead, MicroPak2, 1x1mm Body, .35mm Pitch 5000 Units on
Tape & Reel
© 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ17 • Rev. 1.0.6 2
NC7WZ17 — TinyLogic
®
UHS Dual Buffer with Schmitt Trigger Inputs
Connection Diagrams IEEC/IEC
A
1
1Y
1
A
2
Y
2
Figure 1. Logic Symbol
Pin Configurations
A
1
Y
1
1 6
GND V
CC
2 5
A
2
Y
2
3 4
1
A
1
2
GND
3
6
5
4
A
2
Y
1
V
C
C
Y
2
Figure 2. SC70 (Top View) Figure 3. MicroPak (Top Through View)
AAA
Pin One
Notes:
1. AAA represents Product Code Top Mark (see ordering code).
2. Orientation of Top Mark determines Pin One location. Read the top product code mark left to right.
Pin One is the lower left pin. Figure 4. SC70 Pin 1 Orientation
Pin Definitions
Pin # SC70 Pin # MicroPak Name Description
1 1 A1 Input
2 2 GND Ground
3 3 A2 Input
4 4 Y2 Output
5 5 VCC Supply Voltage
6 6 Y1 Output
Function Table
Y = A
Inputs Output
A Y
L L
H H
H = HIGH Logic Level
L = LOW Logic Level
© 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ17 • Rev. 1.0.6 3
NC7WZ17 — TinyLogic
®
UHS Dual Buffer with Schmitt Trigger Inputs
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol Parameter Min. Max. Unit
VCC Supply Voltage -0.5 7.0 V
VIN DC Input Voltage -0.5 7.0 V
VOUT DC Output Voltage -0.5 7.0 V
IIK DC Input Diode Current VIN < -0.5V -50 mA
IOK DC Output Diode Current VOUT < -0.5V -50 mA
IOUT DC Output Current ±50 mA
ICC or IGND DC VCC or Ground Current ±100 mA
TSTG Storage Temperature Range -65 +150 °C
TJ Junction Temperature Under Bias +150 °C
TL Junction Lead Temperature (Soldering, 10 Seconds) +260 °C
PD Power Dissipation at 85°C SC70-6 180
mW MicroPak-6 130
MicroPak2-6 120
ESD Human Body Model, JEDEC:JESD22-A114 4000 V
Charge Device Model, JEDEC:JESD22-C101 2000
Recommended Operating Conditions(3)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol Parameter Conditions Min. Max. Unit
VCC Supply Voltage Operating 1.65 5.50
V
Supply Voltage Data Retention 1.5 5.5
VIN Input Voltage 0 5.5 V
VOUT Output Voltage 0 VCC V
TA Operating Temperature -40 +85 °C
JA Thermal Resistance SC70-6 350
°C/W
MicroPak-6 500
MicroPak2-6 560
Note:
3. Unused inputs must be held HIGH or LOW. They may not float.
© 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ17 • Rev. 1.0.6 4
NC7WZ17 — TinyLogic
®
UHS Dual Buffer with Schmitt Trigger Inputs
DC Electrical Characteristics
Symbol Parameter VCC (V) Conditions TA=25°C TA=-40 to 85°C Units
Min. Typ. Max. Min. Max.
VP Positive Threshold
Voltage
1.65 0.60 1.00 1.40 0.60 1.40
V
1.80 0.70 1.07 1.50 0.70 1.50
2.30 1.00 1.38 1.80 1.00 1.80
3.00 1.30 1.74 2.20 1.30 2.20
4.50 1.90 2.43 3.10 1.90 3.10
5.50 2.20 2.88 3.60 2.20 3.60
VN Negative Threshold
Voltage
1.65 0.20 0.50 0.80 0.20 0.80
V
1.80 0.25 0.56 0.90 0.25 0.90
2.30 0.40 0.75 1.15 0.40 1.15
3.00 0.60 0.98 1.50 0.60 1.50
4.50 1.00 1.42 2.00 1.00 2.00
5.50 1.20 1.68 2.30 1.20 2.30
VH Hysteresis Voltage
1.65 0.10 0.48 0.90 0.10 0.90
V
1.80 0.15 0.51 1.00 0.15 1.00
2.30 0.25 0.62 1.10 0.25 1.10
3.00 0.40 0.76 1.20 0.40 1.20
4.50 0.60 1.01 1.50 0.60 1.50
5.50 0.70 1.20 1.70 0.70 1.70
VOH HIGH Level Output
Voltage
1.65
VIN=VIH,
IOH=-100µA
1.55 1.65 1.55
V
1.80 1.70 1.80 1.70
2.30 2.20 2.30 2.20
3.00 2.90 3.00 2.90
4.50 4.40 4.50 4.40
1.65 IOH=-4mA 1.29 1.52 1.29
2.30 IOH=-8mA 1.90 2.14 1.90
3.00 IOH=-16mA 2.40 2.75 2.40
3.00 IOH=-24mA 2.30 2.62 2.30
4.50 IOH=-32mA 3.80 4.13 3.80
VOL LOW Level Output
Voltage
1.65
VIN=VIL, IOL=100µA
0.00 0.10 0.10
V
1.80 0.00 0.10 0.10
2.30 0.00 0.10 0.10
3.00 0.00 0.10 0.10
4.50 0.00 0.10 0.10
1.65 IOL=4mA 0.08 0.24 0.24
2.30 IOL=8mA 0.10 0.30 0.30
3.00 IOL=16mA 0.16 0.40 0.40
3.00 IOL=24mA 0.24 0.55 0.55
4.50 IOL=32mA 0.25 0.55 0.55
IIN Input Leakage Current 0 to 5.5 VIN=5.5V, GND ±0.1 ±1.0 µA
IOFF Power Off Leakage
Current 0 VIN or VOUT=5.5V 1 10 µA
ICC Quiescent Supply Current 1.65 to 5.50 VIN=5.5V, GND 1 10 µA
© 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ17 • Rev. 1.0.6 5
NC7WZ17 — TinyLogic
®
UHS Dual Buffer with Schmitt Trigger Inputs
AC Electrical Characteristics
Symbol Parameter VCC (V) Conditions TA=25°C TA=-40 to
85°C Units Figure
Min. Typ. Max. Min. Max.
tPLH, tPHL Propagation Delay
1.65
CL=15pF,
RL=1M
2.0 8.3 14.3 2.0 15.8
ns
Figure 5
Figure 6
1.80 2.0 6.9 11.9 2.0 13.1
2.50 ± 0.20 1.5 4.8 8.2 1.5 9.0
3.30 ± 0.30 1.0 3.7 5.6 1.0 6.2
5.00 ± 0.50 0.8 3.0 4.7 0.8 5.2
3.30 ± 0.30 CL=50pF,
RL=500 1.5 4.3 6.6 1.5 7.3 Figure 5
Figure 6
5.00 ± 0.50 1.0 3.6 5.6 1.0 6.2
CIN Input Capacitance 0.00 2.5 pF
CPD Power Dissipation
Capacitance(4) 3.30 10.0 pF Figure 7
5.00 12.0
Note:
4. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating
current consumption (ICCD) at no output loading and operating at 50% duty cycle. CPD is related to ICCD dynamic
operating current by the expression: ICCD=(CPD)(VCC)(fIN)+(ICCstatic).
Input Outpu
t
V
CC
R
L
C
L
Note:
5. CL includes load and stray capacitance;
Input PRR=1.0MHz; tW=500ns
t
r
= 3ns
t
PLH
Input
Output
t
f
= 3ns
V
OH
90%
50% 50%
90%
10% 10%
50% 50%
t
PHL
t
W
V
OL
V
CC
GND
Figure 5. AC Test Circuit Figure 6. AC Waveforms
V
CC
A
Input
Note:
6. Input=AC Waveform; t
r
=tf=1.8ns; PRR=10MHz; Duty Cycle =50%.
Figure 7. ICCD Test Circuit
© 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ17 • Rev. 1.0.6 6
NC7WZ17 — TinyLogic
®
UHS Dual Buffer with Schmitt Trigger Inputs
Physical Dimensions
DETAIL A
SCALE: 60X
B
1.90
2.00±0.20
0.50 MIN
1.00
0.80
1.10
0.80
0.10 C
0.25
0.10
0.46
0.26
0.20
GAGE
PLANE (R0.10)
30°
0°
SEATING
PLANE
C0.10
0.00
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO EIAJ
SC-88, 1996.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH.
D) DRAWING FILENAME: MKT-MAA06AREV6
2.10±0.30
0.10 AB
0.65
1.30
(0.25) 0.30
0.15
1
1.25±0.10
3
1.30 0.40 MIN
SEE DETAIL A
LAND PATTERN RECOMMENDATION
6
A
4
C
0.65 L
SYMM
PIN ONE
Figure 8. 6-Lead, SC70, EIAJ SC-88a, 1.25mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’ s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Tape and Reel Specification
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:
http://www.fairchildsemi.com/products/analog/pdf/sc70-6_tr.pdf.
Package Designator Tape Section Cavity Number Cavity Status Cover Type Status
P6X Leader (Start End) 125 (Typical) Empty Sealed
Carrier 3000 Filled Sealed
Trailer (Hub End) 75 (Typical) Empty Sealed
© 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ17 • Rev. 1.0.6 7
NC7WZ17 — TinyLogic
®
UHS Dual Buffer with Schmitt Trigger Inputs
Physical Dimensions
2. DIMENSIONS ARE IN MILLIMETERS
1. CONFORMS TO JE DEC STANDARD M0-25 2 VARIATIO N UAAD
4. FILENAME AND REVISION: MAC06AREV4
Notes:
3. DRAWING CONFORMS TO ASME Y14.5M-1994
TOP VIEW
RECOMMENED
LAND PATTERN
BOTTOM VIEW
1.45
1.00
A
B
0.05 C
0.05 C
2X
2X
0.55MAX
0.05 C
(0.49)
(1)
(0.75)
(0.52)
(0.30)
6X
1X
6X
PIN 1
DETAIL A
0.075 X 45
CHAMFER
0.25
0.15
0.35
0.25
0.40
0.30
0.5
(0.05)
1.0
5X
DETAIL A
PIN 1 TERMINAL
0.40
0.30
0.45
0.35
0.10
0.00
0.10 CBA
0.05 C
C0.05 C
0.05
0.00
5X
5X
6X (0.13)
4X
6X
PIN 1 IDENTIFIER
(0.254)
5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY
5
OTHER LINE IN THE MARK CODE LAYOUT.
Figure 9. 6-Lead, MicroPak™, 1.0mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’ s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Tape and Reel Specification
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:
http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf.
Package Designator Tape Section Cavity Number Cavity Status Cover Type Status
L6X Leader (Start End) 125 (Typical) Empty Sealed
Carrier 5000 Filled Sealed
Trailer (Hub End) 75 (Typical) Empty Sealed
© 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ17 • Rev. 1.0.6 8
NC7WZ17 — TinyLogic
®
UHS Dual Buffer with Schmitt Trigger Inputs
Physical Dimensions
1.00
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANC ES P ER ASME Y14.5M, 1994
NOTES:
A. COMPLIES TO JEDEC MO-252 STANDARD
0.05 CA
B
0.55MAX
0.05 C
C
0.35
0.09
0.19
123
0.35
0.25
5X
6X
DETAIL A
0.60
(0.08)
4X
(0.05) 6X
0.40
0.30
0.075X45°
CHAMFER
5X 0.40
0.35
1X 0.45
6X 0.19
TOP VIEW
BOTTOM VIEW
0.66
0.10 CBA
.05 C
0.89
PIN 1
0.05 C
2X
2X 1.00
D. LANDPATTERN RECOMMEND A TION IS BASED ON FSC
E. DRAWING FILENAME AND REVISION: MGF06AREV 3
0.52
0.73
0.57
0.20 6X
1X
5X
RECOMMEND ED LAND PATTERN
FOR SPACE CONSTRAINED PCB
DETAIL A
PIN 1 LEAD SCALE: 2X
ALTERNATIVE LAND P A TTERN
FOR UNIVERSAL APPLICATION
DESIGN.
0.90
MIN 250uM
654
0.35
(0.08) 4X
SIDE VIEW
Figure 10. 6-Lead, MicroPak2, 1x1mm Body, .35mm Pitch
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’ s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Tape and Reel Specification
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:
http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf.
Package Designator Tape Section Cavity Number Cavity Status Cover Type Status
FHX Leader (Start End) 125 (Typical) Empty Sealed
Carrier 5000 Filled Sealed
Trailer (Hub End) 75 (Typical) Empty Sealed
© 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
NC7WZ17 • Rev. 1.0.6 9
NC7WZ17 — TinyLogic
®
UHS Dual Buffer with Schmitt Trigger Inputs
