SA572
Programmable analog compandor
Product specification 1998 Nov 03
INTEGRATED CIRCUITS
IC17 Data Handbook
Philips Semiconductors Product specification
SA572Programmable analog compandor
2
1998 Nov 03 853-0813 20294
DESCRIPTION
The SA572 is a dual-channel, high-performance gain control circuit
in which either channel may be used for dynamic range
compression or expansion. Each channel has a full-wave rectifier to
detect the average value of input signal, a linearized,
temperature-compensated variable gain cell (∆G) and a dynamic
time constant buffer. The buffer permits independent control of
dynamic attack and recovery time with minimum external
components and improved low frequency gain control ripple
distortion over previous compandors.
The SA572 is intended for noise reduction in high-performance
audio systems. It can also be used in a wide range of
communication systems and video recording applications.
FEATURES
•Independent control of attack and recovery time
•Improved low frequency gain control ripple
•Complementary gain compression and expansion with
external op amp
•Wide dynamic range—greater than 110dB
•Temperature-compensated gain control
•Low distortion gain cell
•Low noise—6µV typical
•Wide supply voltage range—6V-22V
•System level adjustable with external components
PIN CONFIGURATION
1
2
3
4
5
6
7
89
10
11
12
13
14
16
15
D1, N, Packages
TRACK TRIM A
RECOV. CAP A
RECT. IN A
ATTACK CAP A
THD TRIM A
GND
∆G OUT A
∆G IN A
TRACK TRIM B
RECOV. CAP B
RECT. IN B
ATTACK CAP B
THD TRIM B
∆G OUT B
∆G IN B
VCC
NOTE:
1. D package released in large SO (SOL) package only.
SR00694
Figure 1. Pin Configuration
APPLICATIONS
•Dynamic noise reduction system
•Voltage control amplifier
•Stereo expandor
•Automatic level control
•High-level limiter
•Low-level noise gate
•State variable filter
ORDERING INFORMATION
DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG #
16-Pin Plastic Small Outline (SOL) –40 to +85°C SA572D SOT162-1
16-Pin Plastic Dual In-Line Package (DIP) –40 to +85°C SA572N SOT38-4
ABSOLUTE MAXIMUM RATINGS
SYMBOL PARAMETER RATING UNIT
VCC Supply voltage 22 VDC
TA
Operating temperature range
TA
SA572 –40 to +85 °C
PDPower dissipation 500 mW
Philips Semiconductors Product specification
SA572Programmable analog compandor
1998 Nov 03 3
BLOCK DIAGRAM
(7,9)
(6,10)
(3,13)
(16)
(8) (4,12) (2,14)
(1,15)
(5,11)
GAIN CELL
RECTIFIER
P.S.
6.8k
10k BUFFER 10k
270
500
R1
Ω
Ω
∆G
–
+
–
+
SR00695
Figure 2. Block Diagram
DC ELECTRICAL CHARACTERISTICS
Standard test conditions (unless otherwise noted) VCC=15V, TA=25°C; Expandor mode (see Test Circuit).
Input signals at unity gain level (0dB) = 100mVRMS at 1kHz; V1 = V2; R2 = 3.3kΩ; R3 = 17.3kΩ.
SYMBOL
PARAMETER
TEST CONDITIONS
SA572
UNIT
SYMBOL
PARAMETER
TEST
CONDITIONS
Min Typ Max
UNIT
VCC Supply voltage 6 22 VDC
ICC Supply current No signal 6.3 mA
VRInternal voltage reference 2.3 2.5 2.7 VDC
THD Total harmonic distortion (untrimmed) 1kHz CA=1.0µF 0.2 1.0 %
THD Total harmonic distortion (trimmed) 1kHz CR=10µF 0.05 %
THD Total harmonic distortion (trimmed) 100Hz 0.25 %
No signal output noise Input to V1 and V2 grounded (20–20kHz) 6 25 µV
DC level shift (untrimmed) Input change from no signal to 100mVRMS ±20 ±50 mV
Unity gain level –1.5 0 +1.5 dB
Large-signal distortion V1=V2=400mV 0.7 3 %
T racking error Rectifier input
(measured relative to value at unity
i) [V V ( it i )]dB V dB
V2=+6dB V1=0dB ±0.2 dB
gain)= [VO–VO (unity gain)]dB –V2dB V2=–30dB V1=0dB ±0.5 –2.5, +1.6 dB
Channel crosstalk 200mVRMS into channel A,
measured output on channel B 60 dB
PSRR Power supply rejection ratio 120Hz 70 dB
Philips Semiconductors Product specification
SA572Programmable analog compandor
1998 Nov 03 4
TEST CIRCUIT
BUFFER
RECTIFIER
NE5234
+15V
–15V
(7,9)
(2,14)
(4,12)
6.8k (5,11)
(6,10)
(8)
(1,15)
(16)
3.3k (3,13)
∆G
V1
V2
V0
270pF
82k
2.2k
17.3k
1%
2.2µF
22µF
2.2µF
22µF
.1µF
1µF
2.2µF
5Ω
= 10µF
R3
1%
R2
100Ω
1k +
+
+
+
–
SR00696
Figure 3. Test Circuit
AUDIO SIGNAL PROCESSING IC COMBINES VCA
AND FAST ATTACK/SLOW RECOVERY LEVEL
SENSOR
In high-performance audio gain control applications, it is desirable to
independently control the attack and recovery time of the gain
control signal. This is true, for example, in compandor applications
for noise reduction. In high end systems the input signal is usually
split into two or more frequency bands to optimize the dynamic
behavior for each band. This reduces low frequency distortion due
to control signal ripple, phase distortion, high frequency channel
overload and noise modulation. Because of the expense in
hardware, multiple band signal processing up to now was limited to
professional audio applications.
With the introduction of the Signetics SA572 this high-performance
noise reduction concept becomes feasible for consumer hi fi
applications. The SA572 is a dual channel gain control IC. Each
channel has a linearized, temperature-compensated gain cell and an
improved level sensor. In conjunction with an external low noise op
amp for current-to-voltage conversion, the VCA features low
distortion, low noise and wide dynamic range.
The novel level sensor which provides gain control current for the
VCA gives lower gain control ripple and independent control of fast
attack, slow recovery dynamic response. An attack capacitor CA
with an internal 10k resistor RA defines the attack time tA. The
recovery time tR of a tone burst is defined by a recovery capacitor
CR and an internal 10k resistor RR. Typical attack time of 4ms for
the high-frequency spectrum and 40ms for the low frequency band
can be obtained with 0.1µF and 1.0µF attack capacitors,
respectively. Recovery time of 200ms can be obtained with a 4.7µF
recovery capacitor for a 100Hz signal, the third harmonic distortion
is improved by more than 10dB over the simple RC ripple filter with
a single 1.0µF attack and recovery capacitor, while the attack time
remains the same.
The SA572 is assembled in a standard 16-pin dual in-line plastic
package and in oversized SOL package. It operates over a wide
supply range from 6V to 22V. Supply current is less than 6mA. The
SA572 is designed for applications from –40°C to +85°C.
Philips Semiconductors Product specification
SA572Programmable analog compandor
1998 Nov 03 5
SA572 BASIC APPLICATIONS
Description
The SA572 consists of two linearized, temperature-compensated
gain cells (∆G), each with a full-wave rectifier and a buffer amplifier
as shown in the block diagram. The two channels share a 2.5V
common bias reference derived from the power supply but otherwise
operate independently. Because of inherent low distortion, low noise
and the capability to linearize large signals, a wide dynamic range
can be obtained. The buffer amplifiers are provided to permit control
of attack time and recovery time independent of each other.
Partitioned as shown in the block diagram, the IC allows flexibility in
the design of system levels that optimize DC shift, ripple distortion,
tracking accuracy and noise floor for a wide range of application
requirements.
Gain Cell
Figure 4 shows the circuit configuration of the gain cell. Bases of the
differential pairs Q1-Q2 and Q3-Q4 are both tied to the output and
inputs of OPA A1. The negative feedback through Q1 holds the VBE
of Q1-Q2 and the VBE of Q3-Q4 equal. The following relationship can
be derived from the transistor model equation in the forward active
region.
VBEQ3Q4 BEQ1Q2
(VBE = VT IIN IC/IS)
VTIn1
2IG1
2IO
ISVTIn1
2IG1
2IO
IS
where IIN VIN
R1
R1 = 6.8kΩ
I1 = 140µA
I2 = 280µA
VTInI1IIN
ISVTInI2I1IIN
IS(2)
where IIN VIN
R1
R1 = 6.8kΩ
I1 = 140µA
I2 = 280µA
IO is the differential output current of the gain cell and IG is the gain
control current of the gain cell.
If all transistors Q1 through Q4 are of the same size, equation (2)
can be simplified to:
IO2
I2IIN IG1
I2I22I1IG(3)
The first term of Equation 3 shows the multiplier relationship of a
linearized two quadrant transconductance amplifier. The second
term is the gain control feedthrough due to the mismatch of devices.
In the design, this has been minimized by large matched devices
and careful layout. Offset voltage is caused by the device mismatch
and it leads to even harmonic distortion. The offset voltage can be
trimmed out by feeding a current source within ±25µA into the THD
trim pin.
The residual distortion is third harmonic distortion and is caused by
gain control ripple. In a compandor system, available control of fast
attack and slow recovery improve ripple distortion significantly. At
the unity gain level of 100mV, the gain cell gives THD (total harmonic
distortion) of 0.17% typ. Output noise with no input signals is only
6µV in the audio spectrum (10Hz-20kHz). The output current IO
must feed the virtual ground input of an operational amplifier with a
resistor from output to inverting input. The non-inverting input of the
operational amplifier has to be biased at VREF if the output current
IO is DC coupled.
VREF
THD
TRIM
V+
R1
6.8k
1
2
IG
1
2
IO
I1
140µA
280µA
I2
IG
IO
Q4Q3Q1Q2
VIN
+–
A1
SR00697
Figure 4. Basic Gain Cell Schematic
Philips Semiconductors Product specification
SA572Programmable analog compandor
1998 Nov 03 6
Rectifier
The rectifier is a full-wave design as shown in Figure 5. The input
voltage is converted to current through the input resistor R2 and
turns on either Q5 or Q6 depending on the signal polarity. Deadband
of the voltage to current converter is reduced by the loop gain of the
gain block A2. If AC coupling is used, the rectifier error comes only
from input bias current of gain block A2. The input bias current is
typically about 70nA. Frequency response of the gain block A2 also
causes second-order error at high frequency. The collector current
of Q6 is mirrored and summed at the collector of Q5 to form the full
wave rectified output current IR. The rectifier transfer function is
IRVIN VREF
R2(4)
If VIN is AC-coupled, then the equation will be reduced to:
IRAC VIN(AVG)
R2
The internal bias scheme limits the maximum output current IR to be
around 300µA. Within a ±1dB error band the input range of the rectifier
is about 52dB.
VIN
VREF
V+
A2
+
–
R2 Q6
Q5
D7
IRVIN VREF
R2
SR00698
Figure 5. Simplified Rectifier Schematic
Buffer Amplifier
In audio systems, it is desirable to have fast attack time and slow
recovery time for a tone burst input. The fast attack time reduces
transient channel overload but also causes low-frequency ripple
distortion. The low-frequency ripple distortion can be improved with
the slow recovery time. If different attack times are implemented in
corresponding frequency spectrums in a split band audio system,
high quality performance can be achieved. The buffer amplifier is
designed to make this feature available with minimum external
components. Referring to Figure 6, the rectifier output current is
mirrored into the input and output of the unipolar buffer amplifier A3
through Q8, Q9 and Q10. Diodes D11 and D12 improve tracking
accuracy and provide common-mode bias for A3. For a
positive-going input signal, the buffer amplifier acts like a
voltage-follower. Therefore, the output impedance of A3 makes the
contribution of capacitor CR to attack time insignificant. Neglecting
diode impedance, the gain Ga(t) for ∆G can be expressed as
follows:
Ga(t) (GaINT GaFNL et
tAGaFNL
GaINT=Initial Gain
GaFNL=Final Gain
τA=RA • CA=10k • CA
where τA is the attack time constant and RA is a 10k internal
resistor. Diode D15 opens the feedback loop of A3 for a
negative-going signal if the value of capacitor CR is larger than
capacitor CA. The recovery time depends only on CR • RR. If the
diode impedance is assumed negligible, the dynamic gain GR (t) for
∆G is expressed as follows.
GR(t) (GRINT GRFNL et
tRGRFNL
GR(t)=(GR INT–GR FNL) e +GR FNL
τR=RR • CR=10k • CR
where τR is the recovery time constant and RR is a 10k internal
resistor. The gain control current is mirrored to the gain cell through
Q14. The low level gain errors due to input bias current of A2 and A3
can be trimmed through the tracking trim pin into A3 with a current
source of ±3µA.
Philips Semiconductors Product specification
SA572Programmable analog compandor
1998 Nov 03 7
Q8 Q9 Q10
Q17
X2
Q16
X2
Q18
10k
D13
Q14
CR
D15
A3
10k
D11 D12
CA TRACKING
TRIM
IR1
IR2
IQ = 2IR2
V+
IR
VIN
R
–
+
SR00699
Figure 6. Buffer Amplifier Schematic
Basic Expandor
Figure 7 shows an application of the circuit as a simple expandor.
The gain expression of the system is given by
VOUT
VIN 2
I1R3VIN(AVG)
R2R1(5)
(I1=140µA)
Both the resistors R1 and R2 are tied to internal summing nodes. R1
is a 6.8k internal resistor. The maximum input current into the gain
cell can be as large as 140µA. This corresponds to a voltage level of
140µA • 6.8k=952mV peak. The input peak current into the rectifier
is limited to 300µA by the internal bias system. Note that the value
of R1 can be increased to accommodate higher input level. R2 and
R3 are external resistors. It is easy to adjust the ratio of R3/R2 for
desirable system voltage and current levels. A small R2 results in
higher gain control current and smaller static and dynamic tracking
error. However , an impedance buf fer A1 may be necessary if the
input is voltage drive with large source impedance.
The gain cell output current feeds the summing node of the external
OPA A2. R3 and A2 convert the gain cell output current to the output
voltage. In high-performance applications, A2 has to be low-noise,
high-speed and wide band so that the high-performance output of
the gain cell will not be degraded. The non-inverting input of A2 can
be biased at the low noise internal reference Pin 6 or 10. Resistor
R4 is used to bias up the output DC level of A2 for maximum swing.
The output DC level of A2 is given by
VODC VREF1R3
R4VBR3
R4(6)
VB can be tied to a regulated power supply for a dual supply system
and be grounded for a single supply system. CA sets the attack time
constant and CR sets the recovery time constant. *5COL
Philips Semiconductors Product specification
SA572Programmable analog compandor
1998 Nov 03 8
–
+
A1 (7,9)
R5
100k
R2
3.3k
(3,13)
(8) (16)
CA CR
(4,12)
(2,14)1k
(6,10) R6
17.3k
(5,11)
BUFFER
A2
R4 R3
VOUT
VIN
CIN1
CIN2
CIN3
VREF
R1
6.8k
+VB
+VCC
∆G
10µF1µF
2.2µF
C1
2.2µF
2.2µF
SR00700
Figure 7. Basic Expandor Schematic
Basic Compressor
Figure 8 shows the hook-up of the circuit as a compressor. The IC is
put in the feedback loop of the OPA A1. The system gain expression
is as follows:
VOUT
VIN I1
2R2R1
R3VIN(AVG)1
2(7)
RDC1, RDC2, and CDC form a DC feedback for A1. The output DC
level of A1 is given by
VODC VREF1RDC1 RDC2
R4(8)
VBRDC1 RDC2
R4
The zener diodes D1 and D2 are used for channel overload
protection.
(7,9)
BUFFER
VREF
R1
6.8k
∆G
R4 RDC1 RDC2
9.1k CDC 9.1k
D1 D2
A1
R3
17.3k
C1
1k R5
(6,10)
(5,11)
(2,14)
(4,12)
CR CA
(8)
(3,13)
3.3k
R2
(16)
CIN3
VCC
10µF
.1µF
C2
2.2µF
CIN1
VIN
10µF1µF
2.2µF
CIN2
2.2µF
VOUT
–
+
SR00701
Figure 8. Basic Compressor Schematic
Philips Semiconductors Product specification
SA572Programmable analog compandor
1998 Nov 03 9
Basic Compandor System
The above basic compressor and expandor can be applied to
systems such as tape/disc noise reduction, digital audio, bucket
brigade delay lines. Additional system design techniques such as
bandlimiting, band splitting, pre-emphasis, de-emphasis and
equalization are easy to incorporate. The IC is a versatile functional
block to achieve a high performance audio system. Figure 9 shows
the system level diagram for reference.
COMPRESSION
IN EXPANDOR
OUT
REL LEVEL ABS LEVEL
dB dBM
3.0V
547.6MV
400MV
100MV
10MV
1MV
+29.54
+14.77
+12.0
0.0
–20
–40
–60
–80
+11.76
–3.00
–5.78
–17.78
–37.78
–57.78
–77.78
–97.78
VRMS
100µV
10µV
INPUT TO ∆G
AND RECT
2
1
2
SR00702
Figure 9. SA572 System Level
Philips Semiconductors Product specification
SA572Programmable analog compandor
1998 Nov 03 10
SO16: plastic small outline package; 16 leads; body width 7.5 mm SOT162-1
Philips Semiconductors Product specification
SA572Programmable analog compandor
1998 Nov 03 11
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
Philips Semiconductors Product specification
SA572Programmable analog compandor
1998 Nov 03 12
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may af fect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Date of release: 11-98
Document order number: 9397 750 04749
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition [1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1] Please consult the most recently issued datasheet before initiating or completing a design.
