Industrial Power Control
Data Sheet
Rev. 2.0, 2014-11-10
Output with Clamp variant for IGBT
Single Channel IGBT Gate Driver IC
1EDI10I12MF
1EDI20I12MF
1EDI30I12MF
1EDI EiceDRIVER™ Compact
Edition 2014-11-10
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2014 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Data Sheet 3 Rev. 2.0, 2014-11-10
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,
CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™,
EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™,
MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™,
PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™,
SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,
TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,
PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR
development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,
FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.
FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of
Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data
Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.
RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of
Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Revision History
Page or Item Subjects (major changes since previous revision)
Rev. 2.0, 2014-11-10
all pages Final datasheet, parameter completion and editorial changes
Rev. 1.02, 2014-10-14
all pages parameter completion
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Data Sheet 4 Rev. 2.0, 2014-11-10
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.2 Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.3 Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.3.1 Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.3.2 Active Shut-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.3.3 Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.3.4 Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.4 Non-Inverting and Inverting Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.5 Driver Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5 Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2 Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3.1 Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3.2 Logic Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.3.3 Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.3.4 Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.3.5 Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.3.6 Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.3.7 Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6 Timing Diagramms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8 Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
8.1 Reference Layout for Thermal Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
8.2 Printed Circuit Board Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table of Contents
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Data Sheet 5 Rev. 2.0, 2014-11-10
Figure 1 Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 2 Block Diagram 1EDI10I12MF, 1EDI20I12MF and 1EDI30I12MF. . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 3 PG-DSO-8-51 (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 4 Application Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5 Propagation Delay, Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 6 Typical Switching Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 7 UVLO Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 8 PG-DSO-8-51 (Plastic (Green) Dual Small Outline Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 9 Reference Layout for Thermal Data (Copper thickness 35 μm) . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
List of Figures
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Data Sheet 6 Rev. 2.0, 2014-11-10
Table 1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 3 Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 4 Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 5 Logic Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 6 Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 7 Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 8 Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 9 Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 10 Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
List of Tables
ED-
Compact
1EDI EiceDRIVER™ Compact
Single Channel IGBT Gate Driver IC
Output with Clamp
variant for IGBT
Data Sheet 7 Rev. 2.0, 2014-11-10
1Overview
Main Features
• Single channel isolated IGBT Driver
• For 600 V/1200 V IGBTs
• Up to 6 A typical peak current at rail-to-rail outputs
• Active Miller Clamp
Product Highlights
• Galvanically isolated Coreless Transformer Driver
• Wide input voltage operating range
• Suitable for operation at high ambient temperature
Typical Application
• AC and Brushless DC Motor Drives
• High Voltage DC/DC-Converter and DC/AC-Inverter
• Induction Heating Resonant Application
• UPS-Systems
• Welding
•Solar
Description
The 1EDI10I12MF, 1EDI20I12MF and 1EDI30I12MF are galvanically isolated single channel IGBT driver in a PG-
DSO-8-51 package that provide minimum peak output currents up to 3 A and an integrated active Miller Clamp
circuit with the same current rating to protect against parasitic turn on.
The input logic pins operate on a wide input voltage range from 3 V to 15 V using CMOS threshold levels to
support even 3.3 V microcontroller.
Data transfer across the isolation barrier is realized by the Coreless Transformer Technology.
Every driver family member comes with logic input and driver output under voltage lockout (UVLO) and active
shutdown.
Product Name Gate Drive Current (min) Package
1EDI10I12MF ±1.0 A with 1.0 A Miller Clamp PG-DSO-8-51
1EDI20I12MF ±2.0 A with 2.0 A Miller Clamp PG-DSO-8-51
1EDI30I12MF ±3.0 A with 3.0 A Miller Clamp PG-DSO-8-51
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Overview
Data Sheet 8 Rev. 2.0, 2014-11-10
Figure 1 Typical Application
OUT
OUT
Control
EiceDRIVER
TM
1EDIxxI12MF
EiceDRIVER
TM
1EDIxxI12MF
IN+
IN+
IN-
IN-
GND1
VCC1 VCC2,H
VCC2,L
GND2,L
GND2,H
GND1
VCC1
CLAMP
CLAMP
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Block Diagram
Data Sheet 9 Rev. 2.0, 2014-11-10
2 Block Diagram
Figure 2 Block Diagram 1EDI10I12MF, 1EDI20I12MF and 1EDI30I12MF
IN+
IN-
GND1
VCC1
2
3
4
1
6
7
5
8
VCC2
CLAMP
OUT
GND2
input
filter
TX
UVLO
&
active
filter
input
filter
GND1
VCC1
UVLO
RX
2V
&
VCC2
&
GND2
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Pin Configuration and Functionality
Data Sheet 10 Rev. 2.0, 2014-11-10
3 Pin Configuration and Functionality
3.1 Pin Configuration
Figure 3 PG-DSO-8-51 (top view)
3.2 Pin Functionality
VCC1
Logic input supply voltage of 3.3 V up to 15 V wide operating range.
IN+ Non Inverting Driver Input
IN+ non-inverted control signal for driver output if IN- is set to low. (Output sourcing active at IN+ = high and
IN- = low)
Due to internal filtering a minimum pulse width is defined to ensure robustness against noise at IN+. An internal
weak pull-down-resistor favors off-state.
Table 1 Pin Configuration
Pin No. Name Function
1 VCC1 Positive Logic Supply
2 IN+ Non-Inverted Driver Input (active high)
3 IN- Inverted Driver Input (active low)
4 GND1 Logic Ground
5 VCC2 Positive Power Supply Output Side
6 OUT Driver Output
7 CLAMP Active Miller Clamp
8 GND2 Power Ground
1
2
3
4
8
7
6
5
VCC1
IN+
IN-
GND1
GND2
CLAMP
OUT
VCC2
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Pin Configuration and Functionality
Data Sheet 11 Rev. 2.0, 2014-11-10
IN- Inverting Driver Input
IN- inverted control signal for driver output if IN+ is set to high. (Output sourcing active at IN- = low and IN+ = high)
Due to internal filtering a minimum pulse width is defined to ensure robustness against noise at IN-. An internal
weak pull-up-resistor favors off-state.
GND1
Ground connection of input circuit.
VCC2
Positive power supply pin of output driving circuit. A proper blocking capacitor has to be placed close to this supply
pin.
OUT Driver Output
Combined source and sink output pin to external IGBT. The output voltage will be switched between VCC2 and
GND2 and is controlled by IN+ and IN-. In case of an UVLO event this output will be switched off and an active
shut down keeps the output voltage at a low level.
CLAMP Active Miller Clamp
Connect gate of external IGBT directly to this pin. As soon as the gate voltage has dropped below 2 V referred to
GND2 during turn off state the CLAMP function ties its output to GND2 to avoid parasitic turn on of the connected
IGBT.
GND2 Reference Ground
Reference ground of the output driving circuit.
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Functional Description
Data Sheet 12 Rev. 2.0, 2014-11-10
4 Functional Description
4.1 Introduction
The Output with Clamp variant for IGBT is a general purpose IGBT gate driver. Basic control and protection
features support fast and easy design of highly reliable systems.
The integrated galvanic isolation between control input logic and driving output stage grants additional safety. Its
wide input voltage supply range support the direct connection of various signal sources like DSPs and
microcontrollers.
With the rail-to-rail output and the additional active miller clamp, dynamic turn on due to Miller capacitances are
suppressed.
4.2 Supply
The driver can operate over a wide supply voltage range.
The typical positive supply voltage for the configuration in Figure 4 is 15V at VCC2. Erratical dynamic turn on of
the IGBT can be prevented with the active Miller clamp function, in which the CLAMP output is directly connected
to the IGBT gate.
Figure 4 Application Example
4.3 Protection Features
4.3.1 Undervoltage Lockout (UVLO)
To ensure correct switching of IGBTs the device is equipped with an undervoltage lockout for input and output
independently. Operation starts only after both VCC levels have increased beyond the respective VUVLOH levels
(see also Figure 7).
If the power supply voltage VVCC1 of the input chip drops below VUVLOL1 a turn-off signal is sent to the output chip
before power-down. The IGBT is switched off and the signals at IN+ and IN- are ignored until VVCC1 reaches the
power-up voltage VUVLOH1 again.
If the power supply voltage VVCC2 of the output chip goes down below VUVLOL2 the IGBT is switched off and signals
from the input chip are ignored until VVCC2 reaches the power-up voltage VUVLOH2 again.
4.3.2 Active Shut-Down
The active shut-down feature ensures a safe IGBT off-state if the output chip is not connected to the power supply,
IGBT gate is clamped at OUT and CLAMP to GND2.
GND1
IN+
IN-
VCC1
OUT
VCC2
GND2
CLAMP
+5V
SGND
IN
+15V
10R
1µ
100 n
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Functional Description
Data Sheet 13 Rev. 2.0, 2014-11-10
4.3.3 Short Circuit Clamping
During short circuit the IGBT’s gate voltage tends to rise because of the feedback via the Miller capacitance. An
additional protection circuit connected to OUT and CLAMP limits this voltage to a value slightly higher than the
supply voltage. A maximum current of 500 mA may be fed back to the supply through one of these paths for 10 μs.
If higher currents are expected or tighter clamping is desired external Schottky diodes may be added.
4.3.4 Active Miller Clamp
In a half bridge configuration the switched off IGBT tends to dynamically turn on during turn on phase of the
opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt
situation. Therefore in many applications, the use of a negative supply voltage can be avoided.
During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage drops below
typical 2 V (referred to GND2). The clamp is designed for a Miller current in the same range as the nominal output
current.
4.4 Non-Inverting and Inverting Inputs
There are two possible input modes to control the IGBT. At non-inverting mode IN+ controls the driver output while
IN- is set to low. At inverting mode IN- controls the driver output while IN+ is set to high, please see Figure 6. A
minimum input pulse width is defined to filter occasional glitches.
4.5 Driver Output
The output driver section uses MOSFETs to provide a rail-to-rail output. This feature permits that tight control of
gate voltage during on-state and short circuit can be maintained as long as the driver’s supply is stable. Due to
the low internal voltage drop, switching behaviour of the IGBT is predominantly governed by the gate resistor.
Furthermore, it reduces the power to be dissipated by the driver.
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Electrical Parameters
Data Sheet 14 Rev. 2.0, 2014-11-10
5 Electrical Parameters
5.1 Absolute Maximum Ratings
Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of
the integrated circuit. Unless otherwise noted all parameters refer to GND1.
Table 2 Absolute Maximum Ratings
Parameter Symbol Values Unit Note /
Test Condition
Min. Max.
Power supply output side VVCC2 -0.3 20 V 1)
Gate driver output VOUT VGND2-0.3 VVCC2+0.3 V –
Pin CLAMP voltage VCLAMP -0.3 VVCC2
+0.31)
1) May be exceeded during short circuit clamping.
V1)
Maximum short circuit clamping time tCLP –10μsICLAMP/OUT =
500 mA
Positive power supply input side VVCC1 -0.3 18.0 V –
Logic input voltages (IN+,IN-) VLogicIN -0.3 18.0 V –
Input to output isolation voltage (GND2) VISO -1200 1200 V
Junction temperature TJ-40 150 °C –
Storage temperature TS-55 150 °C –
Power dissipation (Input side) PD, IN –25mW
2) @TA = 25°C
2) See Figure 9 for reference layouts for these thermal data. Thermal performance may change significantly with layout and
heat dissipation of components in close proximity.
Power dissipation (Output side) PD, OUT – 400 mW 2) @TA = 25°C
Thermal resistance (Input side) RTHJA,IN – 145 K/W 2) @TA = 85°C
Thermal resistance (Output side) RTHJA,OUT – 165 K/W 2) @TA = 85°C
ESD capability VESD,HBM – 2 kV Human Body
Model3)
3) According to EIA/JESD22-A114-C (discharging a 100 pF capacitor through a 1.5 kΩ series resistor).
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Electrical Parameters
Data Sheet 15 Rev. 2.0, 2014-11-10
5.2 Operating Parameters
Note: Within the operating range the IC operates as described in the functional description. Unless otherwise
noted all parameters refer to GND1.
5.3 Electrical Characteristics
Note: The electrical characteristics include the spread of values in supply voltages, load and junction temperatures
given below. Typical values represent the median values at TA = 25°C. Unless otherwise noted all voltages
are given with respect to their respective GND (GND1 for pins 1 to 3, GND2 for pins 5 to 7).
5.3.1 Voltage Supply
Table 3 Operating Parameters
Parameter Symbol Values Unit Note /
Test Condition
Min. Max.
Power supply output side VVCC2 13 18 V 1)
1) With respect to GND2.
Power supply input side VVCC1 3.1 17 V –
Logic input voltages (IN+,IN-) VLogicIN -0.3 17 V –
Pin CLAMP voltage VCLAMP VGND2-0.3 VVCC2
2)
2) May be exceeded during short circuit clamping.
V–
Switching frequency fsw –1.0MHz
3) 4)
3) do not exceed max. power dissipation
4) Parameter is not subject to production test - verified by design/characterization
Ambient temperature TA-40 125 °C –
Thermal coefficient, junction-top Ψth,jt –4.8K/W@TA = 85°C
Common mode transient immunity |dVISO/dt| – 100 kV/μs4) @ 1000 V
Table 4 Voltage Supply
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
UVLO threshold input
chip
VUVLOH1 –2.853.1V–
VUVLOL1 2.55 2.75 – V –
UVLO hysteresis input
chip (VUVLOH1 - VUVLOL1)
VHYS1 90 100 – mV –
UVLO threshold output
chip (IGBT supply)
VUVLOH2 –11.912.7V–
VUVLOL2 10.5 11.0 – V –
UVLO hysteresis output
chip (VUVLOH1 - VUVLOL1)
VHYS2 700 850 – mV –
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Electrical Parameters
Data Sheet 16 Rev. 2.0, 2014-11-10
5.3.2 Logic Input
Note: Unless stated otherwise VCC1 = 5.0V
5.3.3 Gate Driver
Quiescent current input
chip
IQ1 –0.61.0mAVVCC1 = 5 V
IN+ = High,
IN- = Low
=>OUT = High
Quiescent current output
chip
IQ2 –1.22.0mAVVCC2 = 15 V
IN+ = High,
IN- = Low
=>OUT = High
Table 5 Logic Input
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
IN+,IN- low input voltage VIN+L,VIN-L – – 30 % of VCC1
IN+,IN- high input voltage VIN+H,VIN-H 70––%of VCC1
IN+,IN- low input voltage VIN+L,VIN-L ––1.5V–
IN+,IN- high input voltage VIN+H,VIN-H 3.5––V–
IN- input current IIN- –70200μAVIN- = GND1
IN+ input current IIN+,–70200μAVIN+ = VCC1
Table 6 Gate Driver
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
High level output peak
current (source)
1EDI10I12MF
1EDI20I12MF
1EDI30I12MF
IOUT,H,PEAK
1.0
2.0
3.0
–
2.2
4.4
5.9
–A
1)
IN+ = High,
IN- = Low,
VVCC2 = 15 V
1) voltage across the device V(VCC2 - OUT+) or V(OUT- - GND2) < VVCC2.
Low level output peak
current (sink)
1EDI10I12MF
1EDI20I12MF
1EDI30I12MF
IOUT,L,PEAK
1.0
2.0
3.0
–
2.3
4.1
6.2
–A
1)
IN+ = Low,
IN- = Low,
VVCC2 = 15 V
Table 4 Voltage Supply (cont’d)
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Electrical Parameters
Data Sheet 17 Rev. 2.0, 2014-11-10
5.3.4 Short Circuit Clamping
5.3.5 Active Miller Clamp
Table 7 Short Circuit Clamping
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Clamping voltage (OUT)
(VOUT - VVCC2)
VCLPout – 0.9 1.3 V IN+ = High,
IN- = Low,
IOUT = 500 mA
pulse test,
tCLPmax = 10 μs)
Clamping voltage
(CLAMP) (VVCLAMP-VVCC2)
VCLPclamp1 – 1.3 – V IN+ = High, IN- =
Low,
ICLAMP = 500 mA
(pulse test,
tCLPmax = 10 μs)
Clamping voltage
(CLAMP)
VCLPclamp2 – 0.7 1.1 V IN+ = High, IN- =
Low,
ICLAMP = 20 mA
Table 8 Active Miller Clamp
Parameter Symbol Values Unit Note / Test Condition
Min. Typ. Max.
Low level clamp current
1EDI10I12MF
1EDI20I12MF
1EDI30I12MF
ICLAMP,PEAK
1.0
2.0
3.0
––A
1)
IN+ = Low, IN- = Low,
VCLAMP = 15 V pulsed
tpulse = 2 μs
1) The parameter is not subject to production test - verified by design/characterization
Clamp threshold
voltage
VCLAMP 1.6 2.0 2.4 V Related to GND2
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Electrical Parameters
Data Sheet 18 Rev. 2.0, 2014-11-10
5.3.6 Dynamic Characteristics
Dynamic characteristics are measured with VVCC1 = 5 V and VVCC2 = 15 V.
5.3.7 Active Shut Down
Table 9 Dynamic Characteristics
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Input IN to output propa-
gation delay ON
TPDON 270 300 330 ns CLOAD = 100 pF
VIN+ = 50%,
VOUT=50% @ 25°C
Input IN to output propa-
gation delay OFF
TPDOFF 270 300 330 ns
Input IN to output propa-
gation delay distortion
(TPDOFF - TPDON)
TPDISTO -30 5 40 ns
Input pulse suppression
IN+, IN-
TMININ+,
TMININ-
230 240 – ns –
IN input to output
propagation delay ON
variation due to temp
TPDONt ––14ns
1)CLOAD = 100 pF
VIN+ = 50%,
VOUT=50%
1) The parameter is not subject to production test - verified by design/characterization
IN input to output
propagation delay OFF
variation due to temp
TPDOFFt ––14ns
1)CLOAD = 100 pF
VIN+ = 50%,
VOUT=50%
IN input to output
propagation delay
distortion variation due to
temp (TPDOFF-TPDON)
TPDISTOt ––8ns
1)CLOAD = 100 pF
VIN+ = 50%,
VOUT=50%
Rise time TRISE 5919nsCLOAD = 1 nF
VL 20%, VH 80%
Fall time TFALL 3615nsCLOAD = 1 nF
VL 20%, VH 80%
Table 10 Active Shut Down
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Active shut down voltage VACTSD
1)
1) With reference to GND2
–1.82.0VIOUT-/IOUT-,PEAK=0.1,
VCC2 open
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Timing Diagramms
Data Sheet 19 Rev. 2.0, 2014-11-10
6Timing Diagramms
Figure 5 Propagation Delay, Rise and Fall Time
Figure 6 Typical Switching Behavior
Figure 7 UVLO Behavior
IN+
OUT
T
PDON
50 %
50 %
T
PDOFF
20 %
80 %
T
RISE
T
FALL
OUT
IN+
IN‐
OUT
IN+
VCC2
VCC1
VUVLOH 2
VUVLOL 2
VUVLOH 1
VUVLOL 1
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Package Outlines
Data Sheet 20 Rev. 2.0, 2014-11-10
7 Package Outlines
Figure 8 PG-DSO-8-51 (Plastic (Green) Dual Small Outline Package)
1EDI EiceDRIVER™ Compact
1EDIxxI12MF
Application Notes
Data Sheet 21 Rev. 2.0, 2014-11-10
8 Application Notes
8.1 Reference Layout for Thermal Data
The PCB layout shown in Figure 9 represents the reference layout used for the thermal characterisation. Pin 4
(GND1) and pin 8 (GND2) require each a ground plane of 100 mm² for achieving maximum power dissipation. The
Output with Clamp variant for IGBT is conceived to dissipate most of the heat generated through this pins.
The thermal coefficient junction-top (Ψth,jt) can be used to calculate the junction temperature at a given top case
temperature and driver power dissipation:
Figure 9 Reference Layout for Thermal Data (Copper thickness 35 μm)
8.2 Printed Circuit Board Guidelines
The following factors should be taken into account for an optimum PCB layout.
• Sufficient spacing should be kept between high voltage isolated side and low voltage side circuits.
• The same minimum distance between two adjacent high-side isolated parts of the PCB should be maintained
to increase the effective isolation and to reduce parasitic coupling.
• In order to ensure low supply ripple and clean switching signals, bypass capacitor trace lengths should be kept
as short as possible.
TjΨth jt,PDTtop
+⋅=
