LM82 www.ti.com SNIS113D - JANUARY 2000 - REVISED MARCH 2013 LM82 Remote Diode and Local Digital Temperature Sensor with Two-Wire Interface Check for Samples: LM82 FEATURES DESCRIPTION * The LM82 is a digital temperature sensor with a 2 wire serial interface that senses the voltage and thus the temperature of a remote diode using a DeltaSigma analog-to-digital converter with a digital overtemperature detector. The LM82 accurately senses its own temperature as well as the temperature of external devices, such as Pentium II Processors or diode connected 2N3904s. The temperature of any ASIC can be detected using the LM82 as long as a dedicated diode (semiconductor junction) is available on the die. Using the SMBus interface a host can access the LM82's registers at any time. Activation of a T_CRIT_A output occurs when any temperature is greater than a programmable comparator limit, T_CRIT. Activation of an INT output occurs when any temperature is greater than its corresponding programmable comparator HIGH limit. 1 2 * * * * * * Accurately Senses Die Temperature of Remote ICs, or Diode Junctions On-board Local Temperature Sensing SMBus and I2C Compatible Interface, Supports SMBus 1.1 TIMEOUT Two Interrupt Outputs: INT and T_CRIT_A Register Readback Capability 7 bit Plus Sign Temperature Data Format, 1C Resolution 2 Address Select Pins Allow Connection of 9 LM82s on a Single Bus APPLICATIONS * * * * * System Thermal Management Computers Electronic Test Equipment Office Electronics HVAC KEY SPECIFICATIONS * * * * Supply Voltage: 3.0 to 3.6V Supply Current: 0.8mA (max) Local Temp Accuracy (includes quantization error): - 0 to +85 3.0C (max) Remote Diode Temp Accuracy (includes quantization error): - +25C to +100C 3C (max) - 0C to +125C 4C (max) The host can program as well as read back the state of the T_CRIT register and the 2 T_HIGH registers. Three state logic inputs allow two pins (ADD0, ADD1) to select up to 9 SMBus address locations for the LM82. The sensor powers up with default thresholds of 127C for T_CRIT and all T_HIGHs. The LM82 is pin for pin and register compatible with the LM84, Maxim MAX1617 and Analog Devices ADM1021. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2000-2013, Texas Instruments Incorporated LM82 SNIS113D - JANUARY 2000 - REVISED MARCH 2013 www.ti.com Simplified Block Diagram 3.0V-3.6V D+ D- Temp Sensor Circuitry T_CRIT_A 8-bit '6 A/D Converter INT Control Logic Temperature Registers T_CRIT Limit Register HIGH Limit Registers Configuration and Status Registers ADD0 Mfr ID Register SMBData Two-Wire Serial Interface ADD1 SMBCLK Connection Diagram Figure 1. SSOP-TOP VIEW See DBQ Package 2 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 LM82 www.ti.com SNIS113D - JANUARY 2000 - REVISED MARCH 2013 Typical Application PIN DESCRIPTIONS Label Pin # NC 1, 5 VCC 2 D+ 3 D- 4 Function Typical Connection floating, unconnected Left floating. PC board traces may be routed through the pads for these pins. No restrictions applied. Positive Supply Voltage Input DC Voltage from 3.0 V to 3.6 V Diode Current Source To Diode Anode. Connected to remote discrete diode junction or to the diode junction on a remote IC whose die temperature is being sensed. When not used they should be left floating. Diode Return Current Sink To Diode Cathode. Must float when not used. Ground (Low, "0"), VCC (High, "1") or open ("TRI-LEVEL") ADD0-ADD1 10, 6 User-Set SMBus (I2C) Address Inputs GND 7, 8 Power Supply Ground Ground Manufacturing test pins. Left floating. PC board traces may be routed through the pads for these pins, although the components that drive these traces should share the same supply as the LM82 so that the Absolute Maximum Rating, Voltage at Any Pin, is not violated. NC 9, 13, 15 INT 11 Interrupt Output, open-drain Pull Up Resistor, Controller Interrupt or Alert Line From and to Controller, Pull-Up Resistor SMBData 12 SMBus (I2C) Serial BiDirectional Data Line, opendrain output SMBCLK 14 SMBus (I2C) Clock Input From Controller, Pull-Up Resistor 16 Critical Temperature Alarm, open-drain output Pull Up Resistor, Controller Interrupt Line or System Shutdown T_CRIT_A Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 3 LM82 SNIS113D - JANUARY 2000 - REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. (1) Absolute Maximum Ratings -0.3 V to 6.0 V Supply Voltage Voltage at SMBData, SMBCLK, T_CRIT_A & INT pins -0.5V to 6V -0.3 V to (VCC + 0.3 V) Voltage at Other Pins D- Input Current 1 mA Input Current at All Other Pins Package Input Current (2) 5 mA (2) 20 mA SMBData, T_CRIT_A, INT Output Sink Current 10 mA -65C to +150C Storage Temperature Soldering Information, Lead Temperature SSOP Package (3) Vapor Phase (60 seconds) 215C Infrared (15 seconds) ESD Susceptibility (4) 220C Human Body Model 2000 V Machine Model (1) (2) (3) (4) 250 V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating the device beyond its rated operating conditions. When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > VCC), the current at that pin should be limited to 5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four. Parasitic components and or ESD protection circuitry are shown in the figure below for the LM82's pins. The nominal breakdown voltage of the zener D3 is 6.5 V. Care should be taken not to forward bias the parasitic diode, D1, present on pins: D+, D-, ADD1 and ADD0. Doing so by more than 50 mV may corrupt a temperature or voltage measurement. See the section titled "Surface Mount" found in a current Texas Instruments Linear Data Book for other methods of soldering surface mount devices. Human body model, 100 pF discharged through a 1.5 k resistor. Machine model, 200 pF discharged directly into each pin. Operating Ratings Specified Temperature Range TMIN to TMAX -40C to +125C LM82 Supply Voltage Range (VCC) +3.0V to +3.6V Temperature-to-Digital Converter Characteristics Unless otherwise noted, these specifications apply for VCC=+3.0 Vdc to 3.6 Vdc. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA= TJ=+25C, unless otherwise noted. Parameter Temperature Error using Local Diode Typical (1) Limits (2) Units (Limit) 1 3 C (max) TA = -40 C to +125C, VCC=+3.3V 4 C (max) TA = +60 C to +100C, VCC=+3.3V 3 TA = 0 C to +100C, VCC=+3.3V 3 C (max) TA = 0 C to +125C, VCC=+3.3V 4 C (max) Conditions (3) Temperature Error using Remote Diode TA = 0 C to +85C, VCC=+3.3V (3) Resolution (1) (2) (3) 4 C (max) 8 Bits 1 C Typicals are at TA = 25C and represent most likely parametric norm. Limits are ensured to AOQL (Average Outgoing Quality Level). The Temperature Error will vary less than 1.0C for a variation in VCC of 3V to 3.6V from the nominal of 3.3V. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 LM82 www.ti.com SNIS113D - JANUARY 2000 - REVISED MARCH 2013 Temperature-to-Digital Converter Characteristics (continued) Unless otherwise noted, these specifications apply for VCC=+3.0 Vdc to 3.6 Vdc. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA= TJ=+25C, unless otherwise noted. Parameter Conditions Conversion Time of All Temperatures Quiescent Current (5) Typical (1) (4) SMBus (I2C) Inactive Limits (2) 460 600 ms (max) 0.500 0.80 mA (max) 125 A (max) D- Source Voltage 0.7 V (D+ - D-)=+ 0.65V; high level Diode Source Current Low level 60 A (min) 15 A (max) 5 A (min) T_CRIT_A and INT Output Saturation Voltage IOUT = 3.0 mA 0.4 Power-On Reset Threshold On VCC input, falling edge 2.3 1.8 Local and Remote T_CRIT and HIGH Default Temperature settings (4) Units (Limit) See (6) V (max) V (max) V (min) +127 C This specification is provided only to indicate how often temperature data is updated. The LM82 can be read at any time without regard to conversion state (and will yield last conversion result). Quiescent current will not increase substantially with an active SMBus. Default values set at power up. (5) (6) Logic Electrical CharacteristicsDIGITAL DC CHARACTERISTICS Unless otherwise noted, these specifications apply for VCC=+3.0 to 3.6 Vdc. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA= TJ=+25C, unless otherwise noted. Symbol Parameter Conditions Typical (1) Limits (2) Units (Limit) SMBData, SMBCLK VIN(1) Logical "1" Input Voltage 2.1 V (min) VIN(0) Logical "0"Input Voltage 0.8 V (max) VIN(HYST) SMBData and SMBCLK Digital Input Hysteresis 300 mV IIN(1) Logical "1" Input Current VIN = VCC 0.005 1.5 A (max) IIN(0) Logical "0" Input Current VIN = 0 V -0.005 1.5 A (max) ADD0, ADD1 VIN(1) Logical "1" Input Voltage VCC 1.5 V (min) VIN(0) Logical "0"Input Voltage GND 0.6 V (max) IIN(1) Logical "1" Input Current VIN = VCC 2 A (max) IIN(0) Logical "0" Input Current VIN = 0 V -2 A (max) ALL DIGITAL INPUTS CIN Input Capacitance 20 pF ALL DIGITAL OUTPUTS IOH High Level Output Current VOH = VCC 100 A (max) VOL SMBus Low Level Output Voltage IOL = 3 mA IOL = 6 mA 0.4 0.6 V (max) (1) (2) Typicals are at TA = 25C and represent most likely parametric norm. Limits are ensured to AOQL (Average Outgoing Quality Level). Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 5 LM82 SNIS113D - JANUARY 2000 - REVISED MARCH 2013 www.ti.com Logic Electrical CharacteristicsSMBus DIGITAL SWITCHING CHARACTERISTICS Unless otherwise noted, these specifications apply for VCC=+3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80 pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25C, unless otherwise noted. The switching characteristics of the LM82 fully meet or exceed the published specifications of the SMBus or I2C bus. The following parameters are the timing relationships between SMBCLK and SMBData signals related to the LM82. They are not the I2C or SMBus bus specifications. Symbol Parameter fSMB SMBus Clock Frequency tLOW SMBus Clock Low Time Typical (1) Limits (2) Units (Limit) 100 10 kHz (max) kHz (min) 10 % to 10 % 1.3 25 s (min) ms (max) 10 ms (max) 0.6 Conditions tLOWMEXT Cumulative Clock Low Extend Time tHIGH SMBus Clock High Time 90 % to 90% tR,SMB SMBus Rise Time 10% to 90% 1 tF,SMB SMBus Fall Time 90% to 10% 0.3 tOF Output Fall Time CL = 400 pF, IO = 3 mA tTIMEOUT SMBData and SMBCLK Time Low for Reset of Serial Interface (3) t1 t2, tSU;DAT s (min) s (max) ns (max) 250 ns (max) 25 40 ms (min) ms (max) SMBCLK (Clock) Period 10 s (min) Data In Setup Time to SMBCLK High 100 ns (min) t3, tHD;DAT Data Out Stable after SMBCLK Low 300 TBD ns (min) ns (max) t4, tHD;STA SMBData Low Setup Time to SMBCLK Low 100 ns (min) t5, tSU;STO SMBData High Delay Time after SMBCLK High (Stop Condition Setup) 100 ns (min) t6, tSU;STA SMBus Start-Condition Setup Time 0.6 s (min) tBUF SMBus Free Time 1.3 s (min) (1) (2) (3) Typicals are at TA = 25C and represent most likely parametric norm. Limits are ensured to AOQL (Average Outgoing Quality Level). Holding the SMBData and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will cause the LM82 to reset SMBData and SMBCLK to the IDLE state of an SMBus communication (SMBCLK and SMBData set High). Figure 2. SMBus Communication 6 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 LM82 www.ti.com SNIS113D - JANUARY 2000 - REVISED MARCH 2013 Figure 3. SMBus TIMEOUT Pin Name D1 D2 D3 D4 NC (pins 1 & 5) D1 T_CRIT_A & INT x (1) VCC D+ x x x D- x x x ADD0, ADD1 x x x (1) Pin Name D3 x x x x SMBCLK x x NC (pin 13) x x NC (pins 9 & 15) D4 x SMBData x D2 x Note: An x indicates that the diode exists. Figure 4. ESD Protection Input Structure Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 7 LM82 SNIS113D - JANUARY 2000 - REVISED MARCH 2013 www.ti.com Figure 5. Temperature-to-Digital Transfer Function (Non-linear scale for clarity) Figure 6. Printed Circuit Board Used for Thermal Resistance Specifications 8 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 LM82 www.ti.com SNIS113D - JANUARY 2000 - REVISED MARCH 2013 FUNCTIONAL DESCRIPTION The LM82 temperature sensor incorporates a band-gap type temperature sensor using a Local or Remote diode and an 8-bit ADC (Delta-Sigma Analog-to-Digital Converter). The LM82 is compatible with the serial SMBus and I2C two wire interfaces. Digital comparators compare Local (LT) and Remote (RT) temperature readings to userprogrammable setpoints (LHS, RHS, and TCS). Activation of the INT output indicates that a comparison is greater than the limit preset in a HIGH register. The T_CRIT setpoint (TCS) interacts with all the temperature readings. Activation of the T_CRIT_A output indicates that any or all of the temperature readings have exceed the T_CRIT setpoint. CONVERSION SEQUENCE The LM82 converts its own temperature as well as a remote diode temperature in the following sequence: 1. Local Temperature (LT) 2. Remote Diode (RT) This round robin sequence takes approximately 480 ms to complete. INT OUTPUT and T_HIGH LIMITS Each temperature reading (LT, and RT) is associated with a T_HIGH setpoint register (LHS, RHS). At the end of a temperature reading a digital comparison determines whether that reading has exceeded its HIGH setpoint. If the temperature reading is greater than the HIGH setpoint, a bit is set in one of the Status Registers, to indicate which temperature reading, and the INT output is activated. Local and remote temperature diodes are sampled in sequence by the A/D converter. The INT output and the Status Register flags are updated at the completion of a conversion, which occurs approximately 60 ms after a temperature diode is sampled. INT is deactivated when the Status Register, containing the set bit, is read and a temperature reading is less than or equal to it's corresponding HIGH setpoint, as shown in Figure 7. Figure 8 shows a simplified logic diagram for the INT output and related circuitry. * Note: Status Register Bits are reset by a read of Status Register where bit is located. Figure 7. INT Temperature Response Diagram Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 9 LM82 SNIS113D - JANUARY 2000 - REVISED MARCH 2013 www.ti.com Figure 8. INT output related circuitry logic diagram The INT output can be disabled by setting the INT mask bit, D7, of the configuration register. INT can be programmed to be active high or low by the state of the INT inversion bit, D1, in the configuration register. A "0" would program INT to be active low. INT is an open-drain output. T_CRIT_A OUTPUT and T_CRIT LIMIT T_CRIT_A is activated when any temperature reading is greater than the limit preset in the critical temperature setpoint register (T_CRIT), as shown in Figure 9. The Status Registers can be read to determine which event caused the alarm. A bit in the Status Registers is set high to indicate which temperature reading exceeded the T_CRIT setpoint temperature and caused the alarm, see STATUS REGISTER. Local and remote temperature diodes are sampled in sequence by the A/D converter. The T_CRIT_A output and the Status Register flags are updated at the completion of a conversion. T_CRIT_A and the Status Register flags are reset only after the Status Register is read and if a temperature conversion is below the T_CRIT setpoint, as shown in Figure 9. Figure 10 shows a simplified logic diagram of the T_CRIT_A and related circuitry. * Note: Status Register Bits are reset by a read of Status Register where bit is located. Figure 9. T_CRIT_A Temperature Response Diagram 10 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 LM82 www.ti.com SNIS113D - JANUARY 2000 - REVISED MARCH 2013 Figure 10. T_CRIT_A output related circuitry logic diagram Located in the Configuration Register are the mask bits for each temperature reading, see CONFIGURATION REGISTER . When a mask bit is set, its corresponding status flag will not propagate to the T_CRIT_A output, but will still be set in the Status Registers. Configuration register bits D5 and D3, labled "Remote T_CRIT_A mask" must be set high before the T_CRIT setpoint is lowered in order for the T_CRIT_A output to function properly. Setting all four mask bits or programming the T_CRIT setpoint to 127C will disable the T_CRIT_A output. POWER ON RESET DEFAULT STATES LM82 always powers up to these known default states: 1. Command Register set to 00h 2. Local Temperature set to 0C 3. Remote Temperature set to 0C until the LM82 senses a diode present between the D+ and D- input pins. 4. Status Register set to 00h. 5. Configuration Register set to 00h; INT enabled and all T_CRIT setpoints enabled to activate T_CRIT_A. 6. Local and Remote T_CRIT set to 127C SMBus INTERFACE The LM82 operates as a slave on the SMBus, so the SMBCLK line is an input (no clock is generated by the LM82) and the SMBData line is bi-directional. According to SMBus specifications, the LM82 has a 7-bit slave address. Bit 4 (A3) of the slave address is hard wired inside the LM82 to a 1. The remainder of the address bits are controlled by the state of the address select pins ADD1 and ADD0, and are set by connecting these pins to ground for a low, (0), to VCC for a high, (1), or left floating (TRI-LEVEL). Therefore, the complete slave address is: A6 A5 A4 1 A2 A1 MSB A0 LSB and is selected as follows: Address Select Pin State ADD0 LM82 SMBus Slave Address ADD1 A6:A0 binary 0 0 001 1000 0 TRI-LEVEL 001 1001 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 11 LM82 SNIS113D - JANUARY 2000 - REVISED MARCH 2013 www.ti.com Address Select Pin State LM82 SMBus Slave Address ADD0 ADD1 A6:A0 binary 0 1 001 1010 TRI-LEVEL 0 010 1001 TRI-LEVEL TRI-LEVEL 010 1010 TRI-LEVEL 1 010 1011 1 0 100 1100 1 TRI-LEVEL 100 1101 1 1 100 1110 The LM82 latches the state of the address select pins during the first read or write on the SMBus. Changing the state of the address select pins after the first read or write to any device on the SMBus will not change the slave address of the LM82. TEMPERATURE DATA FORMAT Temperature data can be read from the Local and Remote Temperature, T_CRIT, and HIGH setpoint registers; and written to the T_CRIT and HIGH setpoint registers. Temperature data is represented by an 8-bit, two's complement byte with an LSB (Least Significant Bit) equal to 1C: Temperature Digital Output Binary Hex +125C 0111 1101 7Dh +25C 0001 1001 19h +1C 0000 0001 01h 0C 0000 0000 00h FFh -1C 1111 1111 -25C 1110 0111 E7h -55C 1100 1001 C9h OPEN-DRAIN OUTPUTS The SMBData, INT and T_CRIT_A outputs are open-drain outputs and do not have internal pull-ups. A "high" level will not be observed on these pins until pull-up current is provided from some external source, typically a pull-up resistor. Choice of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as possible. This will minimize any internal temperature reading errors due to internal heating of the LM82. The maximum resistance of the pull up, based on LM82 specification for High Level Output Current, to provide a 2.1V high level, is 30k. Care should be taken in a noisy system because a high impedance pull-up will be more likely to couple noise into the signal line. DIODE FAULT DETECTION Before each external conversion the LM82 goes through an external diode fault detection sequence. If D+ input is shorted to VCC or floating then the temperature reading will be +127 C, and the OPEN bit in the Status Register will be set. If the T_CRIT setpoint is set to less than +127 C then the D+ input RTCRIT bit in the Status Register will be set which will activate the T_CRIT_A output, if enabled. If a D+ is shorted to GND or D-, its temperature reading will be 0 C and its OPEN bit in the Status Register will not be set. 12 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 LM82 www.ti.com SNIS113D - JANUARY 2000 - REVISED MARCH 2013 COMMUNICATING with the LM82 There are 13 data registers in the LM82, selected by the Command Register. At power-up the Command Register is set to "00", the location for the Read Local Temperature Register. The Command Register latches the last location it was set to. Reading the Status Register resets T_CRIT_A and INT, so long as a temperature comparison does not signal a fault (see INT OUTPUT and T_HIGH LIMITS and T_CRIT_A OUTPUT and T_CRIT LIMIT). All other registers are predefined as read only or write only. Read and write registers with the same function contain mirrored data. A Write to the LM82 will always include the address byte and the command byte. A write to any register requires one data byte. Reading the LM82 can take place either of two ways: 1. If the location latched in the Command Register is correct (most of the time it is expected that the Command Register will point to one of the Read Temperature Registers because that will be the data most frequently read from the LM82), then the read can simply consist of an address byte, followed by retrieving the data byte. 2. If the Command Register needs to be set, then an address byte, command byte, repeat start, and another address byte will accomplish a read. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 13 LM82 SNIS113D - JANUARY 2000 - REVISED MARCH 2013 www.ti.com The data byte has the most significant bit first. At the end of a read, the LM82 can accept either Acknowledge or No Acknowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master has read its last byte). SERIAL INTERFACE ERROR RECOVERY The LM82 SMBus lines will be reset to the SMBus idle state if the SMBData or SMBCLK lines are held low for 40 ms or more (tTIMEOUT). The LM82 may or may not reset the state of the serial interface logic if either of the SMBData or SMBCLK lines are held low between 25 ms and 40 ms. TIMEOUT allows a clean recovery in cases where the master may be reset while the LM82 is transmitting a low bit thus preventing possible bus lock up. Whenever the LM82 sees the start condition its serial interface will reset to the beginning of the communication, thus the LM82 will expect to see an address byte next. This simplifies recovery when the master is reset while the LM82 is transmitting a high. LM82 Registers COMMAND REGISTER Selects which registers will be read from or written to. Data for this register should be transmitted during the Command Byte of the SMBus write communication. P7 P6 P5 P4 0 P3 P2 P1 P0 Command Select P0-P7: Command Select Command Select Address Power On Default State Register Name <P7:P0> hex <D7:D0> binary <D7:D0> decimal 00h 0000 0000 0 RLT Read Local Temperature 01h 0000 0000 0 RRT Read Remote Temperature 02h 0000 0000 0 RSR Read Status Register 03h 0000 0000 0 RC Read Configuration 04h 0000 0000 0 05h 0111 1111 127 RLHS 0111 1111 127 RRHS Reserved 06h Read Local HIGH Setpoint Reserved 07h 08h Read Remote HIGH Setpoint Reserved 09h 0000 0000 WC 0Ah Write Configuration Reserved 0Bh 0111 1111 127 WLHS 0111 1111 127 WRHS 0Ch Write Local HIGH Setpoint Reserved 0Dh 0Eh-2Fh 30h-31h 35h 0000 0000 0 0000 0000 0 0111 1111 127 0111 1111 127 0111 1111 127 Reserved Reserved for Future Use Reserved 36h-37h 38h Write Remote HIGH Setpoint Reserved for Future Use 32h-34h Reserved for Future Use Reserved 39h Reserved for Future Use 3Ah Reserved 3Bh-41h 42h Reserved for Future Use RTCS 43h-4Fh 14 Register Function Read T_CRIT Setpoint Reserved for Future Use Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 LM82 www.ti.com SNIS113D - JANUARY 2000 - REVISED MARCH 2013 Command Select Address Power On Default State Register Name <P7:P0> hex <D7:D0> binary <D7:D0> decimal 50h 0111 1111 127 0111 1111 127 0111 1111 127 Register Function Reserved 51h Reserved for Future Use 52h Reserved 53h-59h Reserved for Future Use 5Ah WTCS Write T_CRIT Setpoint 5Ch-6Fh and F0hFDh Reserved for Future Use FEh 0000 0001 1 RMID Read Manufacturers ID FFh 0000 0011 3 RSR Read Stepping or Die Revision Code LOCAL and REMOTE TEMPERATURE REGISTERS (LT, and RT) Table 1. LOCAL and REMOTE TEMPERATURE REGISTERS (LT, and RT) (Read Only Address 00h, and 01h): D7 D6 D5 D4 D3 D2 D1 D0 MSB Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 LSB D7-D0: Temperature Data. One LSB = 1C. Two's complement format. STATUS REGISTER Table 2. STATUS REGISTER (Read Only Address 02h): D7 D6 D5 D4 D3 D2 D1 D0 0 LHIGH 0 RHIGH 0 OPEN RCRIT LCRIT Power up default is with all bits "0" (zero). D0: LCRIT: When set to a 1 indicates an Local Critical Temperature alarm. D1: RCRIT: When set to a 1 indicates a Remote Diode Critical Temperature alarm. D2: D2OPEN: When set to 1 indicates a Remote Diode disconnect. D4: D2RHIGH: When set to 1 indicates a Remote Diode HIGH Temperature alarm. D6: LHIGH: When set to 1 indicates a Local HIGH Temperature alarm. D7, D5, and D3: These bits are always set to 0 and reserved for future use. MANUFACTURERS ID AND DIE REVISION (Stepping) REGISTERS MANUFACTURERS ID AND DIE REVISION (Stepping) REGISTERS (Read Address FEh and FFh) Default value 01h for Manufacturers ID(FEh ). CONFIGURATION REGISTER Table 3. CONFIGURATION REGISTER (Read Address 03h/Write Address 09h): D7 D6 D5 D4 D3 D2 D1 D0 INT mask 0 Remote T_CRIT_A mask Remote T_CRIT_A mask Remote T_CRIT_A mask Local T_CRIT_A mask INT Inversion 0 Power up default is with all bits "0" (zero). D7: INT mask: When set to 1 INT interrupts are masked. D5: T_CRIT mask, this bit must be set to a 1 before the T_CRIT setpoint is lowered below 127 in order for T_CRIT_A pin to function properly. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 15 LM82 SNIS113D - JANUARY 2000 - REVISED MARCH 2013 www.ti.com D4: T_CRIT mask for Remote temperature, when set to 1 a remote temperature reading that exceeds T_CRIT setpoint will not activate the T_CRIT_A pin. D3: T_CRIT mask, this bit must be set to a 1 before the T_CRIT setpoint is lowered below 127 in order for T_CRIT_A pin to function properly. D2: T_CRIT mask for Local reading, when set to 1 a Local temperature reading that exceeds T_CRIT setpoint will not activate the T_CRIT_A pin. D1: INT active state inversion. When INT Inversion is set to a 1 the active state of the INT output will be a logical high. A low would then select an active state of a logical low. D6 and D0: These bits are always set to 0 and reserved for future use. A write of 1 will return a 0 when read. LOCAL AND REMOTE HIGH SETPOINT REGISTERS (LHS, RHS) Table 4. LOCAL AND REMOTE HIGH SETPOINT REGISTERS (LHS, RHS) (Read Address 05h, 07h/Write Address 0Bh, 0Dh): D7 D6 D5 D4 D3 D2 D1 D0 MSB Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 LSB D7-D0: HIGH setpoint temperature data. Power up default is LHIGH = RHIGH=127C. T_CRIT REGISTER (TCS) Table 5. T_CRIT REGISTER (TCS) (Read Address 42h/Write Address 5Ah): D7 D6 D5 D4 D3 D2 D1 D0 MSB Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 LSB D7-D0: T_CRIT setpoint temperature data. Power up default is T_CRIT = 127C. 16 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 LM82 www.ti.com SNIS113D - JANUARY 2000 - REVISED MARCH 2013 SMBus Timing Diagrams Figure 11. (a) Serial Bus Write to the internal Command Register followed by a the Data Byte Figure 12. (b) Serial Bus Write to the internal Command Register Figure 13. (c) Serial Bus Read from a Register with the internal Command Register preset to desired value Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 17 LM82 SNIS113D - JANUARY 2000 - REVISED MARCH 2013 www.ti.com Application Hints The LM82 can be applied easily in the same way as other integrated-circuit temperature sensors and its remote diode sensing capability allows it to be used in new ways as well. It can be soldered to a printed circuit board, and because the path of best thermal conductivity is between the die and the pins, its temperature will effectively be that of the printed circuit board lands and traces soldered to the LM82's pins. This presumes that the ambient air temperature is almost the same as the surface temperature of the printed circuit board; if the air temperature is much higher or lower than the surface temperature, the actual temperature of the of the LM82 die will be at an intermediate temperature between the surface and air temperatures. Again, the primary thermal conduction path is through the leads, so the circuit board temperature will contribute to the die temperature much more strongly than will the air temperature. To measure temperature external to the LM82's die, use a remote diode. This diode can be located on the die of a target IC, allowing measurement of the IC's temperature, independent of the LM82's temperature. The LM82 has been optimized to measure the remote diode of a Pentium II processor as shown in Figure 14. A discrete diode can also be used to sense the temperature of external objects or ambient air. Remember that a discrete diode's temperature will be affected, and often dominated, by the temperature of its leads. Figure 14. Pentium or 3904 Temperature vs LM82 Temperature Reading Most silicon diodes do not lend themselves well to this application. It is recommended that a 2N3904 transistor base emitter junction be used with the collector tied to the base. A diode connected 2N3904 approximates the junction available on a Pentium microprocessor for temperature measurement. Therefore, the LM82 can sense the temperature of this diode effectively. ACCURACY EFFECTS OF DIODE NON-IDEALITY FACTOR The technique used in today's remote temperature sensors is to measure the change in VBE at two different operating points of a diode. For a bias current ratio of N:1, this difference is given as: where * 18 is the non-ideality factor of the process the diode is manufactured on, Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 LM82 www.ti.com SNIS113D - JANUARY 2000 - REVISED MARCH 2013 * * * * q is the electron charge, k is the Boltzmann's constant, N is the current ratio, T is the absolute temperature in K. (1) The temperature sensor then measures VBE and converts to digital data. In this equation, k and q are well defined universal constants, and N is a parameter controlled by the temperature sensor. The only other parameter is , which depends on the diode that is used for measurement. Since VBE is proportional to both and T, the variations in cannot be distinguished from variations in temperature. Since the non-ideality factor is not controlled by the temperature sensor, it will directly add to the inaccuracy of the sensor. For the Pentium II Intel specifies a 1% variation in from part to part. As an example, assume a temperature sensor has an accuracy specification of 3 C at room temperature of 25 C and the process used to manufacture the diode has a non-ideality variation of 1%. The resulting accuracy of the temperature sensor at room temperature will be: TACC = 3C + (1% of 298 K) = 6 C (2) The additional inaccuracy in the temperature measurement caused by , can be eliminated if each temperature sensor is calibrated with the remote diode that it will be paired with. PCB LAYOUT FOR MINIMIZING NOISE In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced on traces running between the remote temperature diode sensor and the LM82 can cause temperature conversion errors. The following guidelines should be followed: 1. Place a 0.1 F power supply bypass capacitor as close as possible to the VCCpin and the recommended 2.2 nF capacitor as close as possible to the D+ and D- pins. Make sure the traces to the 2.2nF capacitor are matched. 2. The recommended 2.2nF diode bypass capacitor actually has a range of 200pF to 3.3nF. The average temperature accuracy will not degrade. Increasing the capacitance will lower the corner frequency where differential noise error affects the temperature reading thus producing a reading that is more stable. Conversely, lowering the capacitance will increase the corner frequency where differential noise error affects the temperature reading thus producing a reading that is less stable. 3. Ideally, the LM82 should be placed within 10cm of the Processor diode pins with the traces being as straight, short and identical as possible. Trace resistance of 1 can cause as much as 1C of error. 4. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This GND guard should not be between the D+ and D- lines. In the event that noise does couple to the diode lines it would be ideal if it is coupled common mode. That is equally to the D+ and D- lines.(See Figure 15) 5. Avoid routing diode traces in close proximity to power supply switching signals or filtering inductors. 6. Avoid running diode traces close to or parallel to high speed digital and bus lines. Diode traces should be kept at least 2cm. apart from the high speed digital traces. 7. If it is necessary to cross high speed digital traces, the diode traces and the high speed digital traces should cross at a 90 degree angle. 8. The ideal place to connect the LM82's GND pin is as close as possible to the Processors GND associated with the sense diode. 9. Leakage current between D+ and GND should be kept to a minimum. One nano-ampere of leakage can cause as much as 1C of error in the diode temperature reading. Keeping the printed circuit board as clean as possible will minimize leakage current. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 19 LM82 SNIS113D - JANUARY 2000 - REVISED MARCH 2013 www.ti.com Figure 15. Ideal Diode Trace Layout Noise coupling into the digital lines greater than 300mVp-p (typical hysteresis), overshoot greater than 500mV above VCC, and undershoot less than 500mV below GND, may prevent successful SMBus communication with the LM82. SMBus no acknowledge is the most common symptom, causing unnecessary traffic on the bus. Although, the SMBus maximum frequency of communication is rather low (100kHz max) care still needs to be taken to ensure proper termination within a system with multiple parts on the bus and long printed circuit board traces. An R/C lowpass filter with a 3db corner frequency of about 40MHz has been included on the LM82's SMBCLK input. Additional resistance can be added in series with the SMBData and SMBCLK lines to further help filter noise and ringing. Minimize noise coupling by keeping digital traces out of switching power supply areas as well as ensuring that digital lines containing high speed data communications cross at right angles to the SMBData and SMBCLK lines. 20 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 LM82 www.ti.com SNIS113D - JANUARY 2000 - REVISED MARCH 2013 REVISION HISTORY Changes from Revision C (March 2013) to Revision D * Page Changed layout of National Data Sheet to TI format .......................................................................................................... 20 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM82 21 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) (6) LM82CIMQA/NOPB ACTIVE SSOP DBQ 16 95 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 82CI MQA LM82CIMQAX/NOPB ACTIVE SSOP DBQ 16 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 82CI MQA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 Addendum-Page 2 PACKAGE OUTLINE DBQ0016A SSOP - 1.75 mm max height SCALE 2.800 SHRINK SMALL-OUTLINE PACKAGE C SEATING PLANE .228-.244 TYP [5.80-6.19] A .004 [0.1] C PIN 1 ID AREA 16 1 14X .0250 [0.635] 2X .175 [4.45] .189-.197 [4.81-5.00] NOTE 3 8 9 B .150-.157 [3.81-3.98] NOTE 4 16X .008-.012 [0.21-0.30] .007 [0.17] C A B .069 MAX [1.75] .005-.010 TYP [0.13-0.25] SEE DETAIL A .010 [0.25] GAGE PLANE .004-.010 [0.11-0.25] 0 -8 .016-.035 [0.41-0.88] (.041 ) [1.04] DETAIL A TYPICAL 4214846/A 03/2014 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 inch, per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MO-137, variation AB. www.ti.com EXAMPLE BOARD LAYOUT DBQ0016A SSOP - 1.75 mm max height SHRINK SMALL-OUTLINE PACKAGE 16X (.063) [1.6] SEE DETAILS SYMM 1 16 16X (.016 ) [0.41] 14X (.0250 ) [0.635] 9 8 (.213) [5.4] LAND PATTERN EXAMPLE SCALE:8X METAL SOLDER MASK OPENING SOLDER MASK OPENING .002 MAX [0.05] ALL AROUND METAL .002 MIN [0.05] ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4214846/A 03/2014 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBQ0016A SSOP - 1.75 mm max height SHRINK SMALL-OUTLINE PACKAGE 16X (.063) [1.6] SYMM 1 16 16X (.016 ) [0.41] SYMM 14X (.0250 ) [0.635] 9 8 (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.127 MM] THICK STENCIL SCALE:8X 4214846/A 03/2014 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. 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