General Description
The AAT1171 SwitchReg, a member of Analogic-
Tech's Total Power Management IC™ (TPMIC™)
product family, has been specifically designed to
dynamically control the operating voltage of a
WCDMA or CDMA power amplifier inside single
lithium-ion battery-powered systems. The AAT1171
outputs a voltage between 0.6V and 3.6V, thereby
optimizing the amplifier efficiency at both low and
high transmit levels.
The AAT1171 output voltage is controlled via an
analog signal from the baseband processor. It can
deliver 600mA of continuous load current while
maintaining a low 45µA of no load quiescent current.
The 2MHz switching frequency minimizes the size of
external components while keeping switching losses
low. A low resistance MOSFET, typically 230mΩ,
provides a low dropout voltage as the battery input
voltage approaches the programmed output voltage
and the converter runs at 100% duty cycle. To fur-
ther improve system efficiency, an 85mΩbypass
MOSFET transistor is also included to allow the PA
to be powered directly from the battery.
The AAT1171 feedback and control method gives
excellent load regulation and transient response
while maintaining small external components. The
output voltage responds in less than 30µs. The con-
verter can be synchronized to an external system
clock, forced to operate in Light Load (LL) mode for
highest efficiency at light loads, or in Pulse Width
Modulation (PWM) mode for low noise operation.
The AAT1171 is available in a Pb-free, space-sav-
ing TDFN33-12 package and is rated over the
-40°C to +85°C temperature range.
Features
•V
IN Range: 2.7V to 5.5V
• Variable Output Voltage: 0.6V to 3.6V
• 600mA Output Current
• DAC Input: 0.2V to 1.2V
• High Output Accuracy: ±3%
• 45µA No Load Quiescent Current
• Internal Soft Start Limits Startup Current and
Output Voltage Overshoot
• Synchronizable to External 19.8MHz System
Clock
• Over-Temperature and Current Limit Protection
• Integrated 85mΩBypass MOSFET
• 2MHz Operation
• PWM/LL Control with Override
• Fast 150µs Start-Up
• 3x3mm 12-Pin TDFN Package
• Temperature Range: -40°C to +85°C
Applications
• WCDMA or CDMA PA in Cellular Phones,
Smartphones, Feature Phones, etc.
• Express Card
• PCMCIA Data Cards
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
Typical Application
AAT1171
PA
V
REF
V
CC2
V
CC2
V
CONT
Baseband
Processor
TX
RX
DAC
0.6V - 3.6V
LX
VOUT
GNDx2
DAC
VIN
10µF
4.7µF
2.2µH
EN
MODE/SYNC
BYPASS
VCC
–
1171.2006.06.1.0 1
SwitchReg™
Pin Descriptions
Pin Configuration
TDFN33-12
(Top View)
N/C
VOUT
VOUT
1
VCC
A
GND
DAC
LX
PGND
VIN
MODE/SYNC
BYPASS
EN
2
3
4
5
6
12
11
10
9
8
7
Pin # Symbol Function
1 N/C Not connected.
2, 3 VOUT Feedback input pin. This pin is connected to the converter output. It is used to complete
the control loop, regulating the output voltage to the desired value. When in bypass
mode, a low resistance MOSFET is connected between this pin and VIN.
4 VCC Bias supply. Supply power for the internal circuitry. Connect to input power via low pass
filter with decoupling to AGND.
5 AGND Analog ground. Connect the return of all small signal components to this pin.
6 DAC Control voltage input from a DAC. Input voltage between 0.2V and 1.2V to control output
voltage of the converter. Force pin to 1.3V for bypass switch enable.
7 EN Enable DC/DC converter, active high.
8 BYPASS Enable control to bypass the DC/DC converter when PA transmitting at full power from
low battery voltage. Active high.
9 MODE/SYNC This pin is used to program the device between PWM and LL mode:
HIGH - PWM Mode Only
LOW - LL Mode: PWM operation for loads above 100mA and variable switching frequen-
cy for loads below 100mA
Connecting the SYNC pin to the system clock (19.8MHz) will override the internal clock
and force the switching frequency to the external clock frequency divided by 10.
10 VIN Input supply voltage for the converter. Must be closely decoupled.
11 PGND Main power ground. Connect to the output and input capacitor return.
12 LX Switching node. Connect the inductor to this pin. It is connected internally to the drain of
both low- and high-side MOSFETs.
EP Exposed paddle (bottom). Connect to ground directly beneath the package.
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
21171.2006.06.1.0
Absolute Maximum Ratings1
Thermal Information2
Symbol Description Value Units
PDMaximum Power Dissipation, TA= 25°C 2.3 W
θJA Thermal Resistance, TA= 25°C 50 °C/W
Symbol Description Value Units
VCC, VIN Input Voltage and Bias Power to GND 6.0 V
VLX LX to GND -0.3 to VIN + 0.3 V
VOUT VOUT to GND -0.3 to VIN + 0.3 V
VNEN, DAC, BYPASS, MODE/SYNC to GND -0.3 to 6.0 V
TJOperating Junction Temperature Range -40 to 150 °C
TLEAD Maximum Soldering Temperature (at leads, 10 sec) 300 °C
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
1171.2006.06.1.0 3
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at condi-
tions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.
2. Mounted on an FR4 board.
Electrical Characteristics1
TA= -40°C to +85°C, unless otherwise noted. VIN = VCC = 3.6V; typical values are TA= 25°C.
Symbol Description Conditions Min Typ Max Units
VIN Input Voltage 2.7 5.5 V
VUVLO
UVLO Threshold VIN Rising 2.6 V
UVLO Hysteresis 200 mV
VOUT VOUT Programmable Range 0.6 3.6 V
VDACIN Input Voltage Range from DAC 0.2 1.2 V
IQQuiescent Current No Load, Light Load 45 70 µA
No Load, PWM, VCC Bias Current 420
ISHDN Shutdown Current EN = AGND = PGND 1.0 µA
ILIM P-Channel Current Limit TA= 25°C 1.2 1.6 A
RDS(ON)H High Side Switch On Resistance 230 mΩ
RDS(ON)L Low Side Switch On Resistance 230 mΩ
RDS(ON)BP Bypass Switch Resistance VDAC = 1.3V or BYPASS = VIN 85 mΩ
ILXLEAK LX Leakage Current VCC = 5.5V, VLX = 0 to VCC 1µA
ΔVOUT/VOUT Load Regulation ILOAD = 0 to 500mA 0.5 %
ΔVOUT/
VOUT*ΔVIN
Line Regulation 0.2 %/V
ROUT Feedback Impedance 170 kΩ
VOUT Output Voltage Accuracy VDAC = 0.6V, ILOAD = 0 1.746 1.8 1.854 V
FOSC Oscillator Frequency 2.0 MHz
TSD
Over-Temperature Shutdown 140 °C
Threshold
THYS
Over-Temperature Shutdown 15 °C
Hysteresis
ILL Light Load Load Current Threshold 100 mA
tVOUTS Output Voltage Settling Time VOUT = 0.6V to VOUT(MAX), 30 µs
MODE/SYNC = VIN
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
41171.2006.06.1.0
1. The AAT1171 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured
by design, characterization, and correlation with statistical process controls.
Electrical Characteristics1
TA= -40°C to +85°C, unless otherwise noted. VIN = VCC = 3.6V; typical values are TA= 25°C.
Symbol Description Conditions Min Typ Max Units
PWM/Light Load/EN
VEN(L) Enable Threshold Low 0.6 V
VEN(H) Enable Threshold High 1.4 V
IEN Input Low Current VCC = 5.5V -1.0 1.0 µA
tEN Turn-On Enable Response Time EN = Low to High, MODE/SYNC = 150 µs
High, VDAC = 1.2V
SYNC
FSYNC Synchronization Frequency Sync to 19.8MHz219.8 MHz
VSYNC(H) SYNC High Level Threshold 1.6 V
VSYNC(L) SYNC Low Level Threshold 0.6
ISYNC SYNC Low Current VSYNC = GND or VCC -1.0 1.0 µA
DAC Input
Gain Output Voltage/DAC Voltage33 V/V
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
1171.2006.06.1.0 5
1. The AAT1171 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured
by design, characterization, and correlation with statistical process controls.
2. Please contact Sales for other synchronization frequencies.
2. Please contact Sales for other output voltage/DAC voltage gains.
Typical Characteristics
Load Regulation
(LL Mode; V
OUT
= 2.5V)
Output Current (mA)
Output Voltage Error (%)
-1.0
-0.5
0.0
0.5
1.0
0.1 1 10 100 1000
V
IN
= 5.0V
V
IN
= 4.2V
V
IN
= 3.0V
Efficiency vs. Output Current
(LL Mode; V
OUT
= 2.5V)
Output Current (mA)
Efficiency (%)
40
50
60
70
80
90
100
0.1 1 10 100 1000
V
IN
= 3.0V
V
IN
= 4.2V
V
IN
= 5.0V
Load Regulation
(PWM Mode; V
OUT
= 3.3V)
Output Current (mA)
Output Voltage Error (%)
-1.0
-0.5
0.0
0.5
1.0
0.1 1 10 100 100
0
V
IN
= 5.0V
V
IN
= 4.2V
V
IN
= 3.6V
Efficiency vs. Output Current
(PWM Mode; V
OUT
= 3.3V)
Output Current (mA)
Efficiency (%)
0
10
20
30
40
50
60
70
80
90
100
0.1 1 10 100 1000
V
IN
= 3.6V
V
IN
= 5.0V
V
IN
= 4.2V
Efficiency vs. Output Current
(LL Mode; V
OUT
= 3.3V)
Output Current (mA)
Efficiency (%)
40
50
60
70
80
90
100
0.1 1 10 100 1000
V
IN
= 5.0V
V
IN
= 4.2V
V
IN
= 3.9V
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
61171.2006.06.1.0
Typical Characteristics
Load Regulation
(PWM Mode; VOUT = 1.8V)
Output Current (mA)
Output Voltage Error (%)
-1.0
-0.5
0.0
0.5
1.0
0.1 1 10 100 1000
VIN = 3.6V
VIN = 4.2V
VIN = 2.7V
Efficiency vs. Output Current
(PWM Mode; V
OUT
= 1.8V)
Output Current (mA)
Efficiency (%)
0
10
20
30
40
50
60
70
80
90
100
0.1 1 10 100 1000.
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.2V
Load Regulation
(LL Mode; V
OUT
= 1.8V)
Output Current (mA)
Output Voltage Error (%)
-1.0
-0.5
0.0
0.5
1.0
0 1 10 100 1000
V
IN
= 3.6V
V
IN
= 2.7V
V
IN
= 4.2V
Efficiency vs. Output Current
(LL Mode; V
OUT
= 1.8V)
Output Current (mA)
Efficiency (%)
30
40
50
60
70
80
90
100
0.1 1 10 100 1000
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.6V
Load Regulation
(PWM Mode; VOUT = 2.5V)
Output Current (mA)
Output Voltage Error (%)
-1.0
-0.5
0.0
0.5
1.0
0.1 1 10 100 1000
VIN = 5.0V
VIN = 4.2V
VIN = 3.0V
Efficiency vs. Output Current
(PWM Mode; V
OUT
= 2.5V)
Output Current (mA)
Efficiency (%)
0
10
20
30
40
50
60
70
80
90
100
0.1 1 10 100 1000
V
IN
= 3.0V
V
IN
= 4.2V
V
IN
= 5.0V
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
1171.2006.06.1.0 7
Typical Characteristics
Supply Current vs. Supply Voltage
(No Load; PWM Mode)
Supply Voltage (V)
Supply Current (mA)
3.0
3.5
2.0
2.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
VOUT = 1.8V
VOUT = 0.6V
Supply Current vs. Supply Voltage
(No Load; LL Mode)
Supply Voltage (V)
Supply Current (µA)
30
35
40
45
50
55
60
65
70
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
V
OUT
= 1.8V
V
OUT
= 0.6V
Bypass Mode Dropout Voltage
vs. Load Current
Load Current (mA)
Dropout Voltage (V)
-0.30
-0.25
-0.20
-0.15
-0.10
-0.05
0.00
0.05
0.1 1 10 100 1000
Output Voltage vs. Temperature
(V
IN
= 3.6V; V
OUT
= 1.8V; V
DAC
= 0.6V; R
L
= 10)
Temperature (°
°
C)
Output Voltage Error (%)
-1.5
-1.0
-0.5
0.0
0.5
1.0
-40 -15 10 35 60 85
Output Voltage vs. Supply Voltage
(PWM Mode; V
OUT
= 1.5V)
Supply Voltage (V)
Output Voltage (V)
1.494
1.498
1.502
1.506
1.510
1.514
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
I
OUT
= 50mA
I
OUT
= 300mA
I
OUT
= 600mA
Output Voltage vs. Supply Voltage
(LL Mode; V
OUT
= 1.5V)
Supply Voltage (V)
Output Voltage (V)
1.494
1.498
1.502
1.506
1.510
1.514
2.7 2.9 3.1 3.3 3..5 3.7 3..9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
I
OUT
= 50mA
I
OUT
= 300mA
I
OUT
= 600mA
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
81171.2006.06.1.0
Typical Characteristics
Heavy Load Switching Waveform
(V
IN
= 3.6V; V
OUT
= 1.8V; R
L
= 3Ω; C
OUT
= 4.7µF; L = 2.2µH)
Time (200ns/div)
V
OUT
(AC coupled)
20mV/div
I
L
200mA/div
V
LX
2V/div
0
0
Output Voltage vs. DAC Voltage
(V
IN
= 4.2V; LL Mode)
DAC Voltage (V)
Output Voltage (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.2 0.4 0.6 0.8 1.0 1.2 1.4
25°C
85°C
-40°C
Switching Frequency vs. Temperature
(V
IN
= 3.6V; V
OUT
= 1.8V; R
L
= 10)
Temperature (°
°
C)
Switching Frequency (MHz)
1.90
1.92
1.94
1.96
1.98
2.00
2.02
2.04
2.06
-40.0 -20.0 0.0 20.0 40.0 60.0 80.0
LL
PWM
Bypass R
DS(ON)
vs. Input Voltage
Input Voltage (V)
R
DS(ON)
(mΩ
Ω
)
0
20
40
60
80
100
120
140
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
T
J
= 25°C
T
J
= 85°C
T
J
= 120°C
P-Channel R
DS(ON)
vs. Input Voltage
Input Voltage (V)
R
DS(ON)
(mΩ
Ω
)
2.7 3.1 3.5 3.9 4.5 4.9 5.52.9 3.3 3.7 4.1 4.3 4.7 5.1 5.3
0
50
100
150
200
250
300
350
400
T
J
= 120°CT
J
= 85°C
T
J
= 25°C
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
1171.2006.06.1.0 9
Typical Characteristics
Bypass Transient Response
(LL Mode; V
IN
= 3.6V; R
L
= 10Ω; C
OUT
= 4.7µF; L = 2.2µH)
Time (25µs/div)
V
OUT
1V/div
V
BYP
1V/div
0
0
3.5V
0.6V
Bypass Transient Response
(PWM Mode; V
IN
= 3.6V; R
L
= 10Ω; C
OUT
= 4.7µF; L = 2.2µH)
Time (25µs/div)
V
OUT
1V/div
V
BYP
1V/div
0
0
3.5V
0.6V
DAC Transient Response in LL Mode
(V
IN
= 3.6V; R
L
= 10Ω; C
OUT
= 4.7µF; L = 2.2µH)
Time (25µs/div)
V
OUT
1V/div
V
DAC
0.5V/div
0
0
3.3V
0.6V
1.2V
0.2V
Light Load Switching Waveform
(LL Mode; V
IN
= 4.2V; V
OUT
= 0.6V; R
L
= 10Ω;
C
OUT
= 4.7µF; L = 2.2µH)
Time (1µs/div)
V
OUT
(AC coupled)
20mV/div
I
L
200mA/div
V
LX
2V/div
0
0
Light Load Switching Waveform
(PWM Mode; V
IN
= 4.2V; V
OUT
= 0.6V; R
L
= 10Ω;
C
OUT
= 4.7µF; L = 2.2µH)
Time (200ns/div)
V
OUT
(AC coupled)
20mV/div
I
L
100mA/div
V
LX
2V/div
0
0
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
10 1171.2006.06.1.0
Typical Characteristics
Line Transient Response
(V
OUT
= 1.5V; R
L
= 10Ω
Ω
; C
OUT
= 4.7µF; L = 2.2µH)
Time (50µs/div)
V
OUT
(AC coupled)
50mV/div
V
IN
0.5V/div
3.6V
3.0V
1.56V
1.44V
Load Transient Response
(V
IN
= 3.6V; V
OUT
= 1.8V; C
OUT
= 4.7µF; L = 2.2µH)
Time (20µs/div)
V
OUT
(AC coupled)
20mV/div
I
OUT
100mA/div
200mA
500mA
1.914V
1.798V
Load Transient Response
(V
IN
= 4.2V; V
OUT
= 3.3V; C
OUT
= 4.7µF; L = 2.2µH)
Time (20µs/div)
V
OUT
(AC coupled)
20mV/div
I
OUT
200mA/div
525mA
250mA
3.51V
3.26V
Enable Soft Start
(V
IN
= 3.6V; V
OUT
= 1.8V; R
L
= 4.5Ω;
C
OUT
= 4.7µF; L = 2.2µH)
Time (50µs/div)
V
OUT
1V/div
Enable
2V/div
I
IN
200mA/div
0
0
0
1.8V
DAC to Bypass Transient Response
(LL Mode; V
IN
= 4.2V; R
L
= 10Ω; C
OUT
= 4.7µF; L = 2.2µH)
Time (25µs/div)
V
OUT
1V/div
V
DAC
0.5V/div
0
0
0.6V
4.2V
1.3V
0.2V
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
1171.2006.06.1.0 11
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
12 1171.2006.06.1.0
Functional Block Diagram
Logic
DH
DL
Comp
Error
Amp
VOUT VCC VIN
L
X
AGND PGND
DAC
EN
BYPASS
MODE/SYNC
MODE/SYNC
Interface
Functional Description
The AAT1171 is a 600mA 2MHz peak current mode
synchronous step-down (buck) converter designed
to operate from a single-cell lithium-ion battery with
a 2.7V to 4.2V input range. The output voltage is
dynamically programmed by the DAC input voltage.
To maximize converter efficiency over all load con-
ditions, the converter automatically transitions to a
variable frequency light load (LL) mode when the
load is less than 100mA. When combined with the
very low quiescent current, the LL mode maintains
a high efficiency over the complete load range. For
noise sensitive applications, the converter can be
forced into a fixed frequency PWM mode.
Provisions are also made for synchronization of the
converter to an external system clock.
The synchronous buck converter power output
devices are sized at 230mΩfor a 600mA full load
output current. In addition to the converter output,
an additional low resistance bypass MOSFET
(85mΩ) can be connected between the battery
input and the converter output (VIN to VOUT),
bypassing the converter and output inductor to
improve headroom and extend the WCDMA PA full
power range. This reduces the battery voltage nec-
essary for a WCDMA RF power amplifier to meet
linearity requirements, thus extending operating
time. In dual mode systems, the bypass mode may
also be used when the WCDMA RF power amplifi-
er is in GSM mode. Bypass mode is activated by
setting the bypass input high or by forcing the
baseband DAC output voltage to 1.3V.
The AAT1171 requires only three external compo-
nents for operation (CIN, COUT, LX). The high 2MHz
switching frequency reduces the inductor size
required to 2.2µH. This reduces the DC resistance
and improves the converter efficiency while mini-
mizing the inductor footprint and height. The output
voltage of the converter is regulated to within 0.5%
and will settle in less than 30µs (according to
WCDMA specifications) in response to any step
change in the DAC input.
Under-voltage lockout, internal compensation, soft-
start, over-current, and over-temperature protec-
tion are also included.
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
1171.2006.06.1.0 13
DAC Output Voltage Control
The output voltage is programmed by way of the
DAC input voltage. The DAC to output gain for the
AAT1171 is 3.
The DAC input voltage range is 0.2V to 1.2V, which
corresponds to an output voltage range of 0.6V to
3.6V (see Figure 1). For a 1.3V DAC level, the
bypass switch is activated and the output voltage
level is equivalent to the input voltage minus the
bypass MOSFET (RDS(ON)(bp)) drop.
Bypass Mode
In bypass mode, the AAT1171 bypasses the output
inductor, connecting the input directly to the output
through a low RDS(ON) 85mΩMOSFET. Bypass
mode is initiated by applying 1.3V to the DAC input
or by applying a logic high to the bypass input.
When not activated, a logic level low must be
applied to the bypass input pin. The bypass MOS-
FET current is limited to 600mA.
LL/PWM Control
Two control modes are available with the AAT1171:
LL mode and PWM mode. PWM mode maintains a
fixed switching frequency regardless of load. The
fixed switching frequency gives the advantage of
lower output ripple and simplified output and input
noise filtering. PWM mode also provides a faster
output voltage response to changes in the DAC
voltage.
In LL mode, the converter transitions to a variable
switching frequency as the load decreases below
100mA. Above 100mA, where switching losses no
longer dominate, the switching frequency is fixed.
The LL mode's effect on the DAC to output voltage
response time is most notable when transitioning
from a high output voltage to a low voltage. When
the converter is in PWM mode, the inductor current
can be reversed and the output voltage actively
discharged by the synchronous MOSFET. While in
LL mode, the output voltage is discharged by the
load only, resulting in a slower response to a DAC
transition from a high to a low voltage.
For PWM mode, apply a logic level high to the
MODE/SYNC pin; for LL mode, apply a logic level
low to the MODE/SYNC pin.
V
OUT
= 3 · V
DAC
Figure 1: VOUT vs. VDAC.
1V
2V
3V
4V
3.6V
1V 1.2V
DAC Output
Output to PA
0.6V
0.2V
V
IN
1.3V
BYPASS MODE
Soft Start/Enable
The AAT1171 soft-start control prevents output volt-
age overshoot and limits inrush current when either
the input power or the enable input is applied.
When pulled low, the enable input forces the con-
verter into a low-power, non-switching state with
less than 1µA bias current.
Low Dropout Operation
For conditions where the input voltage drops to the
output voltage level, the converter duty cycle
increases to 100%. As 100% duty cycle is
approached, the minimum off-time initially forces
the high-side on-time to exceed the 2MHz clock
period, reducing the converter switching frequency.
Once the input drops to the level where the output
can no longer be regulated, the high-side P-chan-
nel MOSFET is enabled continuously for 100%
duty cycle. The output voltage then tracks the input
voltage minus the IR drop of the high side P-chan-
nel MOSFET RDS(ON).
UVLO Shutdown
Under-voltage lockout (UVLO) circuitry monitors
the input voltage and disables the converter when
the input voltage drops to 2.4V, guaranteeing suffi-
cient operating input voltage to maintain output
voltage regulation and control. For a rising input
voltage, the UVLO circuitry enables the converter
200mV above the shutdown level at 2.6V.
Current Limit and Short-Circuit
Protection
The high-side P-channel MOSFET current limit
comparator limits the peak inductor current to 1.6A.
In PWM mode, the synchronous MOSFET current
limit comparator limits the peak negative inductor
current, and output capacitor discharge current is
limited to 1A. In bypass mode, the bypass MOS-
FET current is limited to 600mA. In the event of an
overload or short-circuit condition, the current limit
protects the load and the AAT1171 power devices.
Upon removal of the short-circuit or fault condition,
the AAT1171 output automatically recovers to the
regulated level.
Thermal Overload Protection
The maximum junction temperature is limited by
the AAT1171 over-temperature shutdown protec-
tion circuitry. Both the step-down converter and the
bypass MOSFET are disabled when the junction
temperature reaches 140°C. Normal operation
resumes once the junction temperature drops to
125°C.
External Synchronization
The AAT1171 switching frequency can be synchro-
nized to an external square wave clock via the
MODE/SYNC input. The external clock frequency
range and logic levels for which the AAT1171 will
remain synchronized are listed in the Electrical
Characteristics table of this datasheet.
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
14 1171.2006.06.1.0
Applications Information
Inductor Selection
The step-down converter uses peak current mode
control with slope compensation to maintain stabil-
ity for duty cycles greater than 50%. Because the
required slope compensation varies with output
voltage, the AAT1171 varies the slope compensa-
tion to match the output voltage. This allows the
use of a single inductor value for all output voltage
levels. For the AAT1171, this value is 2.2µH.
Manufacturer's specifications list both the inductor
DC current rating, which is a thermal limitation, and
the peak current rating, which is determined by the
saturation characteristics.
The inductor should not show any appreciable sat-
uration under normal load conditions. The inductor
ripple current varies with both the input voltage and
the output voltage and peaks at the maximum input
voltage with the output at one half of the input volt-
age. For the typical AAT1171, this corresponds to a
4.2V input voltage and a 2.1V output voltage. With
the suggested 2.2µH inductor, this corresponds to
239mA peak-to-peak ripple current. For a 600mA
DC load current, the peak inductor current would
be 718mA. In order to prevent saturation under
normal load conditions, the peak inductor current
should be less than the inductor saturation current.
Some inductors may meet peak and average cur-
rent requirements yet result in excessive losses
due to a high DCR. Always consider the losses
associated with the DCR and its effect on the total
converter efficiency when selecting an inductor.
The inductor losses can be estimated by using the
full load output current. The output inductor losses
can then be calculated to estimate their effect on
overall device efficiency.
The 2.2µH inductor selected for the AAT1171 eval-
uation board has a 140mΩDCR and a 0.91A DC
current rating. At 600mA load current, the inductor
loss is 50mW which gives 2.4% loss in efficiency
for a 600mA 3.4V output voltage with an inductor
that measures 3.2x3.2x1.2mm.
Output Capacitor Selection
The AAT1171 is designed for use with a 4.7µF 10V
X5R ceramic output capacitor. Although a larger
output capacitor provides improved response to
large load transients, it also limits the output volt-
age rise and fall time in response to the DAC input.
For stable operation, with sufficient phase and gain
margin, the internal voltage loop compensation lim-
its the minimum output capacitor value to 4.7µF.
Increased output capacitance will reduce the
crossover frequency with greater phase margin.
The output voltage droop due to load transients is
dominated by the output capacitor. During a step
increase in load current, the output capacitor sup-
plies the load current while the control loop
responds. Within two or three switching cycles, the
inductor current increases to match the load cur-
rent demand. The relationship of the output voltage
droop during the three switching cycles to the out-
put capacitance can be estimated by:
Once the average inductor current increases to the
DC load level, the output voltage recovers. The
above equation establishes a limit on the minimum
output capacitor value necessary to meet a given
output voltage droop requirement (VDROOP) for a
given load transient.
C
OUT
=
3
·
ΔI
LOAD
V
DROOP
·
F
S
P
O
P
O
+ PL
3.4 ⋅ 0.6A
3.4V ⋅ 0.6A + 50mW
ηL = = = 97%
PL = I
O2
⋅ DCR = 0.6A
2
⋅ 0.14Ω = 50mW
V
IN(MAX)
8 ⋅ L ⋅ F
S
4.2V
8 ⋅ 2.2µH ⋅ 2MHz
I
PK(MAX)
= I
O
+
= 0.6A +
= 0.6A + 0.12A
= 0.72A
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
1171.2006.06.1.0 15
The maximum output capacitor RMS ripple current is:
Dissipation due to the RMS current in the ceramic
output capacitor ESR is typically minimal, resulting in
less than a few degrees rise in hot-spot temperature.
Input Capacitor Selection
A 10V X5R or X7R ceramic capacitor is suggested
for the input capacitor with typical values ranging
from 4.7µF to 10µF. To estimate the required input
capacitance size, determine the acceptable input
ripple level (VPP) and solve for C, as shown below.
The calculated value varies with input voltage and
is a maximum when VIN is double the output volt-
age. Always examine the ceramic capacitor DC
voltage coefficient characteristics when selecting
the proper value. For example, due to the voltage
coefficient of a 10µF 6.3V X5R ceramic capacitor,
with an applied voltage of 5V DC the capacitance
decreases to 6µF.
The maximum input capacitor RMS current is:
The input capacitor RMS ripple current varies with
the input and output voltage and will always be less
than or equal to half of the total DC load current.
The term appears in both the input
voltage ripple and input capacitor RMS current
equations and is a maximum when VIN is twice Vo;
therefore, the input voltage ripple and the input
capacitor RMS current ripple are a maximum at
50% duty cycle.
The input capacitor provides a low impedance loop
for the edges of pulsed current drawn by the
AAT1171. Low ESR/ESL X7R and X5R ceramic
capacitors are ideal for this function. To minimize
stray inductance, the capacitor should be placed as
closely as possible to the IC. This keeps the high
frequency content of the input current localized,
minimizing EMI and input voltage ripple.
The proper placement of the input capacitor (C1)
can be seen in the evaluation board layout in
Figure 3.
A laboratory test set-up typically consists of two long
wires running from the bench power supply to the
evaluation board input voltage pins. The inductance
of these wires, along with the low-ESR ceramic input
capacitor, can create a high Q network that may
affect converter performance. This problem often
becomes apparent in the form of excessive ringing
in the output voltage during load transients with
errors in loop phase and gain measurements.
Since the inductance of a short PCB trace feeding
the input voltage is significantly lower than the
power leads from the bench power supply, most
applications do not exhibit this problem.
⎛⎞
· 1
-
⎝⎠
V
O
V
IN
V
O
V
IN
I
O
RMS(MAX)
I2
=
⎛⎞
· 1
-
= D
· (1 - D) = 0.5
2
=
⎝⎠
V
O
V
IN
V
O
V
IN
1
2
for
V
IN
= 2
·
V
O
⎛⎞
I
RMS
= I
O
· · 1
-
⎝⎠
V
O
V
IN
V
O
V
IN
C
IN(MIN)
= 1
⎛⎞
- ESR
·
4
·
F
S
⎝⎠
V
PP
I
O
⎛⎞
· 1
-
=
⎝⎠
V
O
V
IN
V
O
V
IN
1
4
V
IN
= 2
·
V
O
⎛⎞
· 1
-
⎝⎠
V
O
V
IN
C
IN
=
V
O
V
IN
⎛⎞
- ESR
·
F
S
⎝⎠
V
PP
I
O
1
23
V
OUT
· (V
IN(MAX)
- V
OUT
)
RMS(MAX)
IL
·
F
S
·
V
IN(MAX)
=·
·
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
16 1171.2006.06.1.0
In applications where the input power source lead
inductance cannot be reduced to a level that does
not affect the converter performance, a high ESR
tantalum or aluminum electrolytic capacitor (C3 of
Figure 4) should be placed in parallel with the low
ESR, ESL bypass ceramic capacitor. This damp-
ens the high Q network and stabilizes the system.
DAC Programming Gain
The output voltage is dynamically controlled by the
DAC input voltage. The DAC to output gain is fixed
at 3. The typical response time for a 0.2V to 1.2V
pulsed signal on the DAC input is less than 30µs.
The DAC gain can be reduced by an external resis-
tive divider at the DAC input, as shown in the eval-
uation board schematic in Figure 2. For a DAC to
output gain of 2 and R2 at 10kΩ, R1 is 4.99kΩ.
Thermal Calculations
There are three types of losses associated with the
AAT1171 step-down converter: switching losses,
conduction losses, and quiescent current losses.
Conduction losses are associated with the RDS(ON)
characteristics of the power MOSFET devices.
Switching losses are dominated by the gate charge
of the power MOSFET devices. The AAT1171 main
and synchronous power MOSFETs are sized to
have similar RDS(ON) values that track with the input
voltage. At full load, assuming continuous conduc-
tion mode (CCM), a simplified form of the step-
down converter losses is given by:
IQis the step-down converter quiescent current.
The term tsw is used to estimate the full load switch-
ing losses, which are dominated by the gate charge
losses.
P
TOTAL
= I
O
2
· R
DS(ON)
+ (t
SW
· F
S
· I
O
+ I
Q
) · V
IN
(3- G
DAC
)R2
G
DAC
(3 - 2)10kΩ
2
R1 = = = 4.99kΩ
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
1171.2006.06.1.0 17
Figure 2: AAT1171 Evaluation Board Schematic.
2.2µH
L1
4.7µF
C2
BYPASS
4.7µF
C1
123 321123
ENABLE
V
OUT
DAC
VOUT
2
N/C
1
PGND
11
EN
7
BYPASS
8
VIN
10
VOUT
3
LX
12
MODE/SYNC
9
DAC
6
AGND
5
VCC
4
AAT1171
U1
V
IN
GND
L1 SD3112-2R2 or LPF2010-2R2
C1, C
OUT
4.7µF 10V 0805
SYNC
R1 R2
GND
PWMLL
On OffOnOff
For the condition where the buck converter is at
100% duty cycle dropout, the total device dissipa-
tion reduces to:
In bypass mode, the bypass MOSFET RDS(ON)(bp) is
used to determine the losses. The power MOSFET
RDS(ON) increases with decreasing input voltage
and the associated losses are a maximum at the
minimum input voltage (2.7V).
Since the RDS(ON), quiescent current, and switching
losses all vary with input voltage, the total losses
should be investigated over the complete input
voltage range.
After calculating the total losses, the maximum
junction temperature can be derived from the θJA
for the TDFN33-12 package which is typically
50°C/W.
Layout
The suggested PCB layout for the AAT1171 is
shown in Figures 3 and 4. The following guidelines
should be used to ensure a proper layout.
1. The input capacitor (C1) should connect as
closely as possible to VIN (Pin 10) and PGND
(Pin 11).
2. C2 and L1 should be connected as closely as
possible. The connection of L1 to the LX pin
should be as short as possible.
3. The PCB trace connected to VOUT (Pins 2 and
3) is tied to the bypass path, as well as the feed-
back path for the control loop. In bypass mode,
the full load current is delivered directly from the
battery input; therefore, this trace should be suf-
ficient to handle current up to the bypass current
limit level.
4. The resistance of the trace from the load return
to PGND (Pin 11) should be kept to a minimum.
This minimizes any error in DC regulation due to
differences in the potential of the internal signal
ground and the power ground.
5. For good thermal coupling, PCB vias are required
from the pad for the TDFN exposed paddle to the
ground plane. The via diameter should be 0.3mm
to 0.33mm and positioned on a 1.2mm grid.
T
J(MAX)
=
P
TOTAL
·
Θ
JA
+ T
AMB
P
TOTAL
= I
O
2
· R
DS(ON)(bp)
+ I
Q
· V
IN
P
TOTAL
= I
O
2
· R
DS(ON)
+ I
Q
· V
IN
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
18 1171.2006.06.1.0
Figure 3: AAT1171 Evaluation Board Figure 4: AAT1171 Evaluation Board
Top Side Layout. Bottom Side Layout.
PA Step-Down Converter Design Example
Specifications
VO(BUCK) 0.6V to 3.4V with RL=10Ω
VIN 2.7V to 4.2V (3.6V nominal)
FS2.0MHz
TAMB 85°C
Output Inductor
L1 = 2.2µH
For Copper Electronics SD3112, 2.2µH, DCR = 140mΩ.
The maximum inductor ripple current occurs at 50% duty cycle at the maximum input voltage.
Output Capacitor
Specify that VDROOP = 0.2V for a 600mA load pulse.
1
23
1 3.4V · (4.2V - 3.4V)
4.7µH · 2.0MHz · 4.2V
23
RMS
IL1 · F
S
· V
IN(MAX)
= ·
·
3 · ΔI
LOAD
V
DROOP
· F
S
3 · 0.6A
0.2V · 2.0MHz
C
OUT
= = = 4.5µF
· = 69mArms
·
(V
O
) · (V
IN(MAX)
- V
O
)
=
P
ESR
= ESR · I
RMS2
= 5mΩ · (69mA)
2
= 24µW
I
PKL1
= I
O
+ ΔI
L1(MAX)
= 0.6A + 0.118A = 0.718A
2
P
L1
= I
O
2
⋅ DCR = 0.6A
2
⋅ 140mΩ = 50mW
V
O
V
O
2.1
V
2.1V
ΔI
L1(MAX)
= ⋅ 1 - = ⋅ 1 - = 239m
A
L ⋅ F
S
V
IN
2.2µH ⋅ 2.0MHz
4.2V
⎛
⎝⎞
⎠
⎛
⎝⎞
⎠
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
1171.2006.06.1.0 19
Input Capacitor
Specify a maximum input voltage ripple of VPP = 25mV.
AAT1171 Losses
AAT1171 Dropout Losses
T
J(MAX)
=
P
TOTAL
·
Θ
JA
+
T
AMB
= 112mW · 50°C/W = 5.6°C + 70°C = 75.6°C
P
TOTAL
= 0.6
2
· 310m
Ω
+ 100µA · 3.5V = 112mW
= I
O
2
· R
DS(ON)(HS)
+ I
Q
· V
IN
T
J(MAX)
=
P
TOTAL
·
Θ
JA
+
T
AMB
= 104mW · 50°C/W = 5.2°C + 70°C = 75.2°C
P
TOTAL
= 0.6
2
· 0.29
Ω
+ (5ns · 2.0MHz · 0.6A + 60µA) · 4.2V = 104m
W
= I
O
2
· R
DS(ON)
+ (t
sw
· F
S
· I
O
+ I
Q
) · V
IN
I
O
RMS
I
P = ESR
·
I
RMS
2
= 5mΩ
·
(0.3A)
2
= 0.45mW
2
= = 0.3Arms
C
IN(MIN)
= = = 3.4µF
1
⎛⎞
- ESR
·
4
·
F
S
⎝⎠
V
PP
I
O
1
⎛⎞
- 5mΩ
·
4
·
2.0MHz
⎝⎠
25mV
0.6A
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
20 1171.2006.06.1.0
Table 1: Suggested Component Selection.
Manufacturer Value Part Number ISAT IRMS DCR Case Size (mm)
Cooper Electronics 2.2µH SD3118-2R2 1.12A 0.91A 140mΩ3.1x3.1x1.2
www.cooperet.com
Sumida 2.2µH CDRH2D11/HP 1.1A 1.3A 96mΩ3.2x3.2x1.2
www.sumida.com
ABCO Electronics 2.2µH LPF2010-2R2M 0.52A 200mΩ2.0x2.0x1.0
www.abco.co.kr 2.2µH LPF2010-2R2M 0.55A 110mΩ2.0x2.0x1.4
Manufacturer Value Device Voltage Case Size Part Number
Murata 4.7µF Output or Input Capacitor 10V 0805 GRM21BR61A475KA73L
www.murata.com Input Capacitor 6.3V 0603 GRM188R60J475KE19D
TDK 4.7µF Output or Input Capacitor 10V 0805 C2012X5R1A475K
www.tdk.com Input Capacitor 6.3V 0603 C1608X5ROJ475K
Taiyo Yuden 4.7µF Output or Input Capacitor 10V 0805 LMK212BJ475MG
www.t-yuden.com Input Capacitor 6.3V 0603 JMK107BJ475MA
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
1171.2006.06.1.0 21
AAT1171
600mA Voltage-Scaling Step-Down Converter
for RF Power Amplifiers with Bypass Switch
22 1171.2006.06.1.0
Advanced Analogic Technologies, Inc.
830 E. Arques Avenue, Sunnyvale, CA 94085
Phone (408) 737-4600
Fax (408) 737-4611
Ordering Information
Package Information
TDFN33-12
All dimensions in millimeters.
Top View Bottom View
Detail "B"
Detail "A"
Side View
3.00
±
0.05
Index Area
(D/2 x E/2)
Detail "A"
Detail "B"
1.70
±
0.05
3.00
±
0.05
0.05
±
0.05
0.229
±
0.051
7.5°
±
7.5°
2.40
±
0.05
0.16
Pin 1 Indicator
(optional)
0.375
±
0.125
0.3
±
0.10
0.45
±
0.050.23
±
0.05
0.075
±
0.075
0.1 REF
0.8
+
0.05
-0.20
Option A:
C0.30 (4x) max
Chamfered corner
Option B:
R0.30 (4x) max
Round corner
All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means
semiconductor products that are in compliance with current RoHS standards, including
the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more
information, please visit our website at http://www.analogictech.com/pbfree.
Package Marking1Part Number (Tape and Reel)2
TDFN33-12 RXXYY AAT1171IWP-1-T1
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
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