Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use http://www.nexperia.com
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use
salesaddresses@nexperia.com (email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
- © Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and
understanding,
Kind regards,
Team Nexperia
S
OT2
2
3
BUK9880-55
N-channel TrenchMOS logic level FET
19 March 2014 Product data sheet
Scan or click this QR code to view the latest information for this product
1. General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
2. Features and benefits
•AEC Q101 compliant
•Electrostatically robust due to integrated protection diodes
•Low conduction losses due to low on-state resistance
3. Applications
•Automotive and general purpose power switching
4. Quick reference data
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C - - 55 V
IDdrain current Tsp = 25 °C - - 7.5 A
Ptot total power dissipation Tsp = 25 °C; Fig. 4 - - 8.3 W
Static characteristics
RDSon drain-source on-state
resistance
VGS = 5 V; ID = 5 A; Tj = 25 °C - 65 80 mΩ
Avalanche ruggedness
EDS(AL)S non-repetitive drain-
source avalanche
energy
ID = 2.5 A; Vsup ≤ 25 V; RGS = 50 Ω;
VGS = 5 V; Tj(init) = 25 °C; unclamped
- - 30 mJ
NXP Semiconductors BUK9880-55
N-channel TrenchMOS logic level FET
BUK9880-55 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 19 March 2014 2 / 11
5. Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 G gate
2 D drain
3 S source
4 D drain
1 32
4
SC-73 (SOT223)
sym116
D
G
S
6. Ordering information
Table 3. Ordering information
PackageType number
Name Description Version
BUK9880-55 SC-73 plastic surface-mounted package with increased heatsink; 4
leads
SOT223
BUK9880-55/CU SC-73 plastic surface-mounted package with increased heatsink; 4
leads
SOT223
7. Marking
Table 4. Marking codes
Type number Marking code
BUK9880-55
BUK9880-55/CU 98055
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C - 55 V
VDGR drain-gate voltage RGS = 20 kΩ - 55 V
VGS gate-source voltage -10 10 V
Ptot total power dissipation Tsp = 25 °C; Fig. 4 - 8.3 W
Tsp = 25 °C - 7.5 AIDdrain current
Tsp = 100 °C - 4.7 A
NXP Semiconductors BUK9880-55
N-channel TrenchMOS logic level FET
BUK9880-55 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 19 March 2014 3 / 11
Symbol Parameter Conditions Min Max Unit
IDM peak drain current Tsp = 25 °C; pulsed - 40 A
Tstg storage temperature -55 150 °C
Tjjunction temperature -55 150 °C
Vesd electrostatic discharge voltage HBM; C = 100 pF; R = 1.5 kΩ - 2 kV
Source-drain diode
ISsource current Tsp = 25 °C - 7.5 A
ISM peak source current pulsed; Tsp = 25 °C - 40 A
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
ID = 2.5 A; Vsup ≤ 25 V; RGS = 50 Ω;
VGS = 5 V; Tj(init) = 25 °C; unclamped
- 30 mJ
40
60
20
80
100
ID
(%)
0
Tmb (°C)
0 16012040 80
003aaf302
VGS ≥ 5 V
Fig. 1. Normalized continuous drain current as a
function of solder point temperature
Tsp = 25 °C
Fig. 2. Safe operating area; continuous and peak drain
currents as a function of drain-source voltage
NXP Semiconductors BUK9880-55
N-channel TrenchMOS logic level FET
BUK9880-55 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 19 March 2014 4 / 11
003aaf315
T(mb) (°C)
20 16012080 14010040 60
40
60
20
80
100
WDSS
(%)
0
ID = 2.5 A
Fig. 3. Normalised drain-source non-repetitive
avalanche energy as a function of mounting-
base temperature
40
60
20
80
100
Pder
(%)
0
Tmb (°C)
0 16012040 80
003aaf301
Fig. 4. Normalized total power dissipation as a
function of solder point temperature
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-sp) thermal resistance
from junction to solder
point
mounted on any printed-circuit board - 12 15 K/W
Rth(j-a) thermal resistance
from junction to
ambient
mounted on printed-circuit board - 120 - K/W
Fig. 5. Transient thermal impedance from junction to solder point as a function of pulse duration
NXP Semiconductors BUK9880-55
N-channel TrenchMOS logic level FET
BUK9880-55 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 19 March 2014 5 / 11
10. Characteristics
Table 7. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C 50 - - VV(BR)DSS drain-source
breakdown voltage ID = 0.25 mA; VGS = 0 V; Tj = 25 °C 55 - - V
ID = 1 mA; VDS = VGS; Tj = 25 °C 1 1.5 2 V
ID = 1 mA; VDS = VGS; Tj = -55 °C - - 2.3 V
VGS(th) gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = 150 °C 0.6 - - V
VDS = 55 V; VGS = 0 V; Tj = 25 °C - 0.05 10 µAIDSS drain leakage current
VDS = 55 V; VGS = 0 V; Tj = 150 °C - - 100 µA
VGS = 5 V; VDS = 0 V; Tj = 25 °C - 0.02 1 µA
VGS = -5 V; VDS = 0 V; Tj = 25 °C - 0.02 1 µA
VGS = 5 V; VDS = 0 V; Tj = 150 °C - - 5 µA
IGSS gate leakage current
VGS = -5 V; VDS = 0 V; Tj = 150 °C - - 5 µA
VGS = 5 V; ID = 5 A; Tj = 150 °C - - 148 mΩRDSon drain-source on-state
resistance VGS = 5 V; ID = 5 A; Tj = 25 °C - 65 80 mΩ
VDS = 0 V; Tj = 25 °C; IG = 1 mA 10 - - VV(BR)GSS gate-source
breakdown voltage VDS = 0 V; Tj = 25 °C; IG = -1 mA 10 - - V
Dynamic characteristics
Ciss input capacitance - 500 650 pF
Coss output capacitance - 110 135 pF
Crss reverse transfer
capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C
- 60 85 pF
td(on) turn-on delay time - 10 15 ns
trrise time - 30 50 ns
td(off) turn-off delay time - 30 45 ns
tffall time
VDS = 30 V; RL = 4.29 Ω; VGS = 5 V;
RG(ext) = 10 Ω; Tj = 25 °C; ID = 7 A
- 30 40 ns
gfs transfer conductance VDS = 25 V; ID = 5 A; Tj = 25 °C 4 8 - S
Source-drain diode
VSD source-drain voltage IS = 5 A; VGS = 0 V; Tj ≥ -55 °C;
Tj ≤ 175 °C
- 0.85 1.1 V
trr reverse recovery time - 38 - ns
Qrrecovered charge
IS = 5 A; dIS/dt = -100 A/µs;
VGS = -10 V; VDS = 30 V; Tj ≤ 175 °C - 0.2 - µC
NXP Semiconductors BUK9880-55
N-channel TrenchMOS logic level FET
BUK9880-55 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 19 March 2014 6 / 11
0
30
20
10
40
ID
(A)
VDS (V)
0 1084 62
003aaf305
VGS (V) = 10
7
6
5.6
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
Tj = 25 °C
Fig. 6. Output characteristics: drain current as a
function of drain-source voltage; typical values
80
100
90
110
RDS(on)
(m )
70
ID (A)
5 252010 15
003aaf306
VGS (V) = 4.0
4.2
4.4
4.6
4.8
5.0
Tj = 25 °C.
Fig. 7. Drain-source on-state resistance as a function
of drain current; typical values
0
15
10
5
20
ID
(A)
VGS (V)
0 541 2 3
003aaf307
Tj= 25 °CTj= 150 °C
VDS > ID x RDSon
Fig. 8. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
5
13
9
11
7
15
gfs
(S)
ID(A)
0 2015105
003aaf308
VDS > ID x RDSon
Fig. 9. Forward transconductance as a function of
drain current; typical values
Tj(°C)
-100 2001000
003aaf309
1.0
1.5
2.0
a
0.5
ID = 5 A; VGS = 5 V
Fig. 10. Normalized drain-source on-state resistance
factor as a function of junction temperature
003aaf310
Tj(°C)
- 100 2001000
0.5
2.0
1.5
1.0
2.5
VGS(th)
(V) maximum
typical
minimum
ID = 1 mA; VDS = VGS
Fig. 11. Gate-source threshold voltage as a function of
junction temperature
NXP Semiconductors BUK9880-55
N-channel TrenchMOS logic level FET
BUK9880-55 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 19 March 2014 7 / 11
Tj = 25 °C; VDS = VGS
Fig. 12. Sub-threshold drain current as a function of
gate-source voltage
003aaf312
VDS (V)
10-2 102
1010-1 1
0.4
0.6
0.2
0.8
1.0
C
(nF)
0
Ciss
Coss
Crss
VGS = 0 V; f = 1 MHz
Fig. 13. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
2
4
6
VDS
(V)
0
QG(nC)
0 124 8
003aaf313
VDS = 44 VVDS = 14 V
Tj = 25 °C; ID = 7 A
Fig. 14. Gate-source voltage as a function of gate
charge; typical values
003aaf314
VSDS (V)
0 2.01.50.5 1.0
0
30
20
10
40
IF
(A)
Tj= 25 °CTj= 150 °C
VGS = 0 V
Fig. 15. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values
NXP Semiconductors BUK9880-55
N-channel TrenchMOS logic level FET
BUK9880-55 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 19 March 2014 8 / 11
11. Package outline
UNIT A1bpc D E e1HELpQ ywv
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.10
0.01
1.8
1.5
0.80
0.60
b1
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3 2.3
e
4.6 7.3
6.7
1.1
0.7
0.95
0.85 0.1 0.10.2
DIMENSIONS (mm are the original dimensions)
SOT223 SC-73 04-11-10
06-03-16
wM
bp
D
b1
e1
e
A
A1
Lp
Q
detail X
HE
E
vMA
AB
B
c
y
0 2 4 mm
scale
A
X
1 32
4
Plastic surface-mounted package with increased heatsink; 4 leads SOT223
Fig. 16. Package outline SC-73 (SOT223)
NXP Semiconductors BUK9880-55
N-channel TrenchMOS logic level FET
BUK9880-55 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 19 March 2014 9 / 11
12. Legal information
12.1 Data sheet status
Document
status [1][2]
Product
status [3]
Definition
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nxp.com.
12.2 Definitions
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local NXP
Semiconductors sales office. In case of any inconsistency or conflict with the
short data sheet, the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product
is deemed to offer functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, NXP Semiconductors does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation -
lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their
applications and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default
in the customer’s applications or products, or the application or use by
customer’s third party customer(s). Customer is responsible for doing all
necessary testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications
and the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
NXP Semiconductors BUK9880-55
N-channel TrenchMOS logic level FET
BUK9880-55 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 19 March 2014 10 / 11
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
12.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-
CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight,
MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug,
TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP
Semiconductors N.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
NXP Semiconductors BUK9880-55
N-channel TrenchMOS logic level FET
BUK9880-55 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved
Product data sheet 19 March 2014 11 / 11
13. Contents
1 General description ............................................... 1
2 Features and benefits ............................................1
3 Applications ........................................................... 1
4 Quick reference data ............................................. 1
5 Pinning information ............................................... 2
6 Ordering information ............................................. 2
7 Marking ................................................................... 2
8 Limiting values .......................................................2
9 Thermal characteristics .........................................4
10 Characteristics ....................................................... 5
11 Package outline ..................................................... 8
12 Legal information ...................................................9
12.1 Data sheet status ................................................. 9
12.2 Definitions .............................................................9
12.3 Disclaimers ...........................................................9
12.4 Trademarks ........................................................ 10
© NXP Semiconductors N.V. 2014. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 March 2014