General Description
The MAX6816/MAX6817/MAX6818 are single, dual, and
octal switch debouncers that provide clean interfacing
of mechanical switches to digital systems. They accept
one or more bouncing inputs from a mechanical switch
and produce a clean digital output after a short, preset
qualification delay. Both the switch opening bounce
and the switch closing bounce are removed. Robust
switch inputs handle ±25V levels and are ±15kV
ESD-protected for use in harsh industrial environments.
They feature single-supply operation from +2.7V to +5.5V.
Undervoltage-lockout circuitry ensures the output is in
the correct state upon power-up.
The single MAX6816 and dual MAX6817 are offered in
SOT packages and require no external components.
Their low supply current makes them ideal for use in
portable equipment.
The MAX6818 octal switch debouncer is designed for
data-bus interfacing. The MAX6818 monitors switches
and provides a switch change-of-state output (CH),
simplifying microprocessor (µP) polling and interrupts.
Additionally, the MAX6818 has three-state outputs
controlled by an enable (EN) pin, and is pin-compatible
with the LS573 octal latch (except for the CH pin),
allowing easy interfacing to a digital data bus.
Applications
●µP Switch Interfacing
●Industrial Instruments
●PC-Based Instruments
●Portable Instruments
●Membrane Keypads
Benets and Features
●Switch Debouncer Integration Simplifies System
Interface to Mechanical Switches
• Single-Supply Operation from +2.7V to +5.5V
• No External Components Required
• Single (MAX6816), Dual (MAX6817), and
Octal (MAX6818) Versions Available
• 6μA Supply Current
●Built-In Protection Circuitry Improves System
Reliability
• Inputs Can Exceed Power Supplies up to ±25V
• ESD Protection for Input Pins
- ±15kV—Human Body Model
- ±8kV—IEC 1000-4-2, Contact Discharge
- ±15kV—IEC 1000-4-2, Air-Gap Discharge
●Octal Version (MAX6818) Provides Direct Data
Bus Interface
• Three-State Outputs for Directly Interfacing to
μP (MAX6818)
• Switch Change-of-State Output Simplies Polling
and Interrupts (MAX6818)
• Pin-Compatible with ‘LS573 (MAX6818)
Note: There is a minimum order increment of 2500 pieces for
SOT packages.
Devices are available in both leaded and lead(Pb)-free/RoHS-
compliant packaging. Specify lead-free by replacing “-T” with
“+T” when ordering.
PART TEMP RANGE PIN-
PACKAGE
SOT
TOP MARK
MAX6816EUS-T -40°C to +125°C 4 SOT143 KABA
MAX6817EUT-T -40°C to +125°C 6 SOT23-6 AAAU
MAX6818EAP -40°C to +125°C 20 SSOP —
1
2
4
3
VCC
OUTIN
GND
MAX6816
SOT143
TOP VIEW
IN
MECHANICAL
SWITCH
RESET
GND
DEBOUNCED
OUTPUT
VCC
µP
0.1µF
OUT
MAX6816
MAX6816/MAX6817/
MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
19-4770; Rev 5; 4/15
Pin Configurations continued at end of data sheet.
Pin Congurations
Ordering Information
Typical Operating Circuit
Voltage (with respect to GND)
VCC ...................................................................... -0.3V to +6V
IN_ (Switch Inputs) .............................................-30V to +30V
EN ........................................................................ -0.3V to +6V
OUT_, CH ............................................. -0.3V to (VCC + 0.3V)
OUT Short-Circuit Duration
(One or Two Outputs to GND)...................................Continuous
Continuous Power Dissipation (TA = +70°C)
4-Pin SOT143 (derate 4.0mW/°C above +70°C) ........320mW
6-Pin SOT23 (derate 8.7mW/°C above +70°C) ..........691mW
20-Pin SSOP (derate 8.0mW/°C above +70°C) ..........640mW
Operating Temperature Range ......................... -40°C to +125°C
Storage Temperature Range ............................ -65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow)
Lead(Pb)-free...............................................................+260°C
Containing lead ............................................................+240°C
Note 1: MAX6816 and MAX6817 production testing is done at TA = +25°C; overtemperature limits are guaranteed by design.
(VCC = +2.7V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at VCC = +5V, TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Operating Voltage Range VCC 2.7 5.5 V
Supply Current
ICC
VCC = 5V, IOUT = 0A, IN_ = VCC
6 20
µA
Debounce Duration
tDP
MAX6818
20 40 40
ms
MAX6816/MAX6817
20 50 80
Input Threshold
VIL
0.8
V
VIH
VCC = 5V 2.4
V
VCC = 2.7V 2.0
Input Hysteresis 300 mV
Input Pullup Resistance 32 63 100
kW
IN Input Current IIN VIN = ±15V
±1
mA
Input Voltage Range VIN
-25 +25
V
Undervoltage-Lockout Threshold 1.9 2.6 V
OUT_, CH
Output
Voltage VOL ISINK = 1.6mA
0.4 V
VOH ISOURCE = 0.4mA VCC - 1.0
EN
Pulse Width
tEN
200
ns
EN
Threshold VCC = 5V 0.8 1.7 2.4
V
VCC = 2.7V 0.8 1.1 2.0
EN
Input Current IIL
±1
µA
EN
Low to Out Active
Propagation Delay
tPE RL = 10k
W
, CL = 100pF
100
ns
EN High to Out Three-State
Propagation Delay tPD
RL = 1k
W
, CL = 15pF
100
ns
EN Low to CH Out High
Propagation Delay tPC
RL = 10k
W
, CL = 50pF
100
ns
OUT_ Three-State Leakage Current VOUT = 0V or VCC
±10
µA
ESD CHARACTERISTICS
ESD Protection IN_
IEC 1000-4-2 Air-Gap Discharge ±15
kV
IEC 1000-4-2 Contact Discharge
±8
Human Body Model
±15
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MAX6816/MAX6817/
MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
Electrical Characteristics
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Absolute Maximum Ratings
(TA = +25°C, unless otherwise noted.)
0
3
1
2
4
5
-40 5035 65 80-25 -10 205 95 100 125
VCC UNDERVOLTAGE LOCKOUT
vs. TEMPERATURE
MAX6816 toc07
TEMPERATURE (°C)
VCC UNDERVOLTAGE LOCKOUT (V)
30
40
35
45
50
-40 35 50-25 -10 205 95 10065 80 125
DEBOUNCE DELAY PERIOD
vs. TEMPERATURE
MAX6816 toc06
TEMPERATURE (°C)
DEBOUNCE DELAY PERIOD (ms)
VCC = 5V
VCC = 3V
0
2
1
4
3
5
2 43 5 6
MAX6818 EN INPUT LOGIC THRESHOLD
vs. SUPPLY VOLTAGE
MAX6816 toc05
SUPPLY VOLTAGE (V)
LOGIC THRESHOLD (V)
0
2
1
4
3
5
6
2 43 5 6
OUTPUT LOGIC LEVEL
vs. SUPPLY VOLTAGE
MAX6816 toc04
SUPPLY VOLTAGE (V)
OUTPUT LOGIC LEVEL (V)
VOH, ISOURCE = 0.4mA
VOL, ISINK = 1.6mA
4V
0V
-5V
5V
10ms/div
DEBOUNCE OF OPENING SWITCH
MAX6816 TOC03
VCC = 5V
IN (5V/div)OUT (2V/div)
IN (5V/div)OUT (2V/div)
4V
0V
-5V
5V
10ms/div
DEBOUNCE OF CLOSING SWITCH
MAX6816 TOC02
VCC = 5V
0
2
1
4
3
6
5
7
-40 205 5035-25 -10 65 80 95 110 125
SUPPLY CURRENT vs. TEMPERATURE
MAX6816 toc01
TEMPERATURE (C)
SUPPLY CURRENT (µA)
VCC = 5V
VCC = 3V
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MAX6816/MAX6817/
MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
Typical Operating Characteristics
Detailed Description
Theory of Operation
The MAX6816/MAX6817/MAX6818 are designed to
eliminate the extraneous level changes that result from
interfacing with mechanical switches (switch bounce).
Virtually all mechanical switches bounce upon opening or
closing. These switch debouncers remove bounce when
a switch opens or closes by requiring that sequentially
clocked inputs remain in the same state for a number of
sampling periods. The output does not change until the
input is stable for a duration of 40ms.
The circuit block diagram (Figure 1) shows the
functional blocks consisting of an on-chip oscillator, counter,
exclusive-NOR gate, and D flip-flop. When the input
does not equal the output, the XNOR gate issues a
counter reset. When the switch input state is stable for
the full qualification period, the counter clocks the flip-flop,
updating the output. Figure 2 shows the typical opening
and closing switch debounce operation. On the MAX6818,
the change output (CH) is updated simultaneously with the
switch outputs.
Undervoltage Lockout
The undervoltage-lockout circuitry ensures that the
out-puts are at the correct state on power-up. While
the supply voltage is below the undervoltage threshold
(typically 1.9V), the debounce circuitry remains
transparent. Switch states are present at the logic outputs
with no debouce delay.
Figure 1. Block Diagram
PIN NAME FUNCTION
MAX6816 MAX6817 MAX6818
1 2 10 GND Ground
2 — — IN Switch Input
—1, 3 —IN1, IN2 Switch Inputs
— — 2–9 IN1–IN8 Switch Inputs
3 — — OUT CMOS Debounced Output
—4, 6 —OUT2, OUT1 CMOS Debounced Outputs
— — 12–19 OUT8–OUT1 CMOS Debounced Outputs
4 5 20 VCC +2.7V to +5.5V Supply Voltage
— — 1
EN Active-Low, Three-State Enable Input for outputs. Resets CH.
Tie to GND to “always enable” outputs.
— — 11
CH
Change-of-State Output. Goes low on switch input change of
state. Resets on EN. Leave unconnected if not used.
VCC
VCC
VCC
RPU
D Q
R
QD COUNTER LOAD
OUT
IN
ESD
PROTECTION
UNDER-
VOLTAGE
LOCKOUT
OSC.
MAX6816
MAX6817
MAX6818
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MAX6816/MAX6817/
MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
Pin Description
Robust Switch Inputs
The switch inputs on the MAX6816–MAX6818 have
overvoltage-clamping diodes to protect against damaging
fault conditions. Switch input voltage scan safely swing
±25V to ground (Figure 3). Proprietary ESD-protection
structures protect against high ESD encountered in
harsh industrial environments, membrane keypads, and
portable applications. They are designed to withstand
±15kV per the IEC 1000-4-2 Air-Gap Discharge Test and
±8kV per the IEC 1000-4-2 Contact Discharge Test.
Since there are 63kW (typical) pullup resistors
connected to each input, driving an input to -25V draws
approximately 0.5mA (up to 4mA for eight inputs) from
the VCC supply. Driving an input to +25V will cause
approximately 0.32mA of current (up to 2.6mA for eight
inputs) to flow back into the VCC supply. If the total system
VCC supply current is less than the current flowing back
into the VCC supply, VCC will rise above normal levels.
In some low-current systems, a zener diode on VCC may
be required.
±15kV ESD Protection
As with all Maxim devices, ESD-protection structures are
incorporated on all pins to protect against electrostatic dis-
charges encountered during handling and assembly. The
MAX6816–MAX6818 have extra protection against static
electricity. Maxim’s engineers have developed state-of-
the-art structures to protect against ESD of ±15kV at the
switch inputs without damage. The ESD structures with-
stand high ESD in all states: normal operation, shutdown,
and powered down. After an ESD event, the MAX6816–
MAX6818 keep working without latchup, whereas other
solutions can latch and must be powered down to
remove latchup.
Figure 5. MAX6818 Typical μP Interfacing Circuit
Figure 4. MAX6818 μP Interface Timing Diagram
Figure 3. Switch Input ±25V Fault Tolerance
Figure 2. Input Characteristics
IN1
SW1
SW8
IN8
+V
CC
+V
CC
µP
0.1µF
OUT1
OUT8
EN I/O
IRQ
D0
D7
CH
MAX6818
tEN
OUT NORMALLY
LOW
OUT NORMALLY
HIGH
OUT1–OUT8
1/2 VCC 1/2 VCC
1/2 VCC
1/2 VCC
1/2 VCC
EN
tPE tPD
tPD
VOL + 0.5V
VOH - 0.5V
tPE
tPC
OUT1–OUT8
CH
20ms/div
20V
0V
-20V
4V
OUT
(2V/div)
IN
(20V/div)
0V
tDP
IN1
OUT1
IN2
OUT2
CH
MAX6818 ONLY
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MAX6816/MAX6817/
MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
ESD protection can be tested in various ways;
these products are characterized for protection to the
following limits:
1) ±15kV using the Human Body Model
2) ±8kV using the Contact-Discharge method specied
in IEC 1000-4-2
3) ±15kV using IEC 1000-4-2’s Air-Gap method.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
Human Body Model
Figure 6a shows the Human Body Model and Figure
6b shows the current waveform it generates when
discharged into a low impedance. This model consists
of a 100pF capacitor charged to the ESD voltage of
interest, which is then discharged into the test device
through a 1.5kW resistor.
IEC 1000-4-2
The IEC 1000-4-2 standard covers ESD testing and
performance of finished equipment; it does not
specifically refer to integrated circuits. The MAX6816–
MAX6818 help you design equipment that meets
Level 4 (the highest level) of IEC 1000-4-2,
without the need for additional ESD-protection
components.
Figure 7b. IEC 1000-4-2 ESD Generator Current Waveform
Figure 7a. IEC 1000-4-2 ESD Test Model
Figure 6b. Human Body Current Waveform
Figure 6a. Human Body ESD Test Model
tr = 0.7ns to 1ns
30ns
60ns
t
100%
90%
10%
IPEAK
I
CHARGE CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
150pF
RC 50MΩ to 100MΩRD 330Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
IP 100%
90%
36.8%
tRL TIME
tDL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
Ir
10%
0
0
AMPERES
CHARGE-CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
100pF
RC 1MΩRD 1500Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
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MAX6816/MAX6817/
MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
The major difference between tests done using the Human
Body Model and IEC 1000-4-2 is higher peak current in
IEC 1000-4-2, because series resistance is lower in the
IEC 1000-4-2 model. Hence, the ESD withstand volt-
age measured to IEC 1000-4-2 is generally lower than
that measured using the Human Body Model. Figure 7a
shows the IEC 1000-4-2 model and Figure 7b shows the
current waveform for the 8kV, IEC 1000-4-2, Level 4, ESD
Contact-Discharge test.
The Air-Gap test involves approaching the device with
a charged probe. The Contact-Discharge method
connects the probe to the device before the probe is ener-
gized.
Machine Model
The Machine Model for ESD tests all pins using a 200pF
storage capacitor and zero discharge resistance. Its
objective is to emulate the stress caused by contact that
occurs with handling and assembly during manufacturing.
MAX6818 µP Interfacing
The MAX6818 has an output enable (EN) input that
allows switch outputs to be three-stated on the µP data
bus until polled by the µP. Also, state changes at the
switch inputs are detected, and an output (CH) goes
low after the debounce period to signal the µP. Figure
4 shows the timing diagram for enabling outputs and
reading data. If the output enable is not used, tie EN to
GND to “always enable” the switch outputs. If EN is low,
CH is always high. If a change of state is not required,
leave CH unconnected.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
4 SOT143 U4-1 21-0052 90-0183
6 SOT23 U6-4 21-0058 90-0175
20 SSOP A20-1 21-0056 90-0094
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
VCC
OUT1
OUT2
OUT3IN3
IN2
IN1
EN
TOP VIEW
OUT4
OUT5
OUT6
OUT7IN7
IN6
IN5
IN4
12
11
9
10
OUT8
CHGND
IN8
MAX6818
SSOP
GND
OUT2IN2
1 6 OUT1
5 VCC
IN1
MAX6817
SOT23-6
2
3 4
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MAX6816/MAX6817/
MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
Chip Information
SUBSTRATE CONNECTED TO GND
PROCESS: BiCMOS
Pin Congurations (continued)
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 7/98 Initial release —
3 8/10 Updated Ordering Information, Electrical Characteristics, Typical Operating
Characteristics, and the Undervoltage Lockout section. 1–4, 7
4 7/14 No /V OPNs; removed automotive reference from Applications section 1
5 4/15 Updated Benefits and Features section 1
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2015 Maxim Integrated Products, Inc.
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MAX6816/MAX6817/
MAX6818
±15kV ESD-Protected, Single/Dual/Octal,
CMOS Switch Debouncers
Revision History
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
