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74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 Rev. 1.6.1
74LCX541
Low Voltage Octal Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
Features
5V tolerant input and outputs
2.3V–3.6V V
CC
specifications provided
6.5ns t
PD
max (V
CC
=
3.3V), 10µA I
CC
max
Power-down high impedance inputs and outputs
Supports live insertion/withdrawal
(1)
±24 mA output drive (V
CC
=
3.0V)
Latch-up performance exceeds JEDEC 78 conditions
ESD performance
– Human body model
>
2000V
– Machine model
>
200V
Leadless DQFN package
Note:
1. To ensure the high impedance state during power up
or down, OE should be tied to V
CC
through a pull-up
resistor: the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
General Description
The LCX541 is an octal buffer/line driver designed to be
employed as memory and address drivers, clock drivers
and bus oriented transmitter/receivers. The LCX541 is a
non inverting option of the LCX540.
This device is similar in function to the LCX244 while
providing flow-through architecture (inputs on opposite
side from outputs). This pinout arrangement makes this
device especially useful as an output port for micropro-
cessors, allowing ease of layout and greater PC board
density.
The LCX541 is designed for low voltage applications
with capability of interfacing to a 5V signal environment.
The LCX541 is fabricated with an advanced CMOS
technology to achieve high speed operation while
maintaining CMOS low power dissipation.
Ordering Information
Note:
2. DQFN package available in Tape and Reel only.
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order Number
Package
Number Package Description
74LCX541WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LCX541SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX541BQX
(2)
MLP20B 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN),
JEDEC MO-241, 2.5 x 4.5mm
74LCX541MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCX541MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Implements proprietary noise/ EMI reduction circuitry
December 2013
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 Rev. 1.6.1 2
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Connection Diagrams
Pin Assignments for
SOIC, SOP, SSOP, TSSOP
Pad Assignment for DQFN
(Top View)
Pin Descriptions
Logic Symbol
IEEE/IEC
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Pin Names Description
OE
1
, OE
2
3-STATE Output Enable Inputs
I
0
–I
7
Inputs
O
0
–O
7
Outputs
I1
I2
I3
I4
I5
I6
I7
GND
I0
O0
O1
O2
O3
O4
O5
O6
O7
OE2
VCC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE1
I1
I2
I3
I4
I5
I6
I7
GND
I0
O0
O1
O2
O3
O4
O5
O6
O7
OE2
VCC
120
2
3
4
5
6
7
8
9
10 11
19
18
17
16
15
14
13
12
OE1
Inputs Outputs
OE
1
OE
2
IO
n
LLHH
HXXZ
XHXZ
LLLL
O0
OE1
OE2EN
&
I0
O1
I1
O2
I2
O3
I3
O4
I4
O5
I5
O6
I6
O7
I7
(Bottom View)
DAP No Connect
Note: DAP (Die Attach Pad)
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Recommended Operating Conditions
(4)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Notes:
3. I
O
Absolute Maximum Rating must be observed.
4. Unused inputs must be held HIGH or LOW. They may not float.
Symbol Parameter Conditions Value Units
V
CC
Supply Voltage –0.5 to +7.0 V
V
I
DC Input Voltage –0.5 to +7.0 V
V
O
DC Output Voltage Output in 3-STATE –0.5 to +7.0 V
Output in HIGH or LOW State
(3)
–0.5 to V
CC
+ 0.5
I
IK
DC Input Diode Current V
I
<
GND –50 mA
I
OK
DC Output Diode Current V
O
<
GND –50 mA
V
O
>
V
CC
+50
I
O
DC Output Source/Sink Current ±50 mA
I
CC
DC Supply Current per Supply Pin ±100 mA
I
GND
DC Ground Current per Ground Pin ±100 mA
T
STG
Storage Temperature –65 to +150 °C
Symbol Parameter Conditions Min. Max. Units
V
CC
Supply Voltage Operating 2.0 3.6 V
Data Retention 1.5 3.6
V
I
Input Voltage 0 5.5 V
V
O
Output Voltage HIGH or LOW State 0 V
CC
V
3-STATE 0 5.5
I
OH
/
I
OL
Output Current V
CC
= 3.0V–3.6V ±24 mA
V
CC
= 2.7V–3.0V ±12
V
CC
= 2.3V–2.7V ±8
T
A
Free-Air Operating Temperature –40 85 °C
t
/
V Input Edge Rate V
IN
= 0.8V–2.0V, V
CC
= 3.0V 0 10 ns
/V
74LCX541 Rev. 1.6.1 3
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
DC Electrical Characteristics
AC Electrical Characteristics
Notes
5. Outputs disabled or 3-STATE only.
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
separate outputs of the same device. The specification applies to any outputs switching in the same direction,
either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Symbol Parameter V
CC
(V) Conditions
T
A
=
–40°C to +85°C
UnitsMin. Max.
V
IH
HIGH Level Input Voltage 2.3–2.7 1.7 V
2.7–3.6 2.0
V
IL
LOW Level Input Voltage 2.3–2.7 0.7 V
2.7–3.6 0.8
V
OH
HIGH Level Output Voltage 2.3–3.6 I
OH
=
–100µA V
CC
– 0.2 V
2.3 I
OH
= –8mA 1.8
2.7 I
OH
=
–12mA 2.2
3.0 I
OH
=
–18mA 2.4
I
OH
=
–24mA 2.2
V
OL
LOW Level Output Voltage 2.3–3.6 I
OL
=
100µA 0.2 V
2.3 I
OL
= 8mA 0.6
2.7 I
OL
=
12mA 0.4
3.0 I
OL
=
16mA 0.4
I
OL
=
24mA 0.55
I
I
Input Leakage Current 2.3–3.6 0
V
I
5.5V ±5.0 µA
I
OFF
Power-Off Leakage Current 0 V
I
or V
O
=
5.5V 10 µA
I
CC
Quiescent Supply Current 2.3–3.6 V
I
= VCC or GND 10 µA
3.6V VI, VO 5.5V(5) ±10
ICC Increase in ICC per Input 2.3–3.6 VIH = VCC = 0.6V 500 µA
Symbol Parameter
TA = –40°C to +85°C, RL = 500
Units
VCC = 3.3V ± 0.3V,
CL = 50pF
VCC = 2.7V,
CL = 50pF
VCC = 2.5V ± 0.2V,
CL = 30pF
Min. Max. Min. Max. Min. Max.
tPHL, tPLH Propagation Delay 1.5 6.5 1.5 7.5 1.5 7.8 ns
tPZL, tPZH Output Enable Time 1.5 8.5 1.5 9.5 1.5 10.5 ns
tPLZ, tPHZ Output Disable Time 1.5 7.5 1.5 8.5 1.5 9.0 ns
tOSHL, tOSLH Output to Output Skew(6) 1.0 ns
74LCX541 Rev. 1.6.1 4
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Dynamic Switching Characteristics
Capacitance
Symbol Parameter VCC (V) Conditions
TA = 25°C
UnitsTypical
VOLP Quiet Output Dynamic Peak VOL 3.3 CL = 50 pF, VIH = 3.3V, VIL = 0V 0.8 V
2.5 CL = 30 pF, VIH = 2.5V, VIL = 0V 0.6
VOLV Quiet Output Dynamic Valley VOL 3.3 CL = 50 pF, VIH = 3.3V, VIL = 0V –0.8 V
2.5 CL = 30 pF, VIH = 2.5V, VIL = 0V –0.6
Symbol Parameter Conditions Typical Units
CIN Input Capacitance VCC = Open, VI = 0V or VCC 7pF
COUT Output Capacitance VCC = 3.3V, VI = 0V or VCC 8pF
CPD Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, f = 10 MHz 25 pF
74LCX541 Rev. 1.6.1 5
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
AC Loading and Waveforms (Generic for LCX Family)
Figure 1. AC Test Circuit (CL includes probe and jig capacitance)
Waveform for Inverting and
Non-Inverting Functions
Propagation Delay, Pulse Width and
trec Waveforms
3-STATE Output Low Enable and
Disable Times for Logic
3-STATE Output High Enable and
Disable Times for Logic
Setup Time, Hold Time and
Recovery Time for Logic
trise and tfall
Figure 2. Waveforms (Input Characteristics; f = 1MHz, tr = tf = 3ns)
Test Switch
tPLH, tPHL Open
tPZL, tPLZ 6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
tPZH, tPHZ GND
VCC
DUT
CL500
500OPEN tPLH, tPHI
tPZH, tPHZ
tPZL, tPLZ
GND
VI
TEST
SIGNAL
VCC
GND
DATA
IN
DATA
OUT
tpxx tpxx
Vmi
Vmo
VCC
GND
CONTROL
IN
CLOCK
OUTPUT
tPHL tPLH
trec
tW
Vmi
Vmi
Vmo
Vmo
DATA
OUT
OUTPUT
CONTROL
tPZH tPHZ
VCC
GND
Vmi
VOH
VY
Vmo
DATA
IN
CONTROL
INPUT
MR
OR
CLEAR
tS
tS
tH
trec
VCC
GND
VCC
GND
Vmi
Vmi
Vmi
ANY
OUTPUT
trtf
VOH
VOL
10% 10%
90% 90%
Symbol
VCC
3.3V ± 0.3V 2.7V 2.5V ± 0.2V
Vmi 1.5V 1.5V VCC / 2
Vmo 1.5V 1.5V VCC / 2
VxVOL + 0.3V VOL + 0.3V VOL + 0.15V
VyVOH – 0.3V VOH – 0.3V VOH – 0.15V
VCC
VX
VOL
GND
DATA
OUT
OUTPUT
CONTROL
tPZL tPLZ
Vmi
Vmo
74LCX541 Rev. 1.6.1 6
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Schematic Diagram (Generic for LCX Family)
ESD
ESD
Input Stage
Output
Input Stage
P1
P2
P5 X1
GTO™
VCC
VDD
N1
N+/P–D2
P3
P4
N4
N5
N3
N+/P–D4
N+/P–
D6
Data
Enable
N2
74LCX541 Rev. 1.6.1 7
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Tape and Reel Specification
Tape Format for DQFN
Tape Dimensions inches (millimeters)
Reel Dimensions inches (millimeters)
Package
Designator
Tape
Section
Number
Cavities
Cavity
Status
Cover Tape
Status
BQX Leader (Start End) 125 (typ) Empty Sealed
Carrier 3000 Filled Sealed
Trailer (Hub End) 75 (typ) Empty Sealed
Tape Size A B C D N W1 W2
12mm 13.0 (330.0) 0.059 (1.50) 0.512 (13.00) 0.795 (20.20) 2.165 (55.00) 0.488 (12.4) 0.724 (18.4)
74LCX541 Rev. 1.6.1 8
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions
Figure 3. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
0.10 C
C
A
SEE DETAIL A
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-013, VARIATION AC, ISSUE E
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
E) LANDPATTERN STANDARD: SOIC127P1030X265-20L
PIN ONE
INDICATOR
0.25
110
BC A
M
20 11
B
X 45°
8°
0°
SEATING PLANE
GAGE PLANE
DETAIL A
SCALE: 2:1
SEATING PLANE
LAND PATTERN RECOMMENDATION
F) DRAWING FILENAME: MKT-M20BREV3
0.65
1.27
2.25
9.50
13.00
12.60
11.43
7.60
7.40
10.65
10.00
0.51
0.35 1.27
2.65 MAX
0.30
0.10
0.33
0.20
0.75
0.25
(R0.10)
(R0.10)
1.27
0.40
(1.40)
0.25
D) CONFORMS TO ASME Y14.5M-1994
74LCX541 Rev. 1.6.1 9
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued)
Figure 4. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
74LCX541 Rev. 1.6.1 10
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued)
Figure 5. 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
74LCX541 Rev. 1.6.1 11
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued)
Figure 6. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
74LCX541 Rev. 1.6.1 12
©2006 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX541 — Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs
Physical Dimensions (Continued)
Figure 7. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
74LCX541 Rev. 1.6.1 13
© Fairchild Semiconductor Corporation www.fairchildsemi.com
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The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
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A
X-CAP®*
BitSiC
¥
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¥
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PLUS¥
Core
POWER¥
CROSSVOLT
¥
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¥
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¥
DEUXPEED
®
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Cool™
EcoSPARK
®
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ientMax¥
E
SBC¥
Fairchild
®
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Semiconductor®
FACT Quiet Series
¥
FACT
®
FAST
®
FastvCore
¥
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¥
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¥
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FRFET
®
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SM
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¥
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¥
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¥ e-Series¥
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max¥
GTO
¥
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¥
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¥
Making Small Speakers Sound Louder
and Better™
MegaBuck
¥
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¥
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¥
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¥
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¥
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®
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¥
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®
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®
®
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®
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¥
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®
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¥
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¥
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Saving our world, 1mW
/W/kW
at a time™
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¥
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®
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¥
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®
SuperSOT
¥-3
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¥-6
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¥-8
SupreMOS
®
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¥
Sync-Lock™
®*
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®
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¥
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ranSiC¥
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¥
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RUECURRENT®*
PSerDes¥
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®
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¥
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¥
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¥
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XS™
* Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE
SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN,
WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain
life, and (c) whose failure to pe
rform when properly used in
accordance with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the user.
2. A critical component in any component of a life support, device, or
system whose failure to
perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its
safety or effectiveness.
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Fairchild Semiconductor Corporation's Anti-Counterfeiting Policy. Fairchild's Anti-Counterfeiting Policy is also stated on our external website, www.fairchildsemi.com,
under Sales Support.
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufacturers of semiconductor products are experiencing counterfeiting of their
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applications, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the
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Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative
/
In Design
Preliminary First Production
No Identification Needed
Full Production
Obsolete
Not In Production
Rev. I66
®
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