1. General description
The 74LV4066 is a low-voltage Si-gate CMOS device that is pin and function compatible
with the 74HC4066 and 74HCT4066.
The 74LV4066 has four independent switches. Each switch has two input/output pins
(nY, nZ) and an active HIGH enable input pin (nE). When nE is LOW the corresponding
analog switch is turned off.
The 74LV4066 has a ON-resistance which is reduced in comparison with the 74HCT4066.
2. Features
Optimized for low-voltage applications: 1.0 V to 3.6 V
Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Very low ON-resistance:
60 (typical) at VCC = 2.0 V
35 (typical) at VCC = 3.0 V
25 (typical) at VCC = 4.5 V
ESD protection:
HBM EIA/JESD22-A114C exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
Specified from 40 °Cto+80°C and from 40 °C to +125 °C
74LV4066
Quad bilateral switches
Rev. 03 — 4 July 2005 Product data sheet
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 2 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
3. Quick reference data
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD=C
PD ×VCC2×fi×N+Σ[(CL+C
S)×VCC2×fo] where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
CS= maximum switch capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ[(CL+C
S)×VCC2×fo] = sum of the outputs.
[2] The condition is VI= GND to VCC.
4. Ordering information
Table 1: Quick reference data
GND = 0 V; T
amb
=25
°
C; t
r
=t
f
2.5 ns; C
L
= 15 pF; R
L
=1k
.
Symbol Parameter Conditions Min Typ Max Unit
tPZL, tPZH turn-on time nE to Vos VCC = 3.3 V - 10 - ns
tPLZ, tPHZ turn-off time nE to Vos VCC = 3.3 V - 13 - ns
Ciinput capacitance - 3.5 - pF
CSmaximum switch
capacitance -8-pF
CPD power dissipation
capacitance per switch VCC = 3.3 V [1] [2] -11-pF
Table 2: Ordering information
Type number Package
Temperature range Name Description Version
74LV4066N 40 °C to +125 °C DIP14 plastic dual in-line package;
14 leads (300 mil) SOT27-1
74LV4066D 40 °C to +125 °C SO14 plastic small outline package;
14 leads; body width 3.9 mm SOT108-1
74LV4066DB 40 °C to +125 °C SSOP14 plastic shrink small outline package;
14 leads; body width 5.3 mm SOT337-1
74LV4066PW 40 °C to +125 °C TSSOP14 plastic thin shrink small outline
package; 14 leads; body width
4.4 mm
SOT402-1
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 3 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
5. Functional diagram
Fig 1. Logic symbol Fig 2. IEC logic diagram
Fig 3. Logic diagram (one switch)
001aad269
1Y 1Z
12
2Y 2Z
43
1E
13
3Y 3Z
89
4Y 4Z
11 10
3E
6
4E
12
2E
5
001aad270
12
13 #
43
5#
89
6#
11 10
(a)
12 #
12
13 1
X1
1
X1
1
X1
1
1
1
1
1
X1
#
43
5#
89
6#
11 10
(b)
12 #
001aad271
GND nZ
nE
nY
VCC VCC
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 4 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
6. Pinning information
6.1 Pinning
6.2 Pin description
7. Functional description
7.1 Function table
Fig 4. Pin configuration
4066
1Y VCC
1Z 1E
2Z 4E
2Y 4Y
2E 4Z
3E 3Z
GND 3Y
001aad268
1
2
3
4
5
6
7 8
10
9
12
11
14
13
Table 3: Pin description
Symbol Pin Description
1Y 1 independent input or output
1Z 2 independent output or input
2Z 3 independent output or input
2Y 4 independent input or output
2E 5 enable input
3E 6 enable input
GND 7 ground (0 V)
3Y 8 independent input or output
3Z 9 independent output or input
4Z 10 independent output or input
4Y 11 independent input or output
4E 12 enable input
1E 13 enable input
VCC 14 supply voltage
Table 4: Function table
Input nE Switch
LOW off
HIGH on
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 5 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] DIP14 package: Ptot derates linearly with 12 mW/K above 70 °C.
[3] SO14 package: Ptot derates linearly with 8 mW/K above 70 °C.
[4] (T)SSOP14 package: Ptot derates linearly with 5.5 mW/K above 60 °C.
9. Recommended operating conditions
[1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to
function down to VCC = 1.0 V (with input levels GND or VCC).
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7.0 V
IIK input diode current VI<0.5 V or VI> VCC + 0.5 V - ±20 mA
IOK output diode current VO<0.5 V or VO > VCC + 0.5 V - ±50 mA
ISswitch source or sink
current VO=0.5 V to (VCC + 0.5 V) [1] -±25 mA
Tstg storage temperature 65 +150 °C
Ptot total power dissipation Tamb =40 °C to +125 °C
DIP14 package [2] - 750 mW
SO14 package [3] - 500 mW
(T)SSOP14 package [4] 400 mW
Table 6: Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage [1] 1.0 3.3 6 V
VIinput voltage 0 - VCC V
VOoutput voltage 0 - VCC V
Tamb ambient temperature in free air 40 - +125 °C
tr, tfinput rise and fall times VCC = 1.0 V to 2.0 V - - 500 ns/V
VCC = 2.0 V to 2.7 V - - 200 ns/V
VCC = 2.7 V to 3.6 V - - 100 ns/V
VCC = 3.6 V to 5.5 V - - 50 ns/V
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 6 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
10. Static characteristics
Table 7: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 40 °C to +85 °C
VIH HIGH-level input voltage VCC = 1.2 V 0.90 - - V
VCC = 2.0 V 1.40 - - V
VCC = 2.7 V to 3.6 V 2.00 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.20 - - V
VIL LOW-level input voltage VCC = 1.2 V - - 0.30 V
VCC = 2.0 V - - 0.60 V
VCC = 2.7 V to 3.6 V - - 0.80 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.80 V
ILI input leakage current VI = VCC or GND
VCC = 3.6 V - - 1.0 µA
VCC = 6.0 V - - 2.0 µA
IS(OFF) analog switch OFF-state
current VI = VIH or VIL; see Figure 5
VCC = 3.6 V - - 1.0 µA
VCC = 6.0 V - - 2.0 µA
IS(ON) analog switch ON-state
current VI = VIH or VIL; see Figure 6
VCC = 3.6 V - - 1.0 µA
VCC = 6.0 V - - 2.0 µA
ICC supply current VI = VCC or GND; IO = 0 A
VCC = 3.6 V - - 20 µA
VCC = 6.0 V - - 40 µA
ICC additional supply current
per input VI = VCC 0.6 V;
VCC = 2.7 V to 3.6 V - - 500 µA
Ciinput capacitance - 3.5 - pF
Tamb = 40 °C to +125 °C
VIH HIGH-level input voltage VCC = 1.2 V 0.90 - - V
VCC = 2.0 V 1.40 - - V
VCC = 2.7 V to 3.6 V 2.00 - - V
VCC = 4.5 V 3.15 - - V
VCC = 6.0 V 4.20 V
VIL LOW-level input voltage VCC = 1.2 V - - 0.30 V
VCC = 2.0 V - - 0.60 V
VCC = 2.7 V to 3.6 V - - 0.80 V
VCC = 4.5 V - - 1.35 V
VCC = 6.0 V - - 1.80 V
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 7 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
ILI input leakage current VI = VCC or GND
VCC = 3.6 V - - 1.0 µA
VCC = 6.0 V - - 2.0 µA
IS(OFF) analog switch OFF-state
current VI = VIH or VIL; see Figure 5
VCC = 3.6 V - - 1.0 µA
VCC = 6.0 V - - 2.0 µA
IS(ON) analog switch ON-state
current VI = VIH or VIL; see Figure 6
VCC = 3.6 V - - 1.0 µA
VCC = 6.0 V - - 2.0 µA
ICC supply current VI = VCC or GND; IO = 0 A
VCC = 3.6 V - - 40 µA
VCC = 6.0 V - - 80 µA
ICC additional supply current
per input VI = VCC 0.6 V;
VCC = 2.7 V to 3.6 V - - 850 µA
Fig 5. Testcircuitformeasuring OFF-state
current Fig 6. Test circuit for measuring ON-state
current
Table 7: Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
AA
001aad273
GND
VI = VCC or GND VO = GND or VCC
nY nZ
VIL nE
AA
001aad274
GND
VI = VCC or GND VO (open circuit)
nY nZ
VIH nE
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 8 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
Table 8: ON-resistance
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test
circuit see Figure 7.
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 40 °C to +85 °C[1]; see Figure 8
RON(peak) ON-resistance (peak) VI = VIH or VIL
VCC = 1.2 V [2] - 300 -
VCC = 2.0 V - 60 130
VCC = 2.7 V - 41 60
VCC = 3.0 V to 3.6 V - 37 72
VCC = 4.5 V - 25 52
VCC = 6.0 V - 23 47
RON(rail) ON-resistance (rail) VI = VIH or VIL; Vis = GND
VCC = 1.2 V [2] -75-
VCC = 2.0 V - 35 98
VCC = 2.7 V - 26 60
VCC = 3.0 V to 3.6 V - 24 52
VCC = 4.5 V - 15 40
VCC = 6.0 V - 13 35
VI = VIH or VIL; Vis =V
CC
VCC = 1.2 V [2] -75-
VCC = 2.0 V - 40 110
VCC = 2.7 V - 35 72
VCC = 3.0 V to 3.6 V - 30 65
VCC = 4.5 V - 22 47
VCC = 6.0 V - 20 40
RON(flatness) ON-resistance
(flatness) VI = VIH or VIL; Vis =V
CC
VCC = 2.0 V - 5 -
VCC = 2.7 V - 4 -
VCC = 3.0 V to 3.6 V - 4 -
VCC = 4.5 V - 3 -
VCC = 6.0 V - 2 -
Tamb = 40 °C to +125 °C
RON(peak) ON-resistance (peak) VI = VIH or VIL
VCC = 2.0 V - - 150
VCC = 2.7 V - - 90
VCC = 3.0 V to 3.6 V - - 83
VCC = 4.5 V - - 60
VCC = 6.0 V - - 54
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 9 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
[1] All typical values are measured at Tamb = 25 °C.
[2] At supply voltage approaching 1.2 V, the analog switch ON-resistance becomes extremely non-linear.
Therefore it is recommended that these devices be used to transmit digital signals only, when using these
supply voltages.
RON(rail) ON-resistance (rail) VI = VIH or VIL; Vis = GND
VCC = 2.0 V - - 115
VCC = 2.7 V - - 68
VCC = 3.0 V to 3.6 V - - 60
VCC = 4.5 V - - 45
VCC = 6.0 V - - 40
VI = VIH or VIL; Vis =V
CC
VCC = 2.0 V - - 130
VCC = 2.7 V - - 85
VCC = 3.0 V to 3.6 V - - 75
VCC = 4.5 V - - 55
VCC = 6.0 V - - 47
Table 8: ON-resistance
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test
circuit see Figure 7.
Symbol Parameter Conditions Min Typ Max Unit
Fig 7. Test circuit for measuring ON-resistance Fig 8. ON-resistance as a function of input voltage
V
001aad272
GND
Vis = 0 V to (VCC GND)
VIH
nY
nE
nZ
Iis
Vis (V)
0 4.83.61.2 2.4
001aad275
40
20
60
80
RON
()
0
VCC = 2.0 V
3.0 V
4.5 V
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 10 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
11. Dynamic characteristics
Table 9: Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter Conditions Min Typ Max Unit
Tamb = 40 °C to +85 °C[1]
tPHL,
tPLH
propagation delay Vis to Vos see Figure 9
VCC = 1.2 V - 8 - ns
VCC = 2.0 V - 5 26 ns
VCC = 2.7 V to 3.6 V - 3 15 ns
VCC = 4.5 V - 2 13 ns
VCC = 6.0 V - 2 10 ns
tPZH,
tPZL
turn-on time nE to Vos see Figure 9
VCC = 1.2 V - 40 - ns
VCC = 2.0 V - 22 43 ns
VCC = 2.7 V to 3.6 V - 12 25 ns
VCC = 3.3 V; CL= 15 pF - 10 - ns
VCC = 4.5 V - 10 21 ns
VCC = 6.0 V - 8 16 ns
tPHZ,
tPLZ
turn-off time nE to Vos see Figure 9
VCC = 1.2 V - 50 - ns
VCC = 2.0 V - 27 65 ns
VCC = 2.7 V to 3.6 V - 15 38 ns
VCC = 3.3 V; CL= 15 pF - 13 - ns
VCC = 4.5 V - 13 32 ns
VCC = 6.0 V - 12 28 ns
CPD power dissipation
capacitance per switch VCC = 3.3 V; CL=15pF [2] [3] -11- pF
Tamb = 40 °C to +125 °C
tPHL,
tPLH
propagation delay Vis to Vos see Figure 9
VCC = 2.0 V - - 31 ns
VCC = 2.7 V to 3.6 V - - 18 ns
VCC = 4.5 V - - 15 ns
VCC = 6.0 V - - 12 ns
tPZH,
tPZL
turn-on time nE to Vos see Figure 9
VCC = 2.0 V - - 51 ns
VCC = 2.7 V to 3.6 V - - 30 ns
VCC = 4.5 V - - 26 ns
VCC = 6.0 V - - 20 ns
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 11 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
[1] Typical values are measured at nominal VCC and Tamb = 25 °C.
[2] CPD is used to determine the dynamic power dissipation (PD in µW).
PD=C
PD ×VCC2×fi×N+Σ[(CL+C
S)×VCC2×fo] where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
CS= maximum switch capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ[(CL+C
S)×VCC2×fo] = sum of the outputs.
[3] The condition is VI= GND to VCC.
tPHZ,
tPLZ
turn-off time nE to Vos see Figure 9
VCC = 2.0 V - - 81 ns
VCC = 2.7 V to 3.6 V - - 47 ns
VCC = 4.5 V - - 40 ns
VCC = 6.0 V - - 34 ns
Table 9: Dynamic characteristics
…continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11.
Symbol Parameter Conditions Min Typ Max Unit
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 12 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
12. Waveforms
Measurement points are given in Table 10.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 9. Input to output propagation delays
Measurement points are given in Table 10.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 10. Turn-on and turn-off times for the inputs to the output
Table 10: Measurement points
Supply voltage Input Output
VCC VMVMVXVY
2.7 V 1.5 V 1.5 V VOL + 0.3 VOH 0.3 V
< 2.7 V 0.5 × VCC 0.5 × VCC VOL + 0.15 VOH 0.15 V
001aad284
Vis
Vos
VM
tPLH tPHL
VM
VM
VM
GND
VI
VOL
VOH
001aad285
tPZL
tPZH
tPHZ
tPLZ
GND
GND
VI
VCC
VOL
VOH
VM
VM
VM
VX
VY
outputs
disabled outputs
enabled
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
nE input
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 13 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
[1] RL=∞Ω for measuring the propagation delays tPLH and tPHL.
a. Input pulse definition
Test data is given in Table 11.
Definitions test circuit:
RL = Load resistor.
CL = Load capacitance includes jig and probe capacitance.
RT = Termination resistance should be equal to Zo of the pulse generator.
VEXT = Test voltage for switching times.
b. Test circuit
Fig 11. Load circuitry for switching times
Table 11: Test data
Supply voltage Input Load VEXT
VCC VItr, tfCLRL[1] tPHZ, tPZH tPLZ, tPZL tPLH, tPHL
< 2.7 V VCC 2.5 ns 50 pF 1 kGND 2 ×VCC open
2.7 V to 3.6 V 2.7 V 2.5 ns 50 pF 1 kGND 2 ×VCC open
4.5 V VCC 2.5 ns 50 pF 1 kGND 2 ×VCC open
001aac221
VMVM
tW
tW
10 %
90 % 90 %
0 V
VI
VI
negative
pulse
positive
pulse
0 V
VMVM
90 %
10 % 10 %
tTHL(tf)
tTLH(tr)
tTLH(tr)
tTHL(tf)
VEXT
VCC
VIVO
mna616
DUT
CL
RT
RL
RL
PULSE
GENERATOR
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 14 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
13. Additional dynamic characteristics
[1] Adjust input voltage Vis is 0 dBm level (0 dBm = 1 mW into 600 ).
[2] Pin nE: square wave between VCC and GND, tr=t
f= 6 ns.
[3] Adjust input voltage Vis is 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 ).
Table 12: Additional dynamic characteristics
Voltages are referenced to GND (ground = 0 V); V
is
is the input voltage at pin nY or nZ, whichever is
assigned as an input; V
os
is the output voltage at pin nY or nZ, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
dsin sine-wave distortion RL=10k; f = 1 kHz;
CL= 50 pF; see Figure 12
VCC = 3.0 V; Vis = 2.75 V (p-p) - 0.04 - %
VCC = 6.0 V; Vis = 5.50 V (p-p) - 0.02 - %
RL=10k; f = 10 kHz;
CL= 50 pF; see Figure 12
VCC = 3.0 V; Vis = 2.75 V (p-p) - 0.12 - %
VCC = 6.0 V; Vis = 5.50 V (p-p) - 0.06 - %
αOFF(feedthru) switch OFF-state
signal feed-through
attenuation
RL= 600 k; f = 1 MHz;
CL= 50 pF; see Figure 13 and
Figure 14
[1]
VCC = 3.0 V - 50 - dB
VCC = 6.0 V - 50 - dB
αct(S) crosstalk between
switches RL= 600 k; f = 1 MHz;
CL= 50 pF; see Figure 15 [1]
VCC = 3.0 V - 60 - dB
VCC = 6.0 V - 60 - dB
Vct(pp) crosstalk voltage
between enable input
to any switch
(peak-to-peak value)
RL= 600 k; f = 1 MHz;
CL= 50 pF; see Figure 16 and
Figure 17
[2]
VCC = 3.0 V - 110 - mV
VCC = 6.0 V - 220 - mV
fmax minimum frequency
response (3 dB) RL=50k; CL=50pF;
see Figure 18 and Figure 19 [3]
VCC = 3.0 V - 180 - MHz
VCC = 6.0 V - 200 - MHz
CSmaximum switch
capacitance -8- pF
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 15 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
Fig 12. Test circuit for measuring sine-wave distortion
001aad282
channel
ON
fin = 1 kHz
sine-wave
VCC
2RL
GND
distortion
meter
nZ/nYnY/nZ Vos
2RLCL
10 µF
Vis
VCC = 3.0 V; GND = 0 V; RL=50;
RSOURCE =1k.
Fig 13. Test circuit for measuring switch OFF-state
signal feed-through Fig 14. Switch OFF-state signal feed-through as a
function of frequency
dB
001aad283
channel
OFF
VCC
2RL
GND
nZ/nYnY/nZ Vos
2RLCL
0.1 µF
Vis
001aad276
60
40
80
20
0
(dB)
100
f (kHz)
10 106
105
102104
103
αOFF(feedthru)
a. Channel on condition b. Channel off condition
Fig 15. Test circuit for measuring crosstalk between switches
001aad314
0.1 µF
Vis
channel
ON
VCC
2RL
GND
nZ/nYnY/nZ
2RL
RL
CLdB
001aad278
channel
OFF
VCC VCC
2RL
GND
nZ/nYnY/nZ Vos
2RL
RLCL
2RL
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 16 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
Fig 16. Test circuit for measuring crosstalk between
enable and any switch Fig 17. Crosstalk definition (oscilloscope output)
oscilloscope
001aad279
VCC nE VCC
GND
VCC
2RL
GND
nZ/nYnY/nZ
2RL
2RLCL
2RL
DUT VCT(pp)
001aad281
VCC = 3.0 V; GND = 0 V; RL=50;
RSOURCE =1k.
Fig 18. Test circuit for measuring minimum frequency
response Fig 19. Frequency response
dB
001aad280
channel
ON
sine-wave
VCC
2RL
GND
nZ/nYnY/nZ Vos
2RLCL
0.1 µF
Vis
001aad277
0
5
Vos
(dB)
5
f (kHz)
10 106
105
102104
103
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 17 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
14. Package outline
Fig 20. Package outline SOT27-1 (DIP14)
UNIT A
max. 1 2 (1) (1)
b1cD (1)
Z
Ee M
H
L
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT27-1 99-12-27
03-02-13
A
min. A
max. bmax.
w
ME
e1
1.73
1.13 0.53
0.38 0.36
0.23 19.50
18.55 6.48
6.20 3.60
3.05 0.2542.54 7.62 8.25
7.80 10.0
8.3 2.24.2 0.51 3.2
0.068
0.044 0.021
0.015 0.77
0.73
0.014
0.009 0.26
0.24 0.14
0.12 0.010.1 0.3 0.32
0.31 0.39
0.33 0.0870.17 0.02 0.13
050G04 MO-001 SC-501-14
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
e
D
A2
Z
14
1
8
7
b
E
pin 1 index
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 18 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
Fig 21. Package outline SOT108-1 (SO14)
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10 1.45
1.25 0.25 0.49
0.36 0.25
0.19 8.75
8.55 4.0
3.8 1.27 6.2
5.8 0.7
0.6 0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT108-1
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
7
8
1
14
y
076E06 MS-012
pin 1 index
0.069 0.010
0.004 0.057
0.049 0.01 0.019
0.014 0.0100
0.0075 0.35
0.34 0.16
0.15 0.05
1.05
0.041
0.244
0.228 0.028
0.024 0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
99-12-27
03-02-19
0 2.5 5 mm
scale
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 19 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
Fig 22. Package outline SOT337-1 (SSOP14)
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.25 0.38
0.25 0.20
0.09 6.4
6.0 5.4
5.2 0.65 1.25 0.2
7.9
7.6 1.03
0.63 0.9
0.7 1.4
0.9 8
0
o
o
0.13 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT337-1 99-12-27
03-02-19
(1)
wM
bp
D
HE
E
Z
e
c
vMA
X
A
y
17
14 8
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
MO-150
pin 1 index
0 2.5 5 mm
scale
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
A
max.
2
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 20 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
Fig 23. Package outline SOT402-1 (TSSOP14)
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 5.1
4.9 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.72
0.38 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT402-1 MO-153 99-12-27
03-02-18
wM
bp
D
Z
e
0.25
17
14 8
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
y
0 2.5 5 mm
scale
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
A
max.
1.1
pin 1 index
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 21 of 23
Philips Semiconductors 74LV4066
Quad bilateral switches
15. Revision history
Table 13: Revision history
Document ID Release date Data sheet status Change notice Doc. number Supersedes
74LV4066_3 20050704 Product data sheet - 9397 750 15209 74LV4066_2
Modifications: The format of this data sheet has been redesigned to comply with the new presentation and
information standard of Philips Semiconductors.
Table 2: corrected package names.
74LV4066_2 19980623 Product specification - 9397 750 04659 -
Philips Semiconductors 74LV4066
Quad bilateral switches
9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 4 July 2005 22 of 23
16. Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
17. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
18. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
19. Trademarks
Notice — All referenced brands, product names, service names and
trademarks are the property of their respective owners.
20. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
Level Data sheet status[1] Product status[2] [3] Definition
I Objective data Development This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
© Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights. Date of release: 4 July 2005
Document number: 9397 750 15209
Published in The Netherlands
Philips Semiconductors 74LV4066
Quad bilateral switches
21. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 4
7.1 Function table. . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Recommended operating conditions. . . . . . . . 5
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 10
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
13 Additional dynamic characteristics . . . . . . . . 14
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 21
16 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 22
17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
18 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
19 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
20 Contact information . . . . . . . . . . . . . . . . . . . . 22