DS3486 www.ti.com SNLS354D - MAY 1998 - REVISED APRIL 2013 DS3486 Quad RS-422, RS-423 Line Receiver Check for Samples: DS3486 FEATURES DESCRIPTION * * * * * * * Texas Instruments' quad RS-422, RS-423 receiver features four independent receivers which comply with EIA Standards for the electrical characteristics of balanced/unbalanced voltage digital interface circuits. Receiver outputs are 74LS compatible, TRI-STATE structures which are forced to a high impedance state when the appropriate output control pin reaches a logic zero condition. A PNP device buffers each output control pin to assure minimum loading for either logic one or logic zero inputs. In addition, each receiver has internal hysteresis circuitry to improve noise margin and discourage output instability for slowly changing input waveforms. 1 2 Four Independent Receivers TRI-STATE Outputs Internal Hysteresis -140 mV (typ) Fast Propagation Times -19 ns (typ) TTL Compatible Outputs 5V Supply Pin Compatible and Interchangeable with MC3486 Block and Connection Diagrams Figure 1. Dual-In-Line Package Top View D-16 (SOIC) Package or NFG0016E (PDIP) Package 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1998-2013, Texas Instruments Incorporated DS3486 SNLS354D - MAY 1998 - REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Power Supply Voltage, VCC 8V Input Common-Mode Voltage, VICM 25V Input Differential Voltage, VID 25V TRI-STATE Control Input Voltage, VI 8V Output Sink Current, IO 50 mA -65C to +150C Storage Temperature, TSTG Maximum Power Dissipation (3) at 25C Molded PDIP Package 1362 mW SOIC Package 1002 mW SOIC Package Thermal Resistance JA +124.5C/W JC +41.2C/W (1) "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be ensured. They are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation. If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications. Derate PDIP molded package 10.2 mW/C above 25C. Derate SOIC package 8.01 mW/C above 25C. (2) (3) Operating Conditions Max Min Power Supply Voltage, VCC 4.75 5.25 V Operating Temperature, TA 0 70 C -7.0 7.0 V Input Common-Mode Voltage Units Range, VICR Electrical Characteristics (1) (Unless otherwise noted, minimum and maximum limits apply over recommended temperature and power supply voltage ranges. Typical values are for TA = 25C, VCC = 5V and VIC = 0V.) Symbol Parameter VIH Input Voltage--High Logic State (TRI-STATE Control) VIL Input Voltage--Low Logic State (TRI-STATE Control) VTH(D) Differential Input Threshold Voltage IIB Input Bias Current (D) Conditions (2) 2 Typ Max 2.0 Units V 0.8 V -7V VIC 7V, VIH TRI-STATE = 2V IO = -0.4 mA, VOH 2.7V 0.070 0.2 V IO = 8 mA, VOL 0.5V 0.070 -0.2 V VI = -10V -3.25 mA VI = -3V -1.50 mA VI = 3V 1.50 mA VI = 10V 3.25 mA VCC = 0V or 5.25V, Other Inputs at 0V -7V VIC 7V, VIH(3C) = 2V, Input Balance (1) Min (2) VOH IO = -0.4 mA, VID = 0.4V VOL IO = 8 mA, VID = -0.4V 2.7 V 0.5 V All currents into device pins are shown as positive, out of device pins are negative. All voltages referenced to ground unless otherwise noted. Refer to EIA RS-422/3 for exact conditions. Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS3486 DS3486 www.ti.com SNLS354D - MAY 1998 - REVISED APRIL 2013 Electrical Characteristics (1) (continued) (Unless otherwise noted, minimum and maximum limits apply over recommended temperature and power supply voltage ranges. Typical values are for TA = 25C, VCC = 5V and VIC = 0V.) Symbol Parameter Conditions IOZ Output TRI-STATE Leakage Current IOS Output Short-Circuit Current Min Typ VI(D) = 3V, VIL = 0.8V, VOL = 0.5V VI(D) = -3V, VIL = 0.8V, VOH = 2.7V -15 VI(D) = 3V, VIHTRI-STATE = 2V, VO = 0V, Max Units -40 A 40 A -100 mA -100 A (3) IIL Input Current--Low Logic State (TRI-STATE Control) VIL = 0.5V IIH Input Current--High Logic State (TRI-STATE Control) VIH = 2.7V 20 A VIH = 5.25V 100 A VIC Input Clamp Diode Voltage (TRI-STATE Control) IIN = -10 mA -1.5 V ICC Power Supply Current All Inputs VIL = 0V 85 mA (3) Only one output at a time should be shorted. Switching Characteristics (Unless otherwise noted, VCC = 5V and TA = 25C.) Symbol tPHL(D) tPLH(D) Parameter Propagation Delay Time--Differential Inputs to Output Output High to Low Output Low to High Min Typ Max Units 19 35 ns 19 30 ns tPLZ TRI-STATE Control to Output Output Low to TRI-STATE 23 35 ns tPHZ Output High to TRI-STATE 25 35 ns tPZH Output TRI-STATE to High 18 30 ns tPZL Output TRI-STATE to Low 20 30 ns AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS3486 3 DS3486 SNLS354D - MAY 1998 - REVISED APRIL 2013 www.ti.com Input pulse characteristics: tTLH = tTHL = 6 ns (10% to 90%) PRR = 1 MHz, 50% duty cycle Figure 2. Propagation Delay Differential Input to Output 1.5V for tPHZ and tPLZ 1.5V for tPLZ and tPZL Input pulse characteristics: tTLH = tTHL = 6 ns (10% to 90%) PRR = 1 MHz, 50% duty cycle tPLZ 4 Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS3486 DS3486 www.ti.com SNLS354D - MAY 1998 - REVISED APRIL 2013 tPHZ tPZH tPZL Figure 3. Propagation Delay TRI-STATE Control Input to Output Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS3486 5 DS3486 SNLS354D - MAY 1998 - REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision C (April 2013) to Revision D * 6 Page Changed layout of National Data Sheet to TI format ............................................................................................................ 5 Submit Documentation Feedback Copyright (c) 1998-2013, Texas Instruments Incorporated Product Folder Links: DS3486 PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) DS3486M/NOPB ACTIVE SOIC D 16 48 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 DS3486M DS3486MX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM 0 to 70 DS3486M (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 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Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device DS3486MX/NOPB Package Package Pins Type Drawing SOIC D 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 10.3 2.3 8.0 W Pin1 (mm) Quadrant 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DS3486MX/NOPB SOIC D 16 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES "AS IS" AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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