RT9186AGQV(Z00) - Richtek Technology

RT9186A

DS9186A-14 November 2017 www.richtek.com

Pin Configuration

Low Profile 500mA LDO with Enable and Power Good

Ordering Information

Features



2.5V to 5.5V Wide Input Range



Guaranteed 500mA Output Current



Low 160mV Dropout at 500mA



1.8V/2.5V/3.3V Preset Output Voltage Version with

Adjustable Range from 0.8V to 4.5V.



Power Good Output



Low 190μμ

μμ

μA Ground Pin Current



0.1μμ

μμ

μA Shutdown Current



Thermal and Over Current Protection



RoHS Compliant and 100% Lead (Pb)-Free

Applications

Notebook Computer

PDAs/SHDs

PCMCIA/Cardbus Card Product

Mobile Phone

Marking Information

For marking information, contact our sales representative

directly or through a Richtek distributor located in your

area.

(TOP VIEW)

General Description

The RT9186A is a low-dropout linear regulator providing

up to 500mA load current with 160mV dropout. It is

especially designed for the application of portable and

smart handheld device.

The RT9186A operates from 2.5V to 5.5V supply. The

internal P-MOSFET pass transistor allows the regulator

to work with 190μA low quiescent current. Its preset output

voltage version covers the most frequently used values,

including 1.8V/2.5V/3.3V. Output voltage can also be

adjusted via the ADJ pin for those other than the preset

values.

With only 0.1μA required in the shut down mode, one

enable pin is able to control output on/off. The RT9186A

contains PGOOD function.

Note :

Richtek products are :

 RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

 Suitable for use in SnPb or Pb-free soldering processes.

MSOP-8 VDFN-8L 3x3

VIN VOUT

VOUT

ADJ

GND

PGOOD

VIN

VOUT

ADJ

GND

PGOOG NC

RT9186A

Package Type

F : MSOP-8

QV : VDFN-8L 3x3 (V-Type)

Lead Plating System

P : Pb Free

G : Green (Halogen Free and Pb Free)

Output Voltage

Default : Adjustable

18 : 1.8V

25 : 2.5V

33 : 3.3V

A : Power Good Function

RT9186A

DS9186A-14 November 2017www.richtek.com

Typical Application Circuit

Figure 1. Fixed Voltage Regulator

Figure 2. Adjustable Voltage Regulator

Note1 : R2 should be less than 80k to ensure regulation.

Note2 : X5R or X7R input capacitor ≥≥

≥≥

≥ 1μμ

μμ

μF is recommended for output stability.

Function Pin Description

OUT

V 0.8 (1)



Pin Number Pin Name Pin Functi on

MSOP-8 VDFN-8L 3x3

1, 2 1, 2 VIN Power input voltage.

3 3 PGOOD Power good indicator.

4 4 EN

Enable control input (Active-High). There should be a pull low resistor

100k connected to GND when the control signal is floating.

5 5 GND Ground.

6 6 ADJ Output voltage setting. Connect to GND for Fixed output voltage model.

7, 8 7, 8 VOUT Output voltage.

9 9 NC No internal connection.

VIN

GND

VOUT

ADJ

RT9186A

VOUT

COUT

CIN

VIN

100k 10µF

To C

1µF

Enable

RPGOOD/RST

PGOOD

VIN

GND

VOUT

ADJ

RT9186A

VOUT

COUT

CIN

VIN

To C

100k

10µF

1µF

Enable

RPGOOD/RST

PGOOD

RT9186A

DS9186A-14 November 2017 www.richtek.com

Functional Block Diagram

Thermal

Shutdown

VOUT

Shutdown

Logic

GND

Output Mode

Comparator

ADJ

VIN

Error

Amplifier

0.8V

Reference

Current Limit

Sensor +

100mV

PGOOD

80%

Reference

RT9186A

DS9186A-14 November 2017www.richtek.com

Timing Diagram

Recommended Operating Conditions (Note 4)

Input Voltage ----------------------------------------------------------------------------------------------------------------- 2.5V to 5.5V

Junction Temperature Range --------------------------------------------------------------------------------------------- −40°C to 125°C

Ambient Temperature Range --------------------------------------------------------------------------------------------- −40°C to 85°C

Absolute Maximum Ratings (Note 1)

Input Voltage ----------------------------------------------------------------------------------------------------------------- 7V

Storage Temperature Range --------------------------------------------------------------------------------------------- −65°C to 150°C

Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------------- 260°C

Power Dissipation, PD @ TA = 25°C

MSOP-8 ---------------------------------------------------------------------------------------------------------------------- 0.625W

VDFN-8L 3x3 ---------------------------------------------------------------------------------------------------------------- 0.952W

Package Thermal Resistance (Note 2)

MSOP-8, θJA ----------------------------------------------------------------------------------------------------------------- 160°C/W

VDFN-8L 3x3, θJA ----------------------------------------------------------------------------------------------------------- 105°C/W

Junction Temperature ------------------------------------------------------------------------------------------------------ 150°C

ESD Susceptibility (Note 3)

HBM (Human Body Model) ----------------------------------------------------------------------------------------------- 2kV

VIN

VOUT

PGOOD Function

80% of VOUT (Normal)

RT9186A

DS9186A-14 November 2017 www.richtek.com

Electrical Characteristics

(VIN = VOUT(NOM) + 500mV or VIN = +2.5V (whichever is greater), TA = 25°C, unless otherwise specified)

Parameter Symbol Test Conditions Min Typ Max Unit

General Specification

Input Under Voltage Lock-Out VUVLO 2.0 2.3 2.4 V

Output Voltage Accuracy

(Preset Mode) VOUT I

OUT = 1mA to 500mA 3 0 3 %

Adjustable Output Voltage Range VOUT_ADJ 0.8 -- 4.5 V

ADJ Pin Voltage VADJ 0.784 0.8 0.816 V

ADJ Input Bias Current IADJ V

ADJ = +0.8V -- 10 100 nA

Short Circuit Current Limit ILIM V

OUT = 0V 0.9 1.4 2.0 A

Quiescent Current (Note 5) IQ I

OUT = 0mA -- 190 250 A

Dropout Voltage (Note 6) VDROP I

OUT = 500mA VOUT = 2.5V -- 200 330 mV

VOUT = 3.3V -- 160 220

Line Regulation VLINE VOUT + 0.1V  VIN  5.5V

IOUT = 5mA -- 0.02 0.125 %/V

Load Regulation (Note 7) VLOAD I

OUT = 1mA to 500mA -- 21 40 mV

Chip Enable

Standby Current ISTBY V

IN = 5.5V -- 0.1 2 A

EN Threshold

Voltage

Logic-Low VENL V

IN = 2.5V -- -- 0.7 V

Logic-High VENH V

IN = 5.5V 1.6 -- --

EN Input Bias Current IEN V

CE = 5.5V -- 20 100 nA

Power G oo d

PGOOD Output Low Voltage PGOOD Output sinking 2mA -- 50 100 mV

Output High Leakage Current VPGOOD = 5V -- -- 100 nA

Threshold to Output Voltage Rising edge, referred to VOUT 77 80 83 %

Thermal Protection

Thermal Shutdown Temperature TSD -- 160 -- C

Thermal Shutdown Hysteresis TSD -- 30 -- C

RT9186A

DS9186A-14 November 2017www.richtek.com

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may

affect device reliability.

Note 2. θJA is measured at TA = 25°C on a single-layer and four-layer test board of JEDEC 51. The measurement case position

of θJC is on the lead of the package.

Note 3. Devices are ESD sensitive. Handling precaution is highly recommended.

Note 4. The operating conditions beyond the recommended range is not guaranteed.

Note 5. Quiescent, or ground current, is the difference between input and output currents. It is defined by IQ = IIN - IOUT under

no load condition (IOUT = 0mA). The total current drawn from the supply is the sum of the load current plus the ground

pin current.

Note 6. The dropout voltage is defined as VIN -VOUT, which is measured when VOUT is VOUT(NORMAL) − 100mV.

Note 7. Regulation is measured at constant junction temperature by using a 20ms current pulse. Devices are tested for load

regulation in the load range from 1mA to 300mA and 500mA respectively.

RT9186A

DS9186A-14 November 2017 www.richtek.com

Output Voltage vs . Te mp e rature

1.7

1.9

2.1

2.3

2.5

2.7

2.9

3.1

3.3

-50 -25 0 25 50 75 100 125

Temperature (°C)

Output Volatge (V)

Quiescent Current vs. Temperature

130

150

170

190

210

230

-50 -25 0 25 50 75 100 125

Temperature (°C)

Quiescent Current (µA) 1

Short Circuit Current Limit vs. Tempe rature

1.40

1.45

1.50

1.55

1.60

-50 -25 0 25 50 75 100 125

Temperature (°C)

Short Circuit Current Limit (A)1

Typical Operating Characteristics

CIN = 1μμ

μμ

μF(X7R Cera mic), COUT = 10μμ

μμ

μF(Y5V Ceramic), TA = 25°°

°°

°C, unless otherwise specified.

VEN = VIN = 3.3V

VOUT = 1.8V

RL = 0 Ω

Input Voltage vs. Output Voltage

0.5

1.5

2.5

3.5

2 2.7 3.4 4.1 4.8 5.5

Input Voltage (V)

Output Voltage (V)

No Load

ILOAD = 500mA

VOUT = 3.3V

Output Voltage vs. Input Voltage

VOUT = 2.5V

VOUT = 1.8V

VOUT = 3.3V

VEN = VIN = 5V

RL =

VEN = VIN = 3.3V

VOUT = 1.8V

RL =

Time (1ms/Div)

VEN = VIN = 3.3V

VOUT = 1.8V

RL = 0 Ω

Short Circuit Current Limit (A)

1.5

0.5

Short Circuit Current Limit

Dropout Voltage vs . Load Current

100

150

200

250

0 100 200 300 400 500

Load Current (mA)

Dropout Voltage (mV)

VOUT = 2.5V TJ = 125°C

TJ = −40°C

TJ = 25°C

RT9186A

DS9186A-14 November 2017www.richtek.com

PGOOD Response

Time (1ms/Div)

VEN (2V/Div)

VOUT (2V/Div)

VPGOOD (2V/Div)

ILOAD = 50mA

VOUT = 3.3V

VIN = 3.8V

Line Transient Response

Input

Voltage(V)

Output Voltage

Deviation(mV)

-20

ILOAD = 100mA

VOUT = 1.8V

Without CIN

Time (50μs/Div)

Load Transient Response

Time (50μs/Div)

Load

Current (A)

-20

0.4

0.2

0VOUT = 1.8V

VIN = 3.3V

ILOAD = 1 to 250mA

Output Voltage

Deviation(mV)

Shutdown Response

Time (100μs/Div)

EN Voltage

(V)

Output

Voltage (V)

ILOAD = 500mA, VOUT = 3.3V, VIN = 5V

RT9186A

DS9186A-14 November 2017 www.richtek.com

Application Information

Capacitor Selection and Regulator Stability

Careful selection of the external capacitors for the RT9186A

is highly recommended in order to remain high stability

and performance.

Regarding the Input capacitor, connecting an X7R or X5R

ceramic capacitor which is ≥ 1μF between input and ground

is a must. Distance less than 1 cm between input pin and

ground of the RT9186A is recommended to avoid any

unstability. With larger value of capacitor adding on lower

ESR could result in better performance for both PSRR

and line transient response.

Regarding the output capacitor, connecting a10μF

capacitor between output and ground is a must. Any

capacitor is acceptable only with a highlight of relation

between ESR region and Load current, shown in below.

Output capacitor with larger capacitance can reduce noise

and improve load transient response, stability, and PSRR.

The same as Input capacitor, distance less than 1 cm

between output pin and ground of the RT9186A is

recommended to avoid any unstability.

Region of Stable COUT ESR vs. L o ad Curren t

0.01

0.10

1.00

10.00

100.00

0 100 200 300 400 500

Load Current (mA)

COUT ESR (Ω)

Instable

Stable

100 VIN = 3V

0.01

0.10

Input-Output (Dropout) Voltage

A regulator's minimum input-to-output voltage differential

(dropout voltage) determines the lowest usable supply

voltage. In battery-powered systems, this determines the

useful end-of-life battery voltage. Because the device uses

a P-MOSFET, its dropout voltage is a function of drain-to-

source on-resistance, RDS(ON), multiplied by the load

current :

VDROPOUT = VIN − VOUT = RDS(ON) IOUT

Over-Current and Short-Circuit Protection

The RT9186A continuously monitors output current to

provide maximum safety. In the event of output over current

or short-circuit, over-current protection function will activate

and override the voltage regulation function to limit output

current at 1.4A typically. Large power dissipation at this

condition may cause chip temperature to raise and trigger

the over temperature protection if over-current or short-

circuit is not removed in a short time

Power Good

The power good is an open-drain output. Connect an

100kΩ pull up resistor to VOUT to obtain an output voltage.

The power good will output high immediately after the

output voltage arrives 80% of normal output voltage. See

Timing Diagram and Typical Operating Characteristics.

Adjustable Operation

The output voltage of the RT9186A is adjustable from 0.8V

to 4.5V by an external voltage divider as shown in Typical

Application Circuit Figure 2. The value of R2 should be

less than 80kΩ to ensure regulation.

Chip Enable Operation

Pull the EN pin low to drive the device into shutdown mode.

At the same time, pin 3 (PGOOD) is pulled low. During

shutdown mode, the standby current drops to 0.1μA (typ).

The output voltage decay rate is determined by the external

capacitor and load current. Drive the EN pin high to turn

on the device again.

Reverse Current Path

RT9186A

DS9186A-14 November 2017www.richtek.com

The P-MOSFET pass element of the RT9186A has an

inherendiode connected between the regulator input and

output as shown in Figure 3. The inherent diode will be

forward biased and conduct an unlimited current if VOUT is

sufficiently higher than VIN. a Schottky diode is

recommended connecting parallel with the inherent diode

in the application where output voltage may be higher than

input voltage as shown in Figure 4. This Schottkly will

clamp the forward bias voltage to 0.3V and conduct the

possible current to protect the RT9186A from damage by

unlimited current.

VIN VOUT

Figure 3. Inherent Diode of P-MOSFET Pass Transistor

Figure 4. Schottkly Diode Parallel with The Ingerent Diode

Thermal Considerations

Thermal protection limits power dissipation in the

RT9186A. When the operation junction temperature

exceeds 160°C, the OTP circuit starts the thermal

shutdown function and turns the pass element off. The

pass element turn on again after the junction temperature

cools by 30°C.

For continuous operation, do not exceed absolute

maximum operation junction temperature 125°C. The

power dissipation definition in device is :

PD = (VIN − VOUT) x IOUT + VIN x IQ

Figure 5

The maximum power dissipation depends on the thermal

resistance of IC package, PCB layout, the rate of

surroundings airflow and temperature difference between

junction to ambient. The maximum power dissipation can

be calculated by following formula :

PD(MAX) = (TJ(MAX) − TA) / θJA

Where TJ(MAX) is the maximum operation junction

temperature 125°C, TA is the ambient temperature and the

θJA is the junction to ambient thermal resistance.

For recommended operating conditions specification of

the RT9186A, where TJ(MAX) is the maximum junction

temperature of the die (125°C) and TA is the maximum

ambient temperature. The junction to ambient thermal

resistance θJA is layout dependent. For VDFN-8L 3x3

package, the thermal resistance θJA is 105°C/W on the

standard JEDEC 51-3 single-layer 1S thermal test board

and 70°C/W on the standard JEDEC 51-7 4-layers 2S2P

thermal test board. The maximum power dissipation at

TA = 25°C can be calculated by following formula :

PD(MAX) = (125°C − 25°C) / 105 = 0.952W for single-layer

1S board

PD(MAX) = (125°C − 25°C) / 70 = 1.428W for 4-layers

2S2P board

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resistance θJA. The Figure 5 of derating curves allows the

designer to see the effect of rising ambient temperature

on the maximum power allowed.

250

500

750

1000

1250

1500

0 25 50 75 100 125

Ambient Temperature (°C)

Maximum Power Dissipation (mW)

DFN-8L at 4-Layers PCB

MSOP-8 at 1-Layers PCB

DFN-8L at 1-Layers PCB

RT9186A

DS9186A-14 November 2017 www.richtek.com

Layout Consideration

Good board layout practices must be used or instability

can be induced because of ground loops and voltage drops.

The input and output capacitors MUST be directly

connected to the input, output, and ground pins of the

device using traces which have no other currents flowing

through them.

The best way to do this is to layout CIN and COUT near the

device with short traces to the VIN, VOUT, and ground pins.

The regulator ground pin should be connected to the

external circuit ground so that the regulator and its

capacitors have a “single point ground”.

It should be noted that stability problems have been seen

in applications where “vias” to an internal ground plane

were used at the ground points of the device and the input

and output capacitors. This was caused by varying ground

potentials at these nodes resulting from current flowing

through the ground plane. Using a single point ground

technique for the regulator and it’s capacitors fixed the

problem. Since high current flows through the traces going

into VIN and coming from VOUT, Kelvin connect the capacitor

leads to these pins so there is no voltage drop in series

with the input and output capacitors.

Optimum performance can only be achieved when the

device is mounted on a PC board according to the

MSOP-8 Board Layout diagram.

MSOP-8 Board Layout

GND

SET

VOUT

VIN

GND

PGOOD

RT9186A

DS9186A-14 November 2017www.richtek.com

Outline Dimension

EE1

bA1 A2

8-Lead MSOP Plastic Package

Dimension s In Millimet ers Dimensions In Inches

Symbol Min Max Min Max

A 0.810 1.100 0.032 0.043

A1 0.000 0.150 0.000 0.006

A2 0.750 0.950 0.030 0.037

b 0.220 0.380 0.009 0.015

D 2.900 3.100 0.114 0.122

e 0.650 0.026

E 4.800 5.000 0.189 0.197

E1 2.900 3.100 0.114 0.122

L 0.400 0.800

0.016 0.031

DS9186A-14 November 2017 www.richtek.com

RT9186A

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify

that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek

product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use;

nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent

or patent rights of Richtek or its subsidiaries.

Dimensions In Millimeters Dimensions In Inches

Symbol Min Max Min Max

A 0.800 1.000 0.031 0.039

A1 0.000 0.050 0.000 0.002

A3 0.175 0.250 0.007 0.010

b 0.200 0.300 0.008 0.012

D 2.950 3.050 0.116 0.120

D2 2.100 2.350 0.083 0.093

E 2.950 3.050 0.116 0.120

E2 1.350 1.600 0.053 0.063

e 0.650 0.026

L 0.425 0.525

0.017 0.021

V-Type 8L DFN 3x3 Package

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

DETAIL A

Pin #1 ID and Tie Bar Mark Options

SEE DETAIL A