IRF9630 - Intersil Corporation

4-27

File Number

2224.3

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

IRF9630, RF1S9630SM

6.5A, 200V, 0.800 Ohm, P-Channel Power

MOSFETs

These are P-Channel enhancement mode silicon gate

power ﬁeld effect transistors. They are advanced power

MOSFETs designed, tested, and guaranteed to withstand a

speciﬁed level of energy in the breakdown avalanche mode

of operation. All of these power MOSFETs are designed for

applications such as switching regulators, switching

converters, motor drivers, relay drivers and drivers for other

high-power switching devices. The high input impedance

allows these types to be operated directly from integrated

circuits.

Formerly developmental type TA17512.

Features

• 6.5A, 200V

•r

DS(ON) = 0.800Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

JEDEC TO-220AB JEDEC TO-263AB

Ordering Information

PAR T NUMBER PACKA GE BRAND

IRF9630 TO-220AB IRF9630

RF1S9630SM TO-263AB RF1S9630

NOTE: When ordering, use the entire part number. Add the suffix 9A to

obtain the TO-263AB variant in the tape and reel, i.e., RF1S9630SM9A.

GATE

DRAIN (FLANGE)

SOURCE

DRAIN

(FLANGE)

GATE

SOURCE

Data Sheet July 1999

4-28

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Speciﬁed IRF9630,

RF1S9630SM UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS -200 V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR -200 V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID

TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID-6.5

-4 A

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM -26 A

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD75 W

Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 500 mJ

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300

260

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. TJ = 25oC to 125oC

Electrical Speciﬁcations TC = 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS ID = -250µA, VGS = 0V(Figure 10) -200 - - V

Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2 - -4 V

Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - -25 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V, TC= 125oC - - -250 µA

On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = -10V -6.5 - - A

Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA

On Resistance (Note 2) rDS(ON) ID = -3.5A, VGS = -10V (Figures 8, 9) - 0.500 0.800 Ω

Forward Transconductance (Note 2) gfs VDS ≥ ID(ON) x rDS(ON)MAX, ID = -3.5A

(Figure 12) 2.2 3.5 - S

Turn-On Delay Time td(ON) VDD = -100V, ID≈ -6.5A, RG = 50Ω

RL = 15.4Ω (Figures 17, 18)

MOSFET Switching Times are Essentially

Independent of Operating Temperature

-3050 ns

Rise Time tr- 50 100 ns

Turn-Off Delay Time td(off) - 50 100 ns

Fall Time tf-4080 ns

Total Gate Charge

(Gate to Source + Gate to Drain) Qg(TOT) VGS = -10V, ID = -6.5A, VDS = 0.8 x Rated BVDSS

Ig(REF) = -1.5mA (Figures 14, 19, 20)

Gate Charge is Essentially Independent of

Operating Temperature

-3145nC

Gate to Source Charge Qgs -18- nC

Gate to Drain (“Miller”) Charge Qgd -13- nC

Input Capacitance CISS VDS = -25V, VGS = 0V, f = 1MHz

(Figure 11) - 550 - pF

Output Capacitance COSS - 170 - pF

Reverse Transfer Capacitance CRSS -50- pF

Internal Drain Inductance LDMeasured From the

Contact Screw On Tab To

the Center of Die

Modified MOSFET

Symbol Showing the

Internal Devices

Inductances

- 3.5 - nH

Measured From the Drain

Lead, 6mm (0.25in) From

Package to the Center of

Die

- 4.5 - nH

Internal Source Inductance LSMeasuredFromtheSource

Lead, 6mm (0.25in) From

Package to Source Bond-

ing Pad

- 7.5 - nH

Thermal Resistance Junction to Case RθJC - - 1.67 oC/W

Thermal Resistance Junction to Ambient RθJA Typical Socket Mount - - 80 oC/W

IRF9630, RF1S9630SM

4-29

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current ISD ModifiedMOSFETSymbol

Showing the Integral Re-

verse P-N Junction Diode

- - -6.5 A

Pulse Source to Drain Current

(Note 3) ISDM - - -26 A

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = -6.5A, VGS = 0V (Figure 13) - - -1.5 V

Reverse Recovery Time trr TJ = 150oC, ISD = -6.5A, dISD/dt = 100A/µs - 400 - ns

Reverse Recovery Charge QRR TJ = 150oC, ISD = -6.5A, dISD/dt = 100A/µs - 2.6 - µC

NOTES:

2. Pulse Test: Pulse width ≤300µs, duty cycle ≤2%.

3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. VDD = 50V, starting TJ= 25oC, L = 17.75mH, RG= 25Ω, peak IAS = 6.5A. (Figures 15, 16).

Typical Performance Curves

Unless Otherwise Speciﬁed

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

0 50 100 150

TC, CASE TEMPERATURE (oC)

POWER DISSIPATION MULTIPLIER

0.2

0.4

0.6

0.8

1.0

1.2

-2

0050 100

ID, DRAIN CURRENT (A)

TC, CASE TEMPERATURE (oC)

-10

150

-8

75 125

-4

-6

t1, RECTANGULAR PULSE DURATION (s)

ZqJC, NORMALIZED

THERMAL IMPEDENCE

10-3 10-2

10-5 10-4

0.01

0.1

10-1 1

SINGLE PULSE t2

NOTES:

DUTY FACTOR: D = t1/t2

PEAK TJ = PDM x ZθJC x RθJC + TC

PDM

0.1

0.02

0.2

0.5

0.01

0.05

IRF9630, RF1S9630SM

4-30

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

NOTE: Heating effect of 2µs pulse is minimal.

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

VDS, DRAIN TO SOURCE VOLTAGE (V)

ID, DRAIN CURRENT (A)

-100

-1

100µs

10µs

1ms

10ms

100ms

-10-1

-0.1 -1000

-10

-100

LIMITED BY rDS(ON)

AREA MAY BE

OPERATION IN THIS

TC = 25oC

SINGLE PULSE

TJ = MAX RATED

ID, DRAIN CURRENT (A)

0 -10 -20 -30 -40

-3

-6

-9

-12

-15

-50

-9V

VGS = -7V

VGS = -6V

VGS = -5V

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = -4V

VGS = -10V

VGS = -8V PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

-4

0-2 -4 -6 -10

-8

-12

ID, DRAIN CURRENT (A)

VDS, DRAIN TO SOURCE VOLTAGE (V)

-16

-8

-20

VGS = -6V

VGS = -5V

VGS = -4V

VGS = -7V

VGS = -9V

VGS = -8V

VGS = -10V

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

0 -4 -6 -8 -10-2

-9

-12

ID(ON), ON-STATE DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

-15

-6

-3

-125oC

25oC

-55oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

1.6

-5 -10 -15 -20

ID, DRAIN CURRENT (A)

-25

2.0

0.4

0.8

1.2 VGS = -10V

VGS = -20V

rDS(ON), DRAIN TO SOURCE ON

RESISTANCE (Ω)

2.5

1.5

1.0

0.5

-40 0 40

TJ, JUNCTION TEMPERATURE (oC)

120 160

2.0

NORMALIZED DRAIN TO SOURCE

ON RESISTANCE

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

IRF9630, RF1S9630SM

4-31

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves

Unless Otherwise Speciﬁed (Continued)

1.25

0.95

0.85

0.75

-40 0 40 80

TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN-TO-SOURCE

BREAKDOWN VOLTAGE

120 160

1.05

1.15

2000

400

0020 50

C, CAPACITANCE (pF)

1200

VDS, DRAIN TO SOURCE VOLTAGE (V)

1600

800

CISS = CGS + CGD

CRSS = CGD

COSS ≈ CDS + CGD

CISS

10 30 40

COSS

CRSS

VGS = 0V, f = 1MHz

ID, DRAIN CURRENT (A)

gfs, TRANSCONDUCTANCE (S)

0 -3 -6 -9 -12

1.4

2.8

4.2

5.6

7.0

-15

TJ = 125oC

TJ = 25oC

TJ = -55oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

-0.4 -1.0 -1.2 -1.6 -1.8-0.6

-0.1

-1.0

-10

ISD, DRAIN CURRENT (A)

VSD, SOURCE TO DRAIN VOLTAGE (V)

-100

-0.8 -1.4

TJ = 25oC

TJ = 150oC

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

Qg(TOT), TOTAL GATE CHARGE (nC)

VGS, GATE TO SOURCE (V)

0 8 16 24 40

- 5

VDS = -160V

- 10

- 15

VDS = -100V VDS = -40V

ID = -8A

IRF9630, RF1S9630SM

4-32

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED INDUCTIVE ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

-VGS 0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VDD

VDS

BVDSS

IAS

tAV

VGS

DUT

-VDD

td(ON)

90%

10%

VDS 90%

td(OFF)

tOFF

90%

50%

10%

PULSE WIDTH

VGS

tON

10%

0.3µF

12V

BATTERY 50kΩ

+VDS

DUT

IG(REF)

(ISOLATED

-VDS

0.2µF

CURRENT

REGULATOR

ID CURRENT

SAMPLING

IG CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR

DUT

Qg(TOT)

Qgd

Qgs

VDS

VGS

VDD

IG(REF)

IRF9630, RF1S9630SM

4-33

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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

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from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

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P. O. Box 883, Mail Stop 53-204

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IRF9630, RF1S9630SM