General Description
The MAX5712 is a small footprint, low-power, 12-bit digi-
tal-to-analog converter (DAC) that operates from a single
+2.7V to +5.5V supply. The MAX5712 on-chip precision
output amplifier provides rail-to-rail output swing. Drawing
only 85µA supply current at +3V, the MAX5712 is ideally
suited for portable battery-operated equipment.
The MAX5712 utilizes a 3-wire serial-interface that is com -
patible with SPI™/QSPI™/MICROWIRE™ and DSP-inter-
face standards. All logic inputs are CMOS-logic
compatible and buffered with Schmitt triggers to allow
direct interfacing to optocouplers. The MAX5712 incorpo-
rates a power-on reset (POR) circuit that ensures the DAC
begins in a zero-volt-state upon power-up. A power-down
mode that reduces current consumption to 0.3µA may be
initiated through a software command.
The MAX5712 is available in a small 6-pin SOT23 pack-
age. For dual and quad 12-bit versions, see the MAX5722
and MAX5742 data sheets. For single, dual, and quad
10-bit versions, see the MAX5711, MAX5721 and
MAX5741 data sheets. The MAX5712 is specified over
the automotive temperature range of -40°C to +125°C.
Applications
Automatic Tuning
Gain and Offset Adjustment
Power Amplifier Control
Process Control I/O Boards
Battery-Powered Equipment
VCO Control
Features
♦Wide -40°C to +125°C Operating Temperature
Range
♦Low 85µA Supply Current
♦Ultra Low 0.3µA Power-Down Supply Current
♦Single +2.7V to +5.5V Supply Voltage
♦Fast 20MHz 3-Wire SPI/QSPI/MICROWIRE and
DSP-Compatible Serial Interface
♦Schmitt-Triggered Inputs for Direct Interfacing to
Optocouplers
♦Rail-to-Rail Output Buffer
♦Tiny 6-Pin SOT23 Package
♦Power-On Reset to 0V
♦Three Software-Selectable Power-Down Output
Impedances (100kΩ, 1kΩ, Hi-Z)
MAX5712
12-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
________________________________________________________________ Maxim Integrated Products 1
DAC
REGISTER
INPUT
CONTROL
LOGIC
12-BIT
DAC
REF+
VDD GND
OUT
100kΩ1kΩ
CS SCLK DIN
REF- OUTPUT
BUFFER
POWER-ON
RESET
POWER-DOWN
CONTROL
LOGIC
MAX5712
Functional Diagram
19-2126; Rev 2; 11/04
Ordering Information
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor, Corp.
PART
TEMP RANGE
PIN-
PACKAGE
TOP
MARK
MAX5712EUT-T
-40°C to +85°C
6 SOT23-6
ABCQ
MAX5712AUT-T
-40°C to +125°C
6 SOT23-6
AAUD
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Pin Configuration appears at end of data sheet.
MAX5712
12-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.5V, GND = 0, RL= 5kΩ, CL= 200pF, TA= TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +5V.
TA= +25°C)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD to GND..............................................................-0.3V to +6V
OUT, SCLK, DIN, CS to GND......................-0.3V to (VDD+ 0.3V)
Maximum Current into Any Pin.........................................±50mA
Continuous Power Dissipation (TA= +70°C)
6-Pin SOT23 (derate 9.1mW/°C above +70°C)...........727mW
Operating Temperature Range .........................-40°C to +125°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
STATIC ACCURACY (NOTE 1)
Resolution N 12 Bits
Differential Nonlinearity Error DNL Guaranteed monotonic (Note 2) ±1 LSB
Integral Nonlinearity Error INL (Note 2) ±2
±16
LSB
Zero-Code Error OE Code = 000 0.4 1.5
% of FS
Zero-Code Error Tempco 2.3
ppm/°C
Gain Error GE Code = FFF hex -3
% of FS
Gain-Error Tempco Integral
0.26
ppm/°C
DAC OUTPUT
Output Voltage Range No-load (Note 3) 0
VDD
V
DC Output Impedance Code = 800 hex 0.8 Ω
VDD = +3V 15
Short Circuit Current VDD = +5V 48 mA
VDD = +3V 8
Wake-Up Time VDD = +5V 8 µs
Output Leakage Current Power-down mode = output high-impedance
±18 ±33
nA
DIGITAL INPUTS (SCLK, DIN, CS)
Input High Voltage VIH VDD = +3V, +5V
0.7 x VDD
V
Input Low Voltage VIL VDD = +3V, +5V
0.3 x VDD
V
Input Leakage Current IIN Digital Inputs = 0 or VDD
±0.1
±1µA
Input Capacitance CIN 5pF
DYNAMIC PERFORMANCE
Voltage-Output Slew Rate SR 0.5 V/µs
Voltage-Output Settling Time 400 hex to C00 hex (Note 4) 4 10 µs
Digital Feedthrough Any digital inputs from 0 to VDD 0.2 nV-s
Digital-Analog Glitch Impulse Major carry transition (code 7FF hex to code
800 hex) 12 nV-s
MAX5712
12-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
_______________________________________________________________________________________ 3
Note 1: DC Specifications are tested without output loads.
Note 2: Linearity guaranteed from code 115 to code 3981.
Note 3: Offset and gain error limit the FSR.
Note 4: Guaranteed by design.
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
POWER REQUIREMENTS
Supply Voltage Range VDD 2.7 5.5 V
All digital inputs at 0 or VDD, VDD = +3.6V 85
150
Supply Current with No-Load IDD All digital inputs at 0 or VDD, VDD = +5.5V 105
187
µA
Power-Down Supply Current
IDDPD
All digital inputs at 0 or VDD, VDD = +5.5V
0.29
1µA
TIMING CHARACTERISTICS (FIGURE 2) (TIMING IS TESTED WITH NO-LOAD)
SCLK Clock Frequency fSCLK 0 20 MHz
SCLK Pulse Width High tCH 20 ns
SCLK Pulse Width Low tCL 20 ns
CS Fall-to-SLCK Rise Setup tCSS 15 ns
DIN Setup Time tDS 15 ns
DIN Hold Time tDH 0ns
SCLK Falling Edge-to-CS
Rising Edge tCSH 10 ns
CS Pulse Width High tCSW 80 ns
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
-16
-4
-8
-12
0
4
12
8
16
0 512 1024 1536 2048 2560 3072 3584 4096
INTEGRAL NONLINEARITY
vs. CODE, TA = +25°C
MAX5712 toc01
CODE
INL (LSB)
VDD = +5V
VDD = +3V
-0.2
-0.4
-0.6
-0.8
-1.0
0.2
0.0
0.4
0.8
0.6
1.0
0 512 1024 1536 2048 2560 3072 3584 4096
DIFFERENTIAL NONLINEARITY
vs. CODE, TA = +25°C
MAX5712 toc02
CODE
DNL (LSB)
-0.2
-0.4
-0.6
-0.8
-1.0
0.2
0.0
0.4
0.8
0.6
1.0
0 512 1024 1536 2048 2560 3072 3584 4096
TOTAL UNADJUSTED ERROR
vs. CODE, TA = +25°C
MAX5712 toc03
CODE
TUE (%)
VDD = +5V
VDD = +3V
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.5V, GND = 0, RL= 5kΩ, CL= 200pF, TA= TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +5V.
TA= +25°C)
MAX5712
12-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
4 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
-16
-4
-8
-12
0
4
12
8
16
0 512 1024 1536 2048 2560 3072 3584 4096
INTEGRAL NONLINEARITY
vs. CODE, TA = -40°C
MAX5712 toc04
CODE
INL (LSB)
VDD = +5V
VDD = +3V
-0.2
-0.4
-0.6
-0.8
-1.0
0.2
0.0
0.4
0.8
0.6
1.0
0 512 1024 1536 2048 2560 3072 3584 4096
DIFFERENTIAL NONLINEARITY
vs. CODE, TA = -40°C
MAX5712 toc05
CODE
DNL (LSB)
-0.2
-0.4
-0.6
-0.8
-1.0
0.2
0.0
0.4
0.8
0.6
1.0
0 512 1024 1536 2048 2560 3072 3584 4096
TOTAL UNADJUSTED ERROR
vs. CODE, TA = -40°C
MAX5712 toc06
CODE
TUE (%)
VDD = +5V
VDD = +3V
-16
-4
-8
-12
0
4
12
8
16
0 512 1024 1536 2048 2560 3072 3584 4096
INTEGRAL NONLINEARITY
vs. CODE, TA = +125°C
MAX5712 toc07
CODE
INL (LSB)
VDD = +5V
VDD = +3V
-0.2
-0.4
-0.6
-0.8
-1.0
0.2
0.0
0.4
0.8
0.6
1.0
0 512 1024 1536 2048 2560 3072 3584 4096
DIFFERENTIAL NONLINEARITY
vs. CODE, TA = +125°C
MAX5712 toc08
CODE
DNL (LSB)
-0.2
-0.4
-0.6
-0.8
-1.0
0.2
0.0
0.4
0.8
0.6
1.0
0 512 1024 1536 2048 2560 3072 3584 4096
TOTAL UNADJUSTED ERROR
vs. CODE, TA = +125°C
MAX5712 toc09
CODE
TUE (%)
VDD = +5V
VDD = +3V
-16
-8
-12
4
0
-4
12
8
16
-40 20 40-20 0 60 80 100 120
WORST CASE INL AND DNL
vs. TEMPERATURE
MAX5712 toc10
TEMPERATURE (°C)
INL/DNL (LSB)
MAXIMUM INL
MINIMUM DNL MINIMUM INL
MAXIMUM DNL
0.0
0.5
1.0
1.5
2.0
2.5
3.0
042 6 8 10121416
SOURCE-AND-SINK CURRENT
CAPABILITY (VDD = +3V)
MAX5712 toc11
ISOURCE/SINK (mA)
VOUT (V)
CODE = FFF HEX,
SOURCING
CURRENT
FROM OUT
CODE = 400 HEX,
SINKING CURRENT
INTO OUT
CODE = C00 HEX,
SOURCING CURRENT
FROM OUT
CODE = 000 HEX, SINKING
CURRENT INTO OUT
0.0
1.0
0.5
2.0
1.5
3.0
2.5
3.5
4.5
4.0
5.0
010155 2025303540
SOURCE-AND-SINK CURRENT
CAPABILITY (VDD = +5V)
MAX5712 toc12
ISOURCE/SINK (mA)
VOUT (V)
CODE = FFF HEX,
SOURCING
CURRENT
FROM OUT
CODE = 400 HEX,
SINKING CURRENT
INTO OUT
CODE = C00 HEX,
SOURCING CURRENT
FROM OUT
CODE = 000 HEX, SINKING
CURRENT INTO OUT
MAX5712
12-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
_______________________________________________________________________________________ 5
0
40
20
80
60
100
120
2.7 5.2
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX5712 toc13
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
3.73.2 4.2 4.7
CODE = FFF HEX
CODE = 000
0
100
50
200
150
250
300
POWER-DOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX5712 toc14
SUPPLY VOLTAGE (V)
POWER-DOWN SUPPLY CURRENT (nA)
2.7 3.7 4.23.2 4.7 5.2
0
200
100
500
400
300
800
700
600
900
021345
MAX5712 toc15
SUPPLY CURRENT (µA)
SUPPLY CURRENT
vs. CS INPUT VOLTAGE
CS INPUT VOLTAGE (V)
VDD = +5V
VDD = +3V
FULL-SCALE SETTLING TIME
(VDD = +5V)
MAX5712 toc16
VOUT
1V/div
VSCLK
5V/div
1µs/div
CODE 000 TO FFF HEX
RL = 5kΩ
CL = 200pF
FULL-SCALE SETTLING TIME
(VDD = +5V)
MAX5712 toc17
VOUT
1V/div
VSCLK
5V/div
2µs/div
CODE FFF HEX TO 000
RL = 5kΩ
CL = 200pF
HALF-SCALE SETTLING TIME
(VDD = +3V)
MAX5712 toc18
VOUT
1V/div
VSCLK
5V/div
1µs/div
CODE 400 HEX
TO C00 HEX
RL = 5kΩ
CL = 200pF
HALF-SCALE SETTLING TIME
(VDD = +3V)
MAX5712 toc19
VOUT
1V/div
VSCLK
5V/div
1µs/div
CODE C00 HEX
TO 400 HEX
RL = 5kΩ
CL = 200pF
EXITING POWER-DOWN
(VDD = +5V)
MAX5712 toc20
VOUT
1V/div
CODE 800 HEX
VSCLK
5V/div
5µs/div
RL = 5kΩ
CL = 200pF
DIGITAL-TO-ANALOG
GLITCH IMPULSE (VDD = +5V)
MAX5712 toc21
VOUT
10mV/div
500ns/div
CODE 800 HEX
TO 7FF HEX
RL = 5kΩ
CL = 200pF
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX5712
12-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
6 _______________________________________________________________________________________
Pin Description
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
DIGITAL-TO-ANALOG
GLITCH IMPULSE (VDD = +5V)
MAX5712 toc22
VOUT
10mV/div
500ns/div
CODE 7FF HEX
TO 800 HEX
RL = 5kΩ
CL = 200pF
CLOCK FEEDTHROUGH
(VDD = +5V)
MAX5712 toc23
VOUT
1mV/div
VSCLK
2V/div
500ns/div
RL = 5kΩ
CL = 200pF
PIN
NAME
FUNCTION
1V
DD Power-Supply Input
2 GND Ground
3 DIN Serial-Data Input
4 SCLK Serial-Clock Input
5CS Active Low Chip-Select Input
6 OUT DAC Output Voltage
Detailed Description
The MAX5712 voltage output, 12-bit DAC, offers a full
12-bit performance in a small 6-pin SOT23 package.
The SOT23 footprint is less than 9mm2. The MAX5712
has less than 1LSB differential nonlinearity error, ensur-
ing monotonic performance. The device uses a simple
3-wire, SPI/QSPI/MICROWIRE and DSP-compatible ser-
ial interface that operates up to 20MHz. The MAX5712
incorporates three shutdown modes, making it ideal for
low-power.
Analog Section
The MAX5712 consists of a resistor string, an output
buffer, and a POR circuit. Monotonic digital to analog
conversion is achieved using a resistor string architec-
ture. Since VDD is the reference for the MAX5712, the
accuracy of the DAC depends on the accuracy of VDD.
The low bias current of the MAX5712 allows its power
to be supplied by a voltage reference such as the
MAX6030. The 12-bit DAC code is binary-unipolar with
1LSB = VDD/4096.
Output Buffer
The DAC output buffer has a rail-to-rail output and is
capable of driving a 5kΩresistive load in parallel with a
200pF capacitive load. With a capacitive load of 200pF,
the output buffer slews 0.5V/µs. With a 1/4FS to 3/4FS
output transition, the amplifier output settles to 1/2LSB
in less than 10µs when loaded with 5kΩin parallel with
200pF. The buffer amplifier is stable with any combina-
tion of resistive loads greater than 5kΩand capacitive
loads less than 200pF.
Program the input register bits to power-down the
device. The DAC registers are preserved during power-
down and upon wake-up, the DAC output is restored to
its pre-power-down voltage.
Power-On Reset
The MAX5712 has a POR circuit to set the DACs output
to zero when VDD is first applied. This ensures that
unwanted DAC output voltages will not occur immedi-
ately following a system start-up, such as after a loss of
power. Upon initial power-up, an internal power-on-
reset circuit ensures that all DAC registers are cleared,
the DAC is powered-down, and its output is terminated
to GND by a 100kΩresistor. An 8µs recovery time after
issuing a wake-up command is needed before writing
to the DAC registers. Digital Section
3-Wire Serial Interface
The MAX5712 digital interface is a standard 3-wire con-
nection compatible with SPI/QSPI/MICROWIRE/DSP
interfaces. The chip-select input (CS) frames the serial
data loading at DIN. Immediately following CS high-to-
low transition, the data is shifted synchronously and
latched into the input register on the falling edge of the
serial clock input (SCLK). After 16 bits have been
loaded into the serial input register, it transfers its con-
tents to the DAC latch. CS may then either be held low
or brought high. CS must be brought high for a mini-
mum of 80ns before the next write sequence, since a
write sequence is initiated on a falling edge of CS. Not
keeping CS low during the first 15 SCLK cycles dis-
cards input data. The serial clock (SCLK) can idle
either high or low between transitions. Figure 1 shows
the complete 3-wire serial interface transmission. Table
1 lists serial-interface mapping.
MAX5712
12-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
_______________________________________________________________________________________ 7
tCH
tCL
tDS
tDH tCSH
tCSW tCSS
SOC3
Figure 1. Timing Diagram
MAX5712
Shutdown Modes
The MAX5712 includes three software-controlled shut-
down modes that reduce the supply current to below
1µA. In two of the three shutdown modes, OUT is con-
nected to GND through a resistor. Table 1 lists the
three shutdown modes of operation.
Applications Information
Device Powered by an
External Reference
The MAX5712 generates an output voltage proportional
to VDD, coupling power supply noise to the output. The
circuit in Figure 2 rejects this power-supply noise by
powering the device directly with a precision voltage
reference, improving overall system accuracy. The
MAX6030 (+3V, 75ppm) or the MAX6050 (+5V, 75ppm)
precision voltage references are ideal choices due to
the low-power requirements of the MAX5712. This solu-
tion is also useful when the required full-scale output
voltage is less than the available supply voltages.
Digital Inputs and Interface Logic
The 3-wire digital interface for the MAX5712 is compati-
ble with SPI, QSPI, MICROWIRE, and DSP. The three
digital inputs (CS, DIN, and SCLK) load the digital input
serially into the DAC. All of the digital inputs include
Schmitt-trigger buffers to accept slow-transition inter-
faces. This allows optocouplers to interface directly to
the MAX5712 without additional external logic. The digi-
tal inputs are compatible with CMOS-logic levels.
Power-Supply Bypassing and Layout
Careful PC board layout is important for optimal system
performance. Keep analog and digital signals separate
to reduce noise injection and digital feedthrough. Use a
ground plane to ensure that the ground return from
GND to the supply ground is short and low impedance.
Bypass VDD with a 0.1µF capacitor to ground as close
as possible to the device.
Chip Information
TRANSISTOR COUNT: 3856
PROCESS: BiCMOS
12-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
8 _______________________________________________________________________________________
16-BIT SERIAL WORD
MSB
LSB
MODE OUTPUT
C3 C2 C1 C0 D11 D10 D09 D08 D07 D06 D05 D04 D03 D02 D01 D00
0
000
12-Bit DAC Code Set and update
DAC VOUT = VDD x
CODE/4096
1
111XXXXXXXXXX00
Wake-Up Current DAC
setting (initially 0)
1
111XXXXXXXXXX01
Power-Down Floating
1
111XXXXXXXXXX10
Power-Down 1kΩ to GND
1
111XXXXXXXXXX11
Power-Down
100kΩ to GND
Table 1. Serial Interface Mapping
VDD
GND
OUT
GND
OUT
MAX6050
MAX6030 MAX5712
IN
Figure 2. MAX5712 Powered By Reference
GND
SCLKDIN
16OUT
5
VDD
MAX5712
SOT23
TOP VIEW
2
34
CS
Pin Configuration
6LSOT.EPS
F
11
21-0058
PACKAGE OUTLINE, SOT-23, 6L
MAX5712
12-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9
© 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)