© Semiconductor Components Industries, LLC, 2013
May, 2017 − Rev. 2
1Publication Order Number:
NVD6828NL/D
NVD6828NL
Power MOSFET
90 V, 20 mW, 41 A, Single N−Channel
Features
•Low RDS(on) to Minimize Conduction Losses
•High Current Capability
•Avalanche Energy Specified
•AEC−Q101 Qualified and PPAP Capable
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS 90 V
Gate−to−Source Voltage VGS "20 V
Continuous Drain Cur-
rent RqJC (Notes 1 & 3)
Steady
State
TC = 25°CID41 A
TC = 100°C 29
Power Dissipation RqJC
(Note 1)
TC = 25°CPD83 W
TC = 100°C 42
Continuous Drain
Current RqJA (Notes 1,
2 & 3) Steady
State
TA = 25°CID8.7 A
TA = 100°C 6.1
Power Dissipation RqJA
(Notes 1 & 2)
TA = 25°CPD3.8 W
TA = 100°C 1.9
Pulsed Drain Current TA = 25°C, tp = 10 msIDM 206 A
Operating Junction and Storage Temperature TJ, Tstg −55 to
175
°C
Source Current (Body Diode) IS40 A
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VGS = 10 V, IL(pk) = 24.5 A,
L = 0.3 mH, RG = 25 W)
EAS 90 mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Case − Steady State (Drain) RqJC 1.8 °C/W
Junction−to−Ambient − Steady State (Note 2) RqJA 40
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Continuous DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
DPAK
CASE 369C
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENT
90 V 20 mW @ 10 V
RDS(on)
41 A
ID
V(BR)DSS
25 mW @ 4.5 V
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12
3
4
N−Channel
D
S
G
1
Gate
2
Drain 3
Source
4
Drain
AYWW
68
28LG
A = Assembly Location*
Y = Year
WW = Work Week
6828L = Device Code
G = Pb−Free Package
Device Package Shipping†
ORDERING INFORMATION
NVD6828NLT4G DPAK
(Pb−Free)
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
NVD6828NLT4G−
VF01
DPAK
(Pb−Free)
2500/Tape & Reel
* The Assembly Location Code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package bottom (molding ejecter
pin), the front side assembly code may be blank.
NVD6828NL
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2
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA90 V
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ87 mV/°C
Zero Gate Voltage Drain Current IDSS VGS = 0 V,
VDS = 90 V
TJ = 25°C 1.0 mA
TJ = 125°C 100
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = "20 V "100 nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA1.5 2.5 V
Negative Threshold Temperature Co-
efficient
VGS(TH)/TJ−6.5 mV/°C
Drain−to−Source On Resistance RDS(on) VGS = 10 V, ID = 20 A 16.5 20 mW
VGS = 4.5 V, ID = 20 A 19.1 25
CHARGES, CAPACITANCES AND GATE RESISTANCES
Input Capacitance Ciss
VGS = 0 V, f = 1.0 MHz,
VDS = 25 V
2900 pF
Output Capacitance Coss 175
Reverse Transfer Capacitance Crss 126
Total Gate Charge QG(TOT) VGS = 4.5 V, VDS = 72 V,
ID = 20 A
32 nC
VGS = 10 V, VDS = 72 V,
ID = 20 A
61
Threshold Gate Charge QG(TH)
VGS = 10 V, VDS = 72 V,
ID = 20 A
3.3
Gate−to−Source Charge QGS 9.0
Gate−to−Drain Charge QGD 16
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time td(on)
VGS = 10 V, VDD = 72 V,
ID = 20 A, RG = 2.5 W
14 ns
Rise Time tr64
Turn−Off Delay Time td(off) 28
Fall Time tf43
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V,
IS = 20 A
TJ = 25°C 0.84 1.2 V
TJ = 125°C 0.72
Reverse Recovery Time tRR
VGS = 0 V, dIs/dt = 100 A/ms,
IS = 20 A
35 ns
Charge Time ta 25
Discharge Time tb 10
Reverse Recovery Charge QRR 49 nC
4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
5. Switching characteristics are independent of operating junction temperatures.
NVD6828NL
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3
TYPICAL CHARACTERISTICS
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
VDS, DRAIN−TO−SOURCE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
543210
0
20
40
60
80
4.03.53.02.52.0
0
20
40
60
80
Figure 3. On−Resistance vs. Gate Voltage Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
108642
0.014
0.016
0.018
0.020
0.022
0.024
70402010
0.010
0.015
0.020
0.025
0.030
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE (V)
15012510050250−25−50
0.4
1.0
1.6
2.2
2.8
9070605040302010
1 k
10 k
100 k
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (Normalized)
IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
30 50 60 80
75 175 80
VGS = 10 V
TJ = 25°C
4.5 V
3.8 V
3.6 V
3.4 V
3.2 V
3.0 V
2.8 V
VDS ≥ 10 V
TJ = 25°C
TJ = 125°C
TJ = −55°C
ID = 20 A
TJ = 25°C
TJ = 25°C
VGS = 10 V
VGS = 4.5 V
ID = 20 A
VGS = 10 V
VGS = 0 V
TJ = 125°C
TJ = 150°C
0.026
0.028
NVD6828NL
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4
TYPICAL CHARACTERISTICS
Crss
Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage vs. Total
Charge
VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)
807060403020100
0
1000
2000
3000
4000
706050403020100
0
2
4
6
8
10
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
RG, GATE RESISTANCE (W)VSD, SOURCE−TO−DRAIN VOLTAGE (V)
100101
10
100
1000
1.101.000.900.800.700.60
0
20
40
60
80
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1001010.1
0.01
0.1
1
10
100
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
IS, SOURCE CURRENT (A)
ID, DRAIN CURRENT (A)
50 90
VGS = 0 V
TJ = 25°C
Ciss
Coss
VDS = 72 V
ID = 20 A
VGS = 10 V
tr
tf
td(off)
td(on)
VGS = 0 V
TJ = 25°C
VGS = 10 V
Single Pulse
TC = 25°C
RDS(on) Limit
Thermal Limit
Package Limit
dc
10 ms
1 ms
100 ms
10 ms
QT
Qgd
Qgs
VDS = 72 V
ID = 20 A
TJ = 25°C
0.50
NVD6828NL
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6
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE F
5.80
0.228
2.58
0.102
1.60
0.063
6.20
0.244
3.00
0.118
6.17
0.243
ǒmm
inchesǓ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
b
D
E
b3
L3
L4
b2
M
0.005 (0.13) C
c2
A
c
C
Z
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
D0.235 0.245 5.97 6.22
E0.250 0.265 6.35 6.73
A0.086 0.094 2.18 2.38
b0.025 0.035 0.63 0.89
c2 0.018 0.024 0.46 0.61
b2 0.028 0.045 0.72 1.14
c0.018 0.024 0.46 0.61
e0.090 BSC 2.29 BSC
b3 0.180 0.215 4.57 5.46
L4 −−− 0.040 −−− 1.01
L0.055 0.070 1.40 1.78
L3 0.035 0.050 0.89 1.27
Z0.155 −−− 3.93 −−−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
7. OPTIONAL MOLD FEATURE.
12 3
4
H0.370 0.410 9.40 10.41
A1 0.000 0.005 0.00 0.13
L1 0.114 REF 2.90 REF
L2 0.020 BSC 0.51 BSC
A1
H
DETAIL A
SEATING
PLANE
A
B
C
L1
L
H
L2 GAUGE
PLANE
DETAIL A
ROTATED 90 CW5
e
BOTTOM VIEW
Z
BOTTOM VIEW
SIDE VIEW
TOP VIEW
ALTERNATE
CONSTRUCTIONS
NOTE 7
Z
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
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