Triple-Channel Digital Isolators,
Enhanced System Level ESD Reliability
Data Sheet ADuM3300W/ADuM3301W
Rev. A Document Feedback
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FEATURES
Qualified for automotive applications
Enhanced system level ESD performance per IEC 61000-4-x
Low power operation
5 V operation
1.8 mA per channel maximum at 0 Mbps to1 Mbps
3.9 mA per channel maximum at 10 Mbps
3.3 V operation
1.2 mA per channel maximum at 0 Mbps to 1 Mbps
2.4 mA per channel maximum at 10 Mbps
Bidirectional communication
3.3 V/5 V level translation
High temperature operation: 125°C
High data rate: dc to 10 Mbps (NRZ)
Precise timing characteristics
3.5 ns maximum pulse width distortion
3.5 ns maximum channel-to-channel matching
High common-mode transient immunity: >25 kV/μs
Output enable function
16-lead SOIC, wide body, RoHS compliant package
Safety and regulatory approvals
UL recognition: 2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 560 V peak
APPLICATIONS
Hybrid electric vehicles, battery monitors, and motor drives
FUNCTIONAL BLOCK DIAGRAMS
Figure 1. ADuM3300W
Figure 2. ADuM3301W
GENERAL DESCRIPTION
The ADuM3300W1 and ADuM3301W1 are triple-channel digital
isolators based on Analog Devices, Inc., iCoupler® technology.
Combining high speed CMOS and monolithic air core transformer
technologies, these isolation components provide outstanding
performance characteristics superior to alternatives, such as
optocoupler devices.
iCoupler devices remove the usual optocoupler design difficulties.
Typical optocoupler concerns regarding uncertain current transfer
ratios, nonlinear transfer functions, and temperature and lifetime
effects are eliminated by the simple iCoupler digital interfaces and
stable performance characteristics. These iCoupler products also
eliminate the need for external drivers and other discrete com-
ponents. Furthermore, iCoupler devices consume one tenth to one
sixth the power of optocouplers at comparable signal data rates.
The ADuM3300W/ADuM3301W isolators provide three inde-
pendent isolation channels in a variety of channel configurations
and data rates (see the Ordering Guide). All models operate with
the supply voltage on either side ranging from 3.135 V to 5.5 V,
providing compatibility with lower voltage systems, as well as
enabling voltage translation functionality across the isolation
barrier. In the absence of input logic transitions and during
power-up/power-down conditions, the isolators have a patented
refresh feature that ensures dc correctness.
In comparison to the ADuM130x isolator family, the ADuM3300W/
ADuM3301W isolators contain various circuit and layout changes
that offer increased capability relative to system level IEC 61000-4-x
testing (ESD, burst, and surge). The design and layout of the user’s
system determine the precise capability in the IEC 61000-4-x tests
for the ADuM130x and ADuM3300W/ADuM3301W products.
1 Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329.
ENCODE DECODE
ENCODE DECODE
ENCODE DECODE
VDD1
G
ND1
VIA
VIB
VIC
NC
NC
G
ND1
VDD2
GND2
VOA
VOB
VOC
NC
VE2
GND2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
11427-001
DECODE ENCODE
ENCODE DECODE
ENCODE DECODE
VDD1
GND1
VIA
VIB
VOC
NC
VE1
GND1
VDD2
GND2
VOA
VOB
VIC
NC
VE2
GND2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
11427-002
ADuM3300W/ADuM3301W Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics—5 V Operation................................ 3
Electrical Characteristics—3.3 V Operation ............................ 4
Electrical Characteristics—Mixed 5 V/3.3 V Operation ........ 5
Electrical Characteristics—Mixed 3.3 V/5 V Operation ........ 6
Package Characteristics ............................................................... 8
Regulatory Information ............................................................... 8
Insulation and Safety-Related Specifications ............................ 8
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 9
Recommended Operating Conditions ...................................... 9
Absolute Maximum Ratings ..................................................... 10
ESD Caution................................................................................ 10
Pin Configuration and Function Descriptions ........................... 11
Typical Performance Characteristics ........................................... 13
Applications Information .............................................................. 15
Printed Circuit Board Layout ................................................... 15
System Level ESD Considerations and Enhancements ......... 15
Propagation Delay-Related Parameters ................................... 15
DC Correctness and Magnetic Field Immunity .......................... 15
Power Consumption .................................................................. 16
Insulation Lifetime ..................................................................... 17
Packaging and Ordering Information ......................................... 18
Outline Dimensions ................................................................... 18
Ordering Guide .......................................................................... 18
Automotive Products ................................................................. 18
REVISION HISTORY
11/14—Rev. 0 to Rev. A
Changed Minimum Supply Voltage from 3.0 V to 3.135 V
(Throughout) .................................................................................... 1
Changes to Table 3 ............................................................................ 3
Changes to Table 6 ............................................................................ 4
4/13—Revision 0: Initial Version
Rev. A | Page 2 of 20
Data Sheet ADuM3300W/ADuM3301W
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operating range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 1.
Parameter Symbol
A Grade
B Grade
Unit Test Conditions/Comments Min Typ Max Min Typ Max
SWITCHING SPECIFICATIONS
Data Rate 1 10 Mbps Within PWD limit
Propagation Delay tPHL, tPLH 50 65 100 18 32 36 ns 50% input to 50% output
Pulse Width Distortion PWD 40 3.5 ns |tPLH − tPHL|
Change vs. Temperature 11 5 ps/°C
Pulse Width PW 1000 100 ns Within PWD limit
Propagation Delay Skew tPSK 50 15 ns Between any two units
Channel Matching
Codirectional
t
PSKCD
50
3.5
ns
Opposing Direction tPSKOD 50 6 ns
Table 2.
Parameter Symbol
1 Mbps—A, B Grades 10 Mbps—B Grade
Unit Test Conditions/Comments
Min
Typ
Max
Min
Typ
Max
SUPPLY CURRENT No load
ADuM3300W IDD1 2.4 3.3 7.0 8.1 mA
IDD2 1.1 2.1 2.7 3.6 mA
ADuM3301W IDD1 2.0 3.1 5.5 6.9 mA
IDD2 1.6 2.6 3.9 5.4 mA
Table 3. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Threshold
Logic High VIH 2.0 V
Logic Low VIL 0.8 V
Output Voltage
Logic High VOH VDDx − 0.1 VDDx
V IOx = −20 µA, VIx = VIxH
VDDx − 0.4 VDDx−
0.2
V IOx = −4 mA, VIx = VIxH
Logic Low VOL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
Input Leakage per Channel II −10 +0.01 +10 µA 0 V ≤ VIx ≤ VDDx
VEx Input Pull-Up Current IPU −10 −3 µA VEx = 0 V
Tristate Leakage Current per Channel IOZ −10 +0.01 +10 µA
Supply Current per Channel
Quiescent Supply Current All data inputs at logic low
Input IDDI(Q) 0.66 0.97 mA
Output IDDO(Q) 0.39 0.55 mA
Dynamic Supply Current
Input
I
DDI(D)
0.20
mA/Mbps
Output IDDO(D) 0.05 mA/Mbps
Rev. A | Page 3 of 20
ADuM3300W/ADuM3301W Data Sheet
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
AC SPECIFICATIONS
Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 25 35 kV/µs VIx = VDDx
Propagation Delay
Output Disable
t
PHZ
, t
PLZ
6
8
ns
High/low output to high impedance
Output Enable tPZH, tPZL 6 8 ns High impedance to high/low output
Refresh Rate fr 1.0 Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range of 3.135 V ≤ VDD1 ≤ 3.6 V, 3.135 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching
specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 4.
Parameter Symbol
A Grade B Grade
Unit Test Conditions/Comments Min Typ Max Min Typ Max
SWITCHING SPECIFICATIONS
Data Rate 1 10 Mbps Within PWD limit
Propagation Delay tPHL, tPLH 50 75 100 20 38 45 ns 50% input to 50% output
Pulse Width Distortion PWD 40 3.5 ns |tPLH − tPHL|
Change vs. Temperature 11 5 ps/°C
Pulse Width PW 1000 100 ns Within PWD limit
Propagation Delay Skew tPSK 50 22 ns Between any two units
Channel Matching
Codirectional tPSKCD 50 3.5 ns
Opposing Direction tPSKOD 50 6 ns
Table 5.
Parameter Symbol
1 Mbps—A, WB Grades
10 Mbps—B Grade
Unit Test Conditions/Comments Min Typ Max Min Typ Max
SUPPLY CURRENT No load
ADuM3300W IDD1 1.4 2.1 3.8 5.3 mA
IDD2 0.7 1.4 1.5 2.1 mA
ADuM3301W IDD1 1.1 1.9 3.0 4.1 mA
IDD2 0.9 1.7 2.2 3.0 mA
Table 6. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Threshold
Logic High VIH 1.6 V
Logic Low VIL 0.4 V
Output Voltage
Logic High VOH VDDx − 0.1 VDDx V IOx = −20 µA, VIx = VIxH
VDDx − 0.4
V
DDx
−
0.2 V IOx = −4 mA, VIx = VIxH
Logic Low VOL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
Rev. A | Page 4 of 20
Data Sheet ADuM3300W/ADuM3301W
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Input Leakage per Channel II −10 +0.01 +10 µA 0 V ≤ VI x ≤ VDDx
VEx Input Pull-Up Current IPU −10 −3 µA VEx = 0 V
Tristate Leakage Current per Channel IOZ −10 +0.01 +10 µA
Supply Current per Channel
Quiescent Supply Current
All data inputs at logic low
Input IDDI(Q) 0.37 0.57 mA
Output IDDO(Q) 0.25 0.37 mA
Dynamic Supply Current
Input IDDI(D) 0.1 mA/Mbps
Output IDDO(D) 0.03 mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time tR/tF 3 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 25 35 kV/µs VIx = VDDx
Propagation Delay
Output Disable tPHZ, tPLZ 6 8 ns High/low output to high impedance
Output Enable tPZH, tPZL 6 8 ns High impedance to high/low output
Refresh Rate fr 1.0 Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = 5 V, V DD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended
operating range: 4.5 V ≤ VDD1 ≤ 5.5 V, 3.135 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 7.
Parameter Symbol
A Grade B Grade
Unit Test Conditions/Comments Min Typ Max Min Typ Max
SWITCHING SPECIFICATIONS
Data Rate 1 10 Mbps Within PWD limit
Propagation Delay tPHL, tPLH 50 70 100 20 30 42 ns 50% input to 50% output
Pulse Width Distortion PWD 40 3.5 ns |tPLH − tPHL|
Change vs. Temperature 11 5 ps/°C
Pulse Width PW 1000 100 ns Within PWD limit
Propagation Delay Skew tPSK 50 22 ns Between any two units
Channel Matching
Codirectional tPSKCD 50 3.5 ns
Opposing Direction tPSKOD 50 6 ns
Table 8.
Parameter Symbol
1 Mbps—A, B Grades 10 Mbps—B Grade
Unit Test Conditions/Comments Min Typ Max Min Typ Max
SUPPLY CURRENT No load
ADuM3300W IDD1 2.4 3.3 2.0 8.1 mA
IDD2 0.7 1.4 0.9 2.1 mA
ADuM3301W IDD1 7.0 3.1 5.5 6.9 mA
IDD2 1.5 1.7 2.2 3.0 mA
Rev. A | Page 5 of 20
ADuM3300W/ADuM3301W Data Sheet
Table 9. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Threshold
Logic High VIH
5 V 2.0 V
3.3 V 1.6 V
Logic Low VIL
5 V 0.8 V
3.3 V 0.4 V
Output Voltage
Logic High VOH VDDx − 0.1 VDDx V IOx = −20 µA, VIx = VIxH
VDDx − 0.4 VDDx − 0.2 V IOx = −4 mA, VIx = VIxH
Logic Low VOL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
Input Leakage per Channel II −10 +0.01 +10 µA 0 V ≤ VIx ≤ VDDx
VE
x
Input Pull-Up Current
I
PU
−10
−3
µA
V
Ex
= 0 V
Tristate Leakage Current per Channel IOZ −10 +0.01 +10 µA
Supply Current per Channel
Quiescent Supply Current All data inputs at logic low
Input IDDI(Q) 0.66 0.97 mA
Output
I
DDO(Q)
0.25
0.37
mA
Dynamic Supply Current
Input IDDI(D) 0.20 mA/Mbps
Output IDDO(D) 0.05 mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time tR/tF 3.0 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 25 35 kV/µs VIx = VDDx
Propagation Delay
Output Disable tPHZ, tPLZ 6 8 ns High/low output to high impedance
Output Enable
t
PZH
, t
PZL
6
8
ns
High impedance to high/low output
Refresh Rate fr 1.0 Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
ELECTRICAL CHARACTERISTICS—MIXED 3.3 V/5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = 3.3 V, VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range of 3.135 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V, a n d −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching
specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 10.
Parameter Symbol
A Grade B Grade
Unit Test Conditions/Comments Min Typ Max Min Typ Max
SWITCHING SPECIFICATIONS
Data Rate 1 10 Mbps Within PWD limit
Propagation Delay
t
PHL
, t
PLH
50
70
100
20
30
42
ns
50% input to 50% output
Pulse Width Distortion PWD 40 3.5 ns |tPLH − tPHL|
Change vs. Temperature 11 5 ps/°C
Pulse Width PW 1000 100 ns Within PWD limit
Propagation Delay Skew tPSK 50 22 ns Between any two units
Channel Matching
Codirectional tPSKCD 50 3.5 ns
Opposing Direction tPSKOD 50 6 ns
Rev. A | Page 6 of 20
Data Sheet ADuM3300W/ADuM3301W
Table 11.
Parameter Symbol
1 Mbps—A, B Grades 10 Mbps—B Grade
Unit Test Conditions/Comments Min Typ Max Min Typ Max
SUPPLY CURRENT No load
ADuM3300W IDD1 1.4 2.1 3.8 5.3 mA
IDD2 1.1 2.1 2.7 3.6 mA
ADuM3301W IDD1 1.1 1.9 3.0 4.1 mA
IDD2 1.6 2.6 3.9 5.4 mA
Table 12. For All Models
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Input Threshold
Logic High VIH
5 V 2.0 V
3.3 V 1.6 V
Logic Low VIL
5 V 0.8 V
3.3 V
0.4
V
Output Voltage
Logic High VOH VDDx − 0.1 VDDx V IOx = −20 µA, VIx = VIxH
VDDx − 0.4 VDDx − 0.2 V IOx = −4 mA, VIx = VIxH
Logic Low VOL 0.0 0.1 V IOx = 20 µA, VIx = VIxL
0.04 0.1 V IOx = 400 µA, VIx = VIxL
0.2 0.4 V IOx = 4 mA, VIx = VIxL
Input Leakage per Channel II −10 +0.01 +10 µA 0 V ≤ VIx ≤ VDDx
VEx Input Pull-Up Current IPU −10 −3 µA VEx = 0 V
Tristate Leakage Current per Channel IOZ −10 +0.01 +10 µA
Supply Current per Channel
Quiescent Supply Current
Input IDDI(Q) 0.37 0.57 mA All data inputs at logic low
Output IDDO(Q) 0.39 0.55 mA All data inputs at logic low
Dynamic Supply Current
Input IDDI(D) 0.10 mA/Mbps
Output IDDO(D) 0.03 mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%
Common-Mode Transient Immunity1 |CM| 25 35 kV/µs VIx = VDDx
Propagation Delay
Output Disable tPHZ, tPLZ 6 8 ns High/low output to high impedance
Output Enable tPZH, tPZL 6 8 ns High impedance to high/low output
Refresh Rate fr 1.0 Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges. VCM = 1000 V, transient magnitude = 800 V.
Rev. A | Page 7 of 20
ADuM3300W/ADuM3301W Data Sheet
PACKAGE CHARACTERISTICS
Table 13.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
RESISTANCE
Input to Output1 RI-O 1012 Ω
CAPACITANCE
Input to Output
1
C
I-O
2.0
pF
f = 1 MHz
Input2 CI 4.0 pF
THERMAL RESISTANCE
IC Junction-to- Ambient θJA 45 °C/W
1 The device is considered a 2-terminal device; Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
2 Input capacitance is from any input data pin to ground.
REGULATORY INFORMATION
The ADuM3300W/ADuM3301W are approved by the organizations listed in Table 14. See Table 19 and the Insulation Lifetime section
for more information regarding recommended maximum working voltages for specific cross isolation waveforms and insulation levels.
Table 14.
UL CSA VDE
Recognized under UL 1577 component
recognition program1
Approved under CSA Component
Acceptance Notice #5A
Certified according to DIN V VDE V 0884-10 (VDE
V 0884-10): 2006-122
Single insulation, 2500 V rms Isolation
Voltage
Basic insulation per CSA 60950-1-03 and
IEC 60950-1, 400 V rms (566 V peak)
maximum working voltage
Reinforced insulation, 560 V peak
File E214100 File 205078 File 2471900-4880-0001
1 In accordance with UL 1577, each ADuM3300W/ADuM3301W is proof tested by applying an insulation test voltage of ≥3000 V rms for 1 sec (current leakage detection
limit = 5 µA).
2 In accordance with DIN V VDE V 0884-10, each ADuM3300W/ADuM3301W is proof tested by applying an insulation test voltage of ≥1050 V peak for 1 sec (partial
discharge detection limit = 5 pC). An asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 15.
Parameter
Symbol
Value
Unit
Test Conditions/Comments
Rated Dielectric Insulation Voltage
2500
V rms
1-minute duration
Minimum External Air Gap (Clearance) L(I01) 8.0 min mm Measured from input terminals to output terminals,
shortest distance through air in the plane of the
printed circuit board (PCB)
Minimum External Tracking (Creepage) L(I02) 7.6 min mm Measured from input terminals to output terminals,
shortest distance path along body
Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1
Isolation Group II Material Group (DIN VDE 0110, 1/89, Table 1)
Rev. A | Page 8 of 20
Data Sheet ADuM3300W/ADuM3301W
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by
protective circuits. The asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval for a 560 V peak
working voltage.
Table 16.
Description Test Conditions/Comments Symbol Characteristic Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms I to IV
For Rated Mains Voltage ≤ 300 V rms I to III
For Rated Mains Voltage ≤ 400 V rms I to II
Climatic Classification 40/105/21
Pollution Degree per DIN VDE 0110, Table 1 2
Maximum Working Insulation Voltage VIORM 560 V peak
Input-to-Output Test Voltage, Method B1 VIORM × 1.875 = Vpd(m), 100% production test, tini = tm =
1 sec, partial discharge < 5 pC
Vpd(m) 1050 V peak
Input-to-Output Test Voltage, Method A VIORM × 1.5 = Vpd(m), tini = 60 sec, tm = 10 sec, partial
discharge < 5 pC
Vpd(m) 840 V peak
After Environmental Tests Subgroup 1
After Input and/or Safety Test
Subgroup 2 and Subgroup 3
VIORM × 1.2 = Vpd(m), tini = 60 sec, tm = 10 sec, partial
discharge < 5 pC
Vpd(m) 672 V peak
Highest Allowable Overvoltage VIOTM 4000 V peak
Surge Isolation Voltage V peak = 10 kV, 1.2 µs rise time, 50 µs, 50% fall time VIOSM 4000 V peak
Safety Limiting Values Maximum value allowed in the event of a failure (see
Figure 3)
Maximum Junction Temperature TS 150 °C
Total Power Dissipation @ 25°C PS 2.78 W
Insulation Resistance at T
S
V
IO
= 500 V
R
S
>10
9
Ω
Figure 3. Thermal Derating Curve, Dependence of Safety Limiting Values
with Ambient Temperature per DIN V VDE V 0884-10
RECOMMENDED OPERATING CONDITIONS
Table 17.
Parameter
Symbol
Min
Max
Unit
Operating Temperature TA −40 +125 °C
Supply Voltages
1
V
DD1
,
VDD2
3.135
5.5
V
Input Signal Rise and Fall
Times
1.0 ms
1 All voltages are relative to their respective grounds. See the DC Correctness
and Magnetic Field Immunity section for information on immunity to external
magnetic fields.
AMBI E NT TE M P E RATURE ( °C)
SAFE LIMITING POWER (mW)
0
0
3.0
2.5
2.0
1.5
1.0
0.5
50 100 150 200
11427-003
Rev. A | Page 9 of 20
ADuM3300W/ADuM3301W Data Sheet
Rev. A | Page 10 of 20
ABSOLUTE MAXIMUM RATINGS
Ambient temperature = 25°C, unless otherwise noted.
Table 18.
Parameter Rating1
Temperature Range
Storage (TST) −65°C to +150°C
Operating (Ambient, TA) −40°C to +125°C
Supply Voltages1 (VDD1, VDD2) −0.5 V to +7.0 V
Input Voltage1, 2 (VIA, VIB, VIC, VE1, VE2) −0.5 V to VDDI + 0.5 V
Output Voltage1, 2 (VOA, VOB, VOC) −0.5 V to VDDO + 0.5 V
Average Output Current per Pin3
Side 1 (IO1) −10 mA to +10 mA
Side 2 (IO2) −10 mA to +10 mA
Common-Mode Transients4 (CMH, CML) −100 kV/s to +100 kV/µs
1 VDDI and VDDO refer to the supply voltages on the input and output sides of a
given channel, respectively.
2 All voltages are relative to their respective grounds.
3 See Figure 3 for maximum rated power values for various temperatures.
4 Refers to common-mode transients across the insulation barrier. Common-
mode transients exceeding the absolute maximum rating can cause latch-up or
permanent damage.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Table 19. Maximum Continuous Working Voltage1
Parameter Max Unit Constraint
AC Voltage, Bipolar Waveform 560 V peak 50-year minimum lifetime
AC Voltage, Unipolar Waveform
Basic Insulation 1131 V peak 50-year minimum lifetime
DC Voltage
Basic Insulation 1131 V peak 50-year minimum lifetime
1 Refers to continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more information.
Table 20. Truth Table Abbreviations
Letter Description
H High level
L Low level
NC No connect
X Irrelevant (don’t care)
Z High impedance
Table 21. Truth Table (Positive Logic)
VIx Input1 V
Ex Input2 V
DDI State1 V
DDO State1 V
Ox Output1 Notes
H H or NC Powered Powered H
L H or NC Powered Powered L
X L Powered Powered Z
X H or NC Unpowered Powered H Outputs return to the input state within 1 µs of VDDI power
restoration.
X L Unpowered Powered Z
X X Powered Unpowered Indeterminate
Outputs return to the input state within 1 µs of VDDO power
restoration when the VEx state is H or NC.
Outputs return to a high impedance state within 8 ns of VDDO
power restoration when the VEx state is L.
1 VIx and VOx refer to the input and output signals of a given channel (A, B, or C). VEX refers to the output enable signal on the same side as the VOx outputs. VDDI and VDDO
refer to the supply voltages on the input and output sides of a given channel, respectively.
2 In noisy environments, connecting VEx to an external logic high or low is recommended.
Data Sheet ADuM3300W/ADuM3301W
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 4. ADuM3300W Pin Configuration
Table 22. ADuM3300W Pin Function Descriptions
Pin No. Mnemonic Description
1 VDD1 Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V.
2, 8 GND1 Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected to each other, and it is
recommended that both pins be connected to a common ground.
3 VIA Logic Input A.
4 VIB Logic Input B.
5 VIC Logic Input C.
6, 7, 11 NC No Connection. Do not connect to these pins.
9, 15 GND2 Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected to each other, and it is
recommended that both pins be connected to a common ground.
10 VE2 Output Enable 2. Active high logic input. The VOA, VOB, and VOC outputs are enabled when VE2 is high or
disconnected. The VOA, VOB, and VOC outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to
an external logic high or low is recommended.
12 VOC Logic Output C.
13
V
OB
Logic Output B.
14 VOA Logic Output A.
16 VDD2 Supply Voltage for Isolator Side 2, 3.135 V to 5.5 V.
VDD1 1
GND12
VIA 3
VIB 4
VDD2
16
GND2
15
VOA
14
VOB
13
VIC 5VOC
12
NC 6NC
11
NC 7VE2
10
GND18GND2
9
NC = NO CONNECT
NOTES
1. PIN 2 AND P IN 8 ARE I NTERNALLY CONNECT E D TO EACH O THER, AND IT
IS RECOMMENDED THAT BOT H PINS BE CONNECTED TO A COMMON GROUND.
2. PIN 9 AND P IN 15 ARE INT E RNALLY CONNECT E D TO EACH O THER, AND IT
IS RECOMMENDED THAT BOT H PINS BE CONNECTED TO A COMMON GROUND.
ADuM3300W
TOP VIEW
(No t t o Scal e)
11427-004
Rev. A | Page 11 of 20
ADuM3300W/ADuM3301W Data Sheet
Figure 5. ADuM3301W Pin Configuration
Table 23. ADuM3301W Pin Function Descriptions
Pin No. Mnemonic Description
1 VDD1 Supply Voltage for Isolator Side 1, 3.135 V to 5.5 V.
2, 8 GND1 Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected to each other, and it is
recommended that both pins be connected to a common ground.
3 VIA Logic Input A.
4 VIB Logic Input B.
5 VOC Logic Output C.
6, 11 NC No Connection. Do not connect to these pins.
7 VE1 Output Enable 1. Active high logic input. The VOC output is enabled when VE1 is high or disconnected. The VOC
output is disabled when VE1 is low. In noisy environments, connecting VE1 to an external logic high or low is
recommended.
9, 15 GND2 Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected to each other, and it
is recommended that both pins be connected to a common ground.
10 VE2 Output Enable 2. Active high logic input. The VOA and VOB outputs are enabled when VE2 is high or
disconnected. The VOA and VOB outputs are disabled when VE2 is low. In noisy environments, connecting VE2 to
an external logic high or low is recommended.
12 VIC Logic Input C.
13 VOB Logic Output B.
14 VOA Logic Output A.
16 VDD2 Supply Voltage for Isolator Side 2, 3.135 V to 5.5 V.
V
DD1 1
GND
12
V
IA 3
V
IB 4
V
DD2
16
GND
2
15
V
OA
14
V
OB
13
V
OC 5
V
IC
12
NC
6
NC
11
V
E1 7
V
E2
10
GND
18
GND
2
9
NC = NO CONNECT
ADuM3301W
TOP VIEW
(No t t o Scal e)
NOTES
1. PIN 2 AND P IN 8 ARE I NTERNALLY CONNECT E D TO EACH O THER, AND IT
IS RECOMMENDED THAT BOTH P INS BE CONNECT E D TO A COMMO N GRO UND.
2. PIN 9 AND P IN 15 ARE INT E RNALLY CONNECT E D TO EACH O THER, AND IT
IS RECOMMENDED THAT BOTH P INS BE CONNECT E D TO A COMMO N GRO UND.
11427-005
Rev. A | Page 12 of 20
Data Sheet ADuM3300W/ADuM3301W
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 6. Typical Input Supply Current per Channel vs. Data Rate (No Load)
for 5 V and 3.3 V Operation
Figure 7. Typical Output Supply Current per Channel vs. Data Rate (No Load)
for 5 V and 3.3 V Operation
Figure 8. Typical Output Supply Current per Channel vs. Data Rate
(15 pF Output Load) for 5 V and 3.3 V Operation
Figure 9. Typical ADuM3300W VDD1 Supply Current vs. Data Rate
for 5 V and 3.3 V Operation
Figure 10. Typical ADuM3300W VDD2 Supply Current vs. Data Rate
for 5 V and 3.3 V Operation
Figure 11. Typical ADuM3301W VDD1 Supply Current vs. Data Rate
for 5 V and 3.3 V Operation
DATA RATE (M bp s)
CURRENT / CHANNE L (mA)
0
0
3.0
42 6 8 10
5V
3V
2.0
2.5
1.5
1.0
0.5
11427-006
DATA RATE (M bp s)
CURRENT / CHANNE L (mA)
0
0
3.0
42 6 8 10
5V
3V
2.0
2.5
1.5
1.0
0.5
11427-007
11427-008
DATA RATE (M bp s)
CURRENT / CHANNE L (mA)
0
0
3.0
42 6 8 10
5V
3V
2.0
2.5
1.5
1.0
0.5
DATA RATE (M bp s)
CURRENT ( mA)
0
0
20
42 6 8 10
5V
3V
15
10
5
11427-009
11427-010
DATA RATE (M bp s)
CURRENT ( mA)
0
0
20
42 6 8 10
5V
3V
15
10
5
11427-011
DATA RATE (M bp s)
CURRENT ( mA)
0
0
20
42 6 8 10
5V
3V
15
10
5
Rev. A | Page 13 of 20
ADuM3300W/ADuM3301W Data Sheet
Figure 12. Typical ADuM3301W VDD2 Supply Current vs. Data Rate
for 5 V and 3.3 V Operation
Figure 13. Propagation Delay vs. Temperature, B Grade for
5 V and 3.3 V Operation
11427-012
DATA RATE (M bp s)
CURRENT ( mA)
0
0
20
4
2 6 8 10
5V
3V
15
10
5
TEMPERATURE (°C)
PROP AGAT IO N DE LAY (ns)
–50 –25
30
35
40
45
050 7525 100 125
3V
5V
11427-019
Rev. A | Page 14 of 20
Data Sheet ADuM3300W/ADuM3301W
Rev. A | Page 15 of 20
APPLICATIONS INFORMATION
PRINTED CIRCUIT BOARD LAYOUT
The ADuM3300W/ADuM3301W digital isolators require no
external interface circuitry for the logic interfaces. Power supply
bypassing is strongly recommended at the input and output
supply pins (see Figure 14). Bypass capacitors are most
conveniently connected between Pin 1 and Pin 2 for VDD1 and
between Pin 15 and Pin 16 for VDD2. Use capacitor values
between 0.01 μF and 0.1 μF. Do not exceed 2 mm for total lead
length between both ends of the capacitor and the input power
supply pin. Consider bypassing between Pin 1 and Pin 8 and
between Pin 9 and Pin 16, unless the ground pair on each
package side is connected close to the package.
Figure 14. Recommended Printed Circuit Board Layout
In applications involving high common-mode transients,
ensure that board coupling across the isolation barrier is min-
imized. Furthermore, design the board layout such that any
coupling that does occur affects all pins equally on a given
component side. Failure to ensure this can cause voltage dif-
ferentials between pins, thereby exceeding the absolute maximum
ratings for the device, leading to latch-up or permanent damage.
See the AN-1109 Application Note for board layout guidelines.
SYSTEM LEVEL ESD CONSIDERATIONS AND
ENHANCEMENTS
System level ESD reliability (for example, per IEC 61000-4-x) is
highly dependent on system design, which varies widely by appli-
cation. The ADuM3300W/ADuM3301W incorporate many
enhancements to make ESD reliability less dependent on system
design. The enhancements include
ESD protection cells are added to all input/output interfaces.
Key metal trace resistances are reduced using wider geometry
and paralleling of lines with vias.
Guarding and isolation technique employed between the
PMOS and NMOS devices minimizes the SCR effect inherent
in CMOS devices.
45° corners on metal traces eliminate areas of high electric
field concentration.
Larger ESD clamps between each supply pin and its
respective ground prevent supply pin overvoltage.
Although the ADuM3300W/ADuM3301W improve system
level ESD reliability, these devices are no substitute for a robust
system level design. See the AN-793 Application Note,
ESD/Latch-Up Considerations with iCoupler® Isolation Products,
for detailed recommendations on board layout and system level
design.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a logic low output can differ from the propagation
delay to a logic high output (see Figure 15).
Figure 15. Propagation Delay Parameters
Pulse width distortion is the maximum difference between these
two propagation delay values and is an indication of how
accurately timing of the input signal is preserved.
Channel-to-channel matching refers to the maximum amount
that the propagation delay differs between channels within a
single ADuM3300W or ADuM3301W component.
Propagation delay skew refers to the maximum amount that the
propagation delay differs between multiple ADuM3300W and
ADuM3301W components operating under the same
conditions.
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions at the input for more than ~1 μs, a periodic set
of refresh pulses indicative of the correct input state is sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses for more than approximately 5 μs, the input side is
assumed to be unpowered or nonfunctional, in which case the
isolator output is forced to a default state by the watchdog timer
circuit (see Table 21).
The limitation on the magnetic field immunity of the
ADuM3300W/ADuM3301W is set by the condition in which
induced voltage in the receiving coil of the transformer is
sufficiently large to either falsely set or reset the decoder. The
following analysis defines the conditions under which this can
occur. The 3.3 V operating condition of the ADuM3300W/
ADuM3301W is examined because it represents the most
susceptible mode of operation.
V
DD1
GND
1
V
IA
V
IB
V
IC/
V
OC
NC
V
E1
GND
1
V
DD2
GND
2
V
OA
V
OB
V
OC/
V
IC
NC
V
E2
GND
2
11427-015
INPUT (V
Ix
)
OUTPUT (V
Ox
)
t
PLH
t
PHL
50%
50%
11427-016
ADuM3300W/ADuM3301W Data Sheet
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V,
establishing a 0.5 V margin in which induced voltages are
tolerated. The voltage induced across the receiving coil is given by
V = (−dβ/dt) ∑π rn2; n = 1, 2, … , N
where:
β is the magnetic flux density (gauss).
rn is the radius of the nth turn in the receiving coil (cm).
N is the number of turns in the receiving coil.
Given the geometry of the receiving coil in the ADuM3300W/
ADuM3301W and an imposed requirement that the induced
voltage is at most 50% of the 0.5 V margin at the decoder, a
maximum allowable magnetic field is calculated, as shown in
Figure 16.
Figure 16. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such a magnetic field event were to occur during a
transmitted pulse (and was of the worst-case polarity), it would
reduce the received pulse from >1.0 V to 0.75 V—still well
above the 0.5 V sensing threshold of the decoder.
The preceding magnetic flux density values correspond to specific
current magnitudes at given distances from the ADuM3300W or
ADuM3301W transformers. Figure 17 expresses these allowable
current magnitudes as a function of frequency for selected
distances. The ADuM3300W/ADuM3301W are extremely
immune and can be affected only by extremely large currents
operating at high frequency very close to the component (see
Figure 17). For the 1 MHz example noted, a 0.5 kA current
would have to be placed 5 mm away from the ADuM3300W or
ADuM3301W to affect the operation of the component.
Figure 17. Maximum Allowable Current
for Various Current to ADuM3300W/ADuM3301W Spacings
Note that at combinations of strong magnetic field and high
frequency, any loops formed by printed circuit board (PCB)
traces can induce error voltages sufficiently large enough to
trigger the thresholds of succeeding circuitry. Take care in the
layout of such traces to avoid this possibility.
POWER CONSUMPTION
The supply current at a given channel of the ADuM3300W or
ADuM3301W isolator is a function of the supply voltage, the
data rate of the channel, and the output load of the channel.
For each input channel, the supply current is given by
IDDI = IDDI(Q) f ≤ 0.5 fr
IDDI = IDDI(D) × (2f − fr) + IDDI(Q) f > 0.5 fr
For each output channel, the supply current is given by
IDDO = IDDO(Q) f ≤ 0.5 fr
IDDO = (IDDO(D) + (0.5 × 10−3) × CL × VDDO) × (2f − fr) + IDDO(Q)
f > 0.5 fr
where:
IDDI(D), IDDO(D) are the input and output dynamic supply currents
per channel (mA/Mbps).
CL is the output load capacitance (pF).
VDDO is the output supply voltage (V).
f is the input logic signal frequency (MHz); it is half of the input
data rate expressed in units of Mbps.
fr is the input stage refresh rate (Mbps).
IDDI(Q), IDDO(Q) are the specified input and output quiescent supply
currents (mA).
To calculate the total IDD1 and IDD2 supply current, the supply
currents for each input and output channel corresponding to
VDD1 and VDD2 are calculated and totaled. Figure 6 provides per
channel input supply current as a function of data rate. Figure 7
and Figure 8 provide per channel output supply current as a
function of data rate for an unloaded output condition and for a
15 pF output condition, respectively. Figure 9 through Figure 12
provide total VDD1 and VDD2 supply current as a function of data
rate for ADuM3300W/ADuM3301W channel configurations.
MAG NE TIC FI E LD FRE QUENCY ( Hz )
100
MAXIMUM ALLOWABLE MAGNETIC FLUX
DENSI TY ( kgau ss)
0.001 1M
10
0.01
1k 10k 10M
0.1
1
100M
100k
11427-017
MAG NE TIC FI E LD FRE QUENCY ( Hz )
MAXIMUM ALL OWABLE CURRE NT (kA)
1000
100
10
1
0.1
0.011k 10k 100M100k 1M 10M
DISTANCE = 5mm
DISTANCE = 1m
DISTANCE = 100mm
11427-018
Rev. A | Page 16 of 20
Data Sheet ADuM3300W/ADuM3301W
INSULATION LIFETIME
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of insu-
lation degradation is dependent on the characteristics of the
voltage waveform applied across the insulation. In addition to
the testing performed by the regulatory agencies, Analog Devices
executes an extensive set of evaluations to determine the life-
time of the insulation structure within the ADuM3300W and
ADuM3301W.
Analog Devices performs accelerated life testing using voltage
levels higher than the rated continuous working voltage. Accel-
eration factors for several operating conditions are determined.
These factors allow calculation of the time to failure at the actual
working voltage.
The values shown in Table 19 summarize the peak voltage for
50 years of service life. In many cases, the approved working voltage
is higher than the 50-year service life voltage. Operation at these
high working voltages can lead to shortened insulation life.
The insulation lifetime of the ADuM3300W/ADuM3301W
depends on the voltage waveform type imposed across the
isolation barrier. The iCoupler insulation structure degrades at
different rates, depending on whether the waveform is bipolar
ac, unipolar ac, or dc. Figure 18, Figure 19, and Figure 20
illustrate these different isolation voltage waveforms.
Bipolar ac voltage is the most stringent environment. The goal
of a 50-year operating lifetime under the bipolar ac condition
determines the maximum working voltage recommended by
Analog Devices.
In the case of unipolar ac or dc voltage, the stress on the insula-
tion is significantly lower. This allows operation at higher working
voltages while still achieving a 50-year service life. The working
voltages listed in Table 19 can be applied while maintaining the
50-year minimum lifetime, provided that the voltage conforms
to either the unipolar ac or dc voltage cases. Treat any cross insu-
lation voltage waveform that does not conform to Figure 19 or
Figure 20 as a bipolar ac waveform, and limit its peak voltage to
the 50-year lifetime voltage value listed in Table 19.
Note that the voltage presented in Figure 19 is shown as sinusoidal
for illustration purposes only. It is meant to represent any voltage
waveform varying between 0 V and some limiting value. The
limiting value can be positive or negative, but the voltage cannot
cross 0 V.
Figure 18. Bipolar AC Waveform
Figure 19. Unipolar AC Waveform
Figure 20. DC Waveform
0V
RATE D PE AK V OL TAG E
11427-020
0V
RATE D PE AK V OL TAG E
11427-021
0V
RATE D PE AK V OL TAG E
11427-022
Rev. A | Page 17 of 20
ADuM3300W/ADuM3301W Data Sheet
Rev. A | Page 18 of 20
PACKAGING AND ORDERING INFORMATION
OUTLINE DIMENSIONS
Figure 21. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1, 2 Temperature Range
Number of
Inputs,
VDD1 Side
Number of
Inputs,
VDD2 Side
Maximum
Data Rate
(Mbps)
Maximum
Propagation
Delay, 5 V (ns)
Maximum
Pulse Width
Distortion (ns)
Package
Option3
ADuM3300WARWZ −40°C to +125°C 3 0 1 100 40 RW-16
ADuM3300WBRWZ −40°C to +125°C 3 0 10 36 3.5 RW-16
ADuM3301WARWZ −40°C to +125°C 2 1 1 100 40 RW-16
ADuM3301WBRWZ −40°C to +125°C 2 1 10 36 3.5 RW-16
1 Z = RoHS Compliant Part.
2 W = Qualified for Automotive Applications.
3 Tape and reel are available. The addition of an -RL suffix designates a 13-inch (1,000 units) tape and reel option.
AUTOMOTIVE PRODUCTS
The ADuM3300W and ADuM3301W models are available with controlled manufacturing to support the quality and reliability
requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial
models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products
shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product
ordering information and to obtain the specific Automotive Reliability reports for these models.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-013-AA
10.50 (0.4134)
10.10 (0.3976)
0.30 (0.0118)
0.10 (0.0039)
2.65 (0.1043)
2.35 (0.0925)
10.65 (0.4193)
10.00 (0.3937)
7.60 (0.2992)
7.40 (0.2913)
0.75(0.0295)
0.25(0.0098)
45°
1.27 (0.0500)
0.40 (0.0157)
C
OPLANARITY
0.10 0.33 (0.0130)
0.20 (0.0079)
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
8°
0°
16 9
8
1
1.27 (0.0500)
BSC
03-27-2007-B
Data Sheet ADuM3300W/ADuM3301W
NOTES
Rev. A | Page 19 of 20
