LM3433SQ-14AEV/NOPB - NATIONAL SEMICONDUCTOR

March 7, 2008

LM3433

Common Anode Capable High Brightness LED Driver with

High Frequency Dimming

General Description

The LM3433 is an adaptive constant on-time DC/DC buck

(step-down) constant current controller (a true current

source). The LM3433 provides a constant current for illumi-

nating high power LEDs. The output configuration allows the

anodes of multiple LEDs to be tied directly to the ground ref-

erenced chassis for maximum heat sink efficacy. The high

frequency capable architecture allows the use of small exter-

nal passive components and no output capacitor while main-

taining low LED ripple current. Two control inputs are used to

modulate LED brightness. An analog current control input is

provided so the LM3433 can be adjusted to compensate for

LED manufacturing variations and/or color temperature cor-

rection. The other input is a logic level PWM control of LED

current. The PWM functions by shorting out the LED with a

parallel switch allowing high PWM dimming frequencies. High

frequency PWM dimming allows digital color temperature

control, interference blanking, field sequential illumination,

and brightness control. Additional features include thermal

shutdown, VCC under-voltage lockout, and logic level shut-

down mode. The LM3433 is available in a low profile LLP-24

package.

Features

■Operating input voltage range of -9V to -14V w.r.t. LED

anode

■Control inputs are referenced to the LED anode

■Output current greater than 6A

■Greater than 30kHz PWM frequency capable

■Negative output voltage capability allows LED anode to be

tied directly to chassis for maximum heat sink efficacy

■No output capacitor required

■Up to 1MHz switching frequency

■Low IQ, 1mA typical

■Soft start

■Adaptive programmable ON time allows for constant ripple

current

■LLP-24 package

Applications

■LCD backlighting

■Projection systems

■Solid state lighting

■Automotive lighting

Typical Application Circuit

30031531

LM3433 Common Anode Capable High Brightness LED Driver with High Frequency Dimming

Connection Diagram

Top View

30031504

24-Lead LLP

NS Package Number SQA24A

Ordering Information

Order Number Spec. Package

Type

NSC Package

Drawing

Supplied As

LM3433SQ NOPB LLP-24 SQA24A 1000 Units, Tape and Reel

LM3433SQX NOPB LLP-24 SQA24A 4500 Units, Tape and Reel

Pin Descriptions

Pin Name Function

1TON

On-time programming pin. Tie an external resistor (RON) from TON to CSN, and a capacitor

(CON) from TON to VEE. This sets the nominal operating frequency when the LED is fully

illuminated.

2 ADJ

Analog LED current adjust. Tie to VIN for fixed 60mV average current sense resistor voltage. Tie

to an external reference to adjust the average current sense resistor voltage (programmed output

current). Refer to the "VSENSE vs. ADJ Voltage" graphs in the Typical Performance

Characteristics section and the Design Procedure section of the datasheet.

3 EN Enable pin. Connect this pin to logic level HI or VIN for normal operation. Connect this pin to

CGND for low current shutdown. EN is internally tied to VIN through a 100k resistor.

4 DIM Logic level input for LED PWM dimming. DIM is internally tied to CGND through a 100k resistor.

5 VIN Logic power input: Connect to positive voltage between +3.0V and +5.8V w.r.t. CGND.

6 CGND Chassis ground connection.

7 VEE Negative voltage power input: Connect to voltage between –14V to –9V w.r.t. CGND.

8 COMP Compensation pin. Connect a capacitor between this pin and VEE.

9 NC No internal connection. Tie to VEE or leave open.

10 SS Soft Start pin. Tie a capacitor from SS to VEE to reduce input current ramp rate. Leave pin open

if function is not used. The SS pin is pulled to VEE when the device is not enabled.

11 NC No internal connection. Tie to VEE or leave open.

12 NC No internal connection. Tie to VEE or leave open.

13 LS Low side FET gate drive return pin.

14 LO Low side FET gate drive output. Low in shutdown.

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LM3433

Pin Name Function

15 VCC

Low side FET gate drive power bypass connection and boost diode anode connection. Tie a

2.2µF capacitor between VCC and VEE.

16 BST High side "synchronous" FET drive bootstrap rail.

17 HO High side "synchronous" FET gate drive output. Pulled to HS in shutdown.

18 HS Switching node and high side "synchronous" FET gate drive return.

19 DIMR LED dimming FET gate drive return. Tie to LED cathode.

20 DIMO LED dimming FET gate drive output. DIMO is a driver that switches between DIMR and BST2.

21 BST2 DIMO high side drive supply pin. Tie a 0.1µF between BST2 and CGND.

22 NC No internal connection. Tie to VEE or leave open.

23 CSN Current sense amplifier inverting input. Connect to current sense resistor negative terminal.

24 CSP Current sense amplifier non-inverting input. Connect to current sense resistor positive terminal.

EP VEE

Exposed Pad on the underside of the device. Connect this pad to a PC board plane connected

to VEE.

Block Diagram

30031503

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LM3433

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

VIN, EN, DIM, ADJ to CGND -0.3V to +7V

COMP, SS to VEE -0.3V to +7V

BST to HS -0.3V to +7V

VCC to VEE -0.3V to +7.5V

CGND, DIMR, CSP, CSN,

TON to VEE -0.3V to +16V

HS to VEE (Note 2) -0.3V to +16V

LS to VEE -0.3V to +0.3V

HO output HS-0.3V to BST+0.3V

DIMO to DIMR -0.3V to +7V

LO output LS-0.3V to VCC +0.3V

BST2 to VEE -0.3V to 22.0V

Maximum Junction

Temperature

150°C

Power Dissipation(Note 3) Internally Limited

ESD Susceptibility

(Note 4)

Human Body Model 2kV

Machine Model 200V

Charge Device Model 1kV

Operating Conditions

Operating Junction

Temperature Range (Note 5) −40°C to +125°C

Storage Temperature −65°C to +150°C

Input Voltage VIN w.r.t. CGND 3.0V to 5.8V

Input Voltage VEE w.r.t. CGND -9V to -14V

ADJ Input Voltage Range to

CGND

0V to VIN

CSP, CSN Common Mode

Range With Respect to CGND

-6V to 0V

Electrical Characteristics

Specifications in standard type face are for TJ = 25°C and those with boldface type apply over the full Operating Temperature

Range ( TJ = −40°C to +125°C). Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical

values represent the most likely parametric norm at TJ = +25ºC, and are provided for reference purposes only. Unless otherwise

stated the following conditions apply: VEE = -12.0V and VIN = +3.3V with respect to CGND.

Symbol Parameter Conditions Min(Note 5) Typ(Note 6) Max(Note 5) Units

SUPPLY CURRENT

IINVEE VEE Quiescent Current EN = CGND 3 19 µA

EN = VIN, Not Switching 1.0 mA

IINVIN VIN Quiescent Current EN = VIN, Not Switching 300 µA

EN = CGND 35 71

OUTPUT CURRENT CONTROL

VCS Current sense target voltage;

VCS = VCSP – VCSN

VADJ = VIN 57 60 63 mV

GADJ IADJ Gain = (VADJ-CGND)/

(VCNP-VCSN)

VIN = 3.3V, VADJ = 0.5V or 1.5V

w.r.t. CGND 15 16.67 18 V/V

ICSN Isense Input Current VADJ = 1V w.r.t. CGND -50 µA

VADJ = VIN 10

ICSP Isense Input Current VADJ = VIN 60 µA

VADJ = 1V w.r.t. CGND 1

Gm CS to COMP

Transconductance; Gm =

ICOMP / (VCSP – VCSN - VADJ/

16.67)

0.6 1.3 2.2 mS

ON TIME CONTROL

TONTH On time threshold VTON - VEE at terminate ON time

event 230 287 334 mV

GATE DRIVE AND INTERNAL REGULATOR

VCCOUT VCC output regulation w.r.t. VEE ICC = 0mA to 20mA 6.3 6.75 7.1 V

VCCILIM VCC current limit VCC = VEE 33 53 mA

ROLH HO output low resistance I = 50mA source 2

Ω

ROHH HO output high resistance I = 50mA sink 3

ROLL LO output low resistance I = 50mA source 2

Ω

ROHL LO output high resistance I = 50mA sink 3

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LM3433

Symbol Parameter Conditions Min(Note 5) Typ(Note 6) Max(Note 5) Units

ROLP DIMO output low resistance I = 5mA source 20

Ω

ROHP DIMO output high resistance I = 5mA sink 30

FUNCTIONAL CONTROL

VINUVLO VIN undervoltage lockout With respect to CGND 1.4 V

VCCUVLO VCC - VEE undervoltage lockout

thresholds

On Threshold 6.0 6.6 7.0 V

Off threshold 4.9 5.4 5.8

VEN Enable threshold, with respect

to CGND

Device on w.r.t. CGND 1.6 V

Device off w.r.t. CGND 0.6

REN Enable pin pullup resistor 100 kΩ

VDIM DIM logic input threshold DIM rising threshold w.r.t.

CGND

1.6

DIM falling threshold w.r.t.

CGND

0.6

RDIM DIM pin pulldown resistor 100 kΩ

IADJ ADJ pin current -1.0 1.0 µA

ISS SS pin source current 10 µA

RSS SS pin pulldown resistance EN = CGND 1.0 kΩ

AC SPECIFICATIONS

TDTD LO and HO dead time LO falling to HO rising dead

time

HO falling to LO rising dead

time

TPDIM DIM to DIMO propagation

delay

DIM rising to DIMO rising delay 68 124

DIM falling to DIMO falling

delay

58 160

THERMAL SPECIFICATIONS

TJLIM Junction temperature thermal

limit

175 °C

TJLIM(hyst) Thermal limit hysteresis 20 °C

θJA LLP-24 package thermal

resistance

JEDEC 4 layer board 39 °C/W

Note 1: Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended

to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.

Note 2: The HS pin can go to -6V with respect to VEE for 30ns and +22V with respect to VEE for 50ns without sustaining damage.

Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance,

θJA, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using: PD (MAX) = (TJ(MAX) − TA)/

θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal

shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=175°C (typ.) and disengages at TJ=155°C (typ).

Note 4: Human Body Model, applicable std. JESD22-A114-C. Machine Model, applicable std. JESD22-A115-A. Field Induced Charge Device Model, applicable

std. JESD22-C101-C.

Note 5: All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100%

production tested. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used

to calculate Average Outgoing Quality Level (AOQL).

Note 6: Typical numbers are at 25°C and represent the most likely norm.

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LM3433

Typical Performance Characteristics

Efficiency vs. LED Forward Voltage

(VCGND-VEE = 9V)

30031523

Efficiency vs. LED Forward Voltage

(VCGND-VEE = 12V)

30031522

Efficiency vs. LED Forward Voltage

(VCGND-VEE = 14V)

30031521

VSENSE vs. VADJ

(VIN = 3.3V)

30031518

VSENSE vs. VADJ

(VIN = 5.0V)

30031519

VSENSE vs. Temperature

(ADJ = VIN)

30031524

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LM3433

VSENSE vs. Temperature

(ADJ = 1.0V)

30031525

Average LED Current vs. DIM Duty Cycle

(30kHz dimming, ILED = 6A nominal)

30031520

Startup Waveform

30031567

ILED = 6A nominal, VIN = 3.3V, VEE = -12V, VLED = 3V, SS = open

Top trace: EN input, 2V/div, DC

Middle trace: VEE input current, 2A/div, DC

Bottom trace: ILED, 2A/div, DC

T = 100µs/div

Shutdown Waveform

30031568

ILED = 6A nominal, VIN = 3.3V, VEE = -12V, VLED = 3V, SS = open

Top trace: EN input, 2V/div, DC

Middle trace: VEE input current, 2A/div, DC

Bottom trace: ILED, 2A/div, DC

T = 100µs/div

30kHz PWM Dimming Waveform Showing Inductor Ripple

Current

30031566

ILED = 6A nominal, VIN = 3.3V, VEE = -12V

Top trace: DIM input, 2V/div, DC

Bottom trace: ILED, 2A/div, DC

T = 10µs/div

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LM3433

Operation

CURRENT REGULATOR OPERATION

The LM3433 is a controller for a Continuous Conduction Buck

Converter. Because of its buck topology and operation in the

continuous mode, the output current is very well controlled. It

only varies within a switching frequency cycle by the inductor

ripple current. This ripple current is normally set at 10% of the

DC current. Setting the ripple current lower than 10% is a

useful tradeoff of inductor size for less LED light output ripple.

Additional circuitry can be added to achieve any LED light

ripple desired.

The LED current is set by the voltage across a sense resistor.

This sense voltage is nominally 60mV but can be pro-

grammed higher or lower by an external control voltage.

The running frequency of the converter is programmed by an

external RC network in conjunction with the LED's forward

voltage. The frequency is nominally set around 200kHz to

500khz. Fast PWM control is available by shorting the output

of the current source by a MOSFET in parallel with the LED.

During the LED OFF time the running frequency is determined

by the RC network and the parasitic resistance of the output

circuit including the DIM FET RDSON.

The LM3433 system has been evaluated to be a very accu-

rate, high compliance current source. This is manifest in its

high output impedance and accurate current control. The cur-

rent is measured to vary less than 6mA out of 6A when

transitioning from LED OFF (output shorted) to LED ON (out-

put ~6V).

PROTECTION

The LM3433 has dedicated protection circuitry running during

normal operation. The thermal shutdown circuitry turns off all

power devices when the die temperature reaches excessive

levels. The VCC undervoltage lockout (UVLO) comparator

protects the power devices during power supply startup and

shutdown to prevent operation at voltages less than the min-

imum operating input voltage. The VCC pin is short circuit

protected to VEE. The LM3433 also features a shutdown mode

which decreases the supply current to approximately 35µA.

The ADJ, EN, and DIM pins are capable of sustaining up to

+/-2mA. If the voltages on these pins will exceed either VIN or

CGND by necessity or by a potential fault, an external resistor

is recommended for protection. Size this resistor to limit pin

current to under 2mA. A 10k resistor should be sufficient. This

resistor may be used in any application for added protection

without any impact on function or performance.

DESIGN PROCEDURE

This section presents guidelines for selecting external com-

ponents.

SETTING LED CURRENT CONTROL

LM3433 uses average current mode control to regulate the

current delivered to the LED (ILED). An external current sense

resistor (RSENSE) in series with the LED is used to convert

ILED into a voltage that is sensed by the LM3433 at the CSP

and CSN pins. CSP and CSN are the inputs to an error am-

plifier with a programmed input offset voltage (VSENSE).

VSENSE is used to regulate ILED based on the following equa-

tion:

FIXED LED CURRENT

The ADJ pin sets VSENSE. Tie ADJ to VIN to use a fixed 60mV

internal reference for VSENSE. Select RSENSE to fix the LED

current based on the following equation:

ADJUSTABLE LED CURRENT

When tied to an external voltage the ADJ pin sets VSENSE

based on the following equation:

When the reference on ADJ is adjustable, VSENSE and ILED

can be adjusted within the linear range of the ADJ pin. This

range has the following limitations:

When VADJ is less than this linear range the VSENSE is guar-

anteed by design to be less than or equal to 0.3V/16.667.

When VADJ is greater than this linear range and less than

VIN - 1V, VSENSE is guaranteed by design to be less than or

equal to VADJ/16.667. If VADJ is greater than VIN - 1V,

VSENSE switches to 60mV.

INPUT CAPACITOR SELECTION

A low ESR ceramic capacitor is needed to bypass the MOS-

FETs. This capacitor is connected between the drain of the

synchronous FET (CGND) and the source of the main switch

(VEE). This capacitor prevents large voltage transients from

appearing at the VEE pin of the LM3433. Use a 22µF value

minimum with X5R or X7R dielectric. In addition to the FET

bypass capacitors, additional bypass capacitors should be

placed near the VEE and VIN pins and should be returned to

CGND.

The input capacitor must also be sized to handle the dimming

frequency input ripple when the DIM function is used. This

ripple may be as high as 85% of the nominal DC input current

(at 50% duty cycle). When dimming this input capacitor

should be selected to handle the input ripple current.

RECOMMENDED OPERATING FREQUENCY AND ON

TIME "TIMEON" CALCULATION

Although the switching frequency can be set over a wide

range, the following equation describes the recommended

frequency selection given inexpensive magnetic materials

available today:

In the above equation A=1.2 for powdered iron core inductors

and A=0.9 or less for ferrite core inductors. This difference

takes into account the fact that ferrite cores generally become

more lossy at higher frequencies. Given the switching fre-

quency f calculated above, TIMEON can be calculated. If

VLED is the forward voltage drop of the LED that is being driv-

en, TIMEON can be calculated with the following equation:

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LM3433

TIMING COMPONENTS (RON and CON)

Using the calculated value for TIMEON, the timing compo-

nents RON and CON can be selected. CON should be large

enough to dominate the parasitic capacitance of the TON pin.

A good CON value for most applications is 1nF. Based on cal-

culated TIMEON, CON, and the nominal VEE and VLED voltages,

RON can be calculated based on the following equation:

INDUCTOR SELECTION

The most critical inductor parameters are inductance, current

rating, and DC resistance. To calculate the inductance, use

the desired peak to peak LED ripple current (IRIPPLE), RON,

and CON. A reasonable value for IRIPPLE is 10% of ILED. The

inductor value is calculated using the following equation:

For all VLED and VEE voltages, IRIPPLE remains constant

and is only dependent on the passive external compo-

nents RON, CON, and L.

The I2R loss caused by the DC resistance of the inductor is

an important parameter affecting the efficiency. Lower DC re-

sistance inductors are larger. A good tradeoff point between

the efficiency and the core size is letting the inductor I2R loss

equal 1% to 2% of the output power. The inductor should have

a current rating greater than the peak current for the applica-

tion. The peak current is ILED plus 1/2 IRIPPLE.

POWER FET SELECTION

FETs should be chosen so that the I2RDSON loss is less than

1% of the total output power. Analysis shows best efficiency

with around 8mΩ of RDSON and 15nC of gate charge for a 6A

application. All of the switching loss is in the main switch FET.

An additional important parameter for the synchronous FET

is reverse recovery charge (QRR). High QRR adversely affects

the transient voltages seen by the IC. A low QRR FET should

be used.

DIM FET SELECTION

Choose a DIM FET with the lowest RDSON for maximum effi-

cieny and low input current draw during the DIM cycle. The

output voltage during DIM will determine the switching fre-

quency. A lower output voltage results in a lower switching

frequency. If the lower frequency during DIM must be bound,

choose a FET with a higher RDSON to force the switching fre-

quency higher during the DIM cycle.

BOOTSTRAP CAPACITORS

The LM3433 uses two bootstrap capacitors and a bypass ca-

pacitor on VCC to generate the voltages needed to drive the

external FETs. A 2.2µF ceramic capacitor or larger is recom-

mended between the VCC and LS pins. A 0.47µF is recom-

mended between the HS and BST pins. A 0.1µF is

recommended between BST2 and CGND.

SOFT-START CAPACITOR

The LM3433 integrates circuitry that, when used in conjunc-

tion with the SS pin, will slow the current ramp on start-up.

The SS pin is used to tailor the soft-start for a specific appli-

cation. A capacitor value of 0.1µF on the SS pin will yield a

12mS soft start time. For most applications soft start is not

needed.

ENABLE OPERATION

The EN pin of the LM3433 is designed so that it may be con-

trolled using a 1.6V or higher logic signal. If the enable func-

tion is not used, the EN pin may be tied to VIN or left open.

This pin is pulled to VIN internally through a 100k pull up re-

sistor.

PWM DIM OPERATION

The DIM pin of the LM3433 is designed so that it may be con-

trolled using a 1.6V or higher logic signal. The PWM frequen-

cy easily accomodates more than 40kHz dimming and can be

much faster if needed. If the PWM DIM pin is not used, tie it

to CGND or leave it open. The DIM pin is tied to CGND inter-

nally through a 100k pull down resistor.

LAYOUT CONSIDERATIONS

The LM3433 is a high performance current driver so attention

to layout details is critical to obtain maximum performance.

The most important PCB board design consideration is mini-

mizing the loop comprised by the main FET, synchronous

FET, and their associated decoupling capacitor(s). Place the

VCC bypass capacitor as near as possible to the LM3433.

Place the PWM dimming/shunt FET as close to the LED as

possible. A ground plane should be used for power distribu-

tion to the power FETs. Use a star ground between the

LM3433 circuitry, the synchronous FET, and the decoupling

capacitor(s). The EP contact on the underside of the package

must be connected to VEE. The two lines connecting the sense

resistor to CSN and CSP must be routed as a differential pair

directly from the resistor. A Kelvin connection is recommend-

ed. It is good practice to route the DIMO/DIMR, HS/HO, and

LO/LS lines as differential pairs. The most important PCB

board design consideration is minimizing the loop comprised

by the main FET, synchronous FET, and their associated de-

coupling capacitor(s). Optimally this loop should be orthogo-

nal to the ground plane.

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LM3433

Application Information

30031516

FIGURE 1. 2A to 6A Output Application Circuit

30031517

FIGURE 2. 2A to 14A Output Application Circuit

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LM3433

Some Recommended Inductors (Others May Be Used)

Manufacturer Inductor Contact Information

Coilcraft GA3252-AL and SER1360 series www.coilcraft.com

800-322-2645

Coiltronics HCLP2 series www.coiltronics.com

Pulse PB2020 series www.pulseeng.com

Some Recommended Input/Bypass Capacitors (Others May Be Used)

Manufacturer Capacitor Contact Information

Vishay Sprague 293D, 592D, and 595D series tantalum www.vishay.com

407-324-4140

Taiyo Yuden High capacitance MLCC ceramic www.t-yuden.com

408-573-4150

Cornell Dubilier ESRD seriec Polymer Aluminum Electrolytic

SPV and AFK series V-chip series www.cde.com

MuRata High capacitance MLCC ceramic www.murata.com

Some Recommended MOSFETs (Others May Be Used)

Manufacturer Inductor Contact Information

Siliconix Si7386DP (Main FET, DIM FET)

Si7668ADP (Synchronous FET)

www.vishay.com/company/brands/

siliconix/

ON Semiconductor NTMFS4841NHT1G (Main FET, Synchronous FET, DIM

FET)

www.onsemi.com

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LM3433

Physical Dimensions inches (millimeters) unless otherwise noted

LLP-24 Pin Package (SQA)

For Ordering, Refer to Ordering Information Table

NS Package Number SQA24A

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LM3433

Notes

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LM3433

Notes

LM3433 Common Anode Capable High Brightness LED Driver with High Frequency Dimming

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