FEATURES
● 4mA TO 20mA TRANSMITTER
● SELECTABLE INPUT/OUTPUT RANGES:
0V to +5V, 0V to +10V Inputs
0mA to 20mA, 5mA to 25mA Outputs
Other Ranges
● 0.005% MAX NONLINEARITY, 14 BIT
● PRECISION +10V REFERENCE OUTPUT
● SINGLE-SUPPLY OPERATION
● WIDE SUPPLY RANGE: 13.5V to 40V
APPLICATIONS
● INDUSTRIAL PROCESS CONTROL
● PRESSURE/TEMPERATURE TRANSMITTERS
● CURRENT-MODE BRIDGE EXCITATION
● GROUNDED TRANSDUCER CIRCUITS
● CURRENT SOURCE REFERENCE FOR DATA
ACQUISITION
● PROGRAMMABLE CURRENT SOURCE FOR
TEST EQUIPMENT
● POWER PLANT/ENERGY SYSTEM
MONITORING
DESCRIPTION
The XTR110 is a precision voltage-to-current converter
designed for analog signal transmission. It accepts inputs
of 0 to 5V or 0 to 10V and can be connected for outputs of
4mA to 20mA, 0mA to 20mA, 5mA to 25mA, and many other
commonly used ranges.
A precision on-chip metal film resistor network provides input
scaling and current offsetting. An internal 10V voltage refer-
ence can be used to drive external circuitry.
The XTR110 is available in 16-pin plastic DIP, ceramic DIP
and SOL-16 surface-mount packages. Commercial and in-
dustrial temperature range models are available.
R5
A1
A2
16
1
13
14
7
6
8
10
9
15
12
11
4
3
5
2
R7
R6
R9
R4
R3
R2
R1
R8
+10V
Reference
VREF Force
VREF Sense
VREF Adjust
VIN1 (10V)
VREF In
VIN2 (5V)
Common
+VCC
Offset
(zero)
Adjust
16mA
Span
4mA
Span
Span
Adjust
Source
Sense
Source
Resistor
Gate
Drive
PRECISION VOLTAGE-TO-CURRENT
CONVERTER/TRANSMITTER
XTR110
SBOS141C – JANUARY 1984 – REVISED SEPTEMBER 2009
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1984-2009, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
www.ti.com
XTR110
2SBOS141C
www.ti.com
PIN CONFIGURATION
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Source Resistor
Common
VREF In
VIN1 (10V)
VIN2 (5V)
Zero Adjust
Zero Adjust
Span Adjust
+VCC
VREF Force
Gate Drive
Source Sense
VREF Sense
VREF Adjust
4mA Span
16mA Span
TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
Power Supply, +VCC ............................................................................ 40V
Input Voltage, VIN1, VIN2, VREF IN ....................................................... +VCC
See text regarding safe negative input voltage range.
Storage Temperature Range: A, B ................................–55°C to +125°C
K, U ..................................–40°C to +85°C
Output Short-Circuit Duration, Gate Drive
and VREF Force................................ Continuous to common and +VCC
Output Current Using Internal 50Ω Resistor ................................... 40mA
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instruments
recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation proce-
dures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE TEMPERATURE
PRODUCT PACKAGE-LEAD DESIGNATOR RANGE
XTR110AG DIP-16 Ceramic JD –40°C to +85°C
XTR110BG DIP-16 Ceramic JD –40°C to +85°C
XTR110KP DIP-16 Plastic N 0°C to +70°C
XTR110KU SOL-16 Surface-Mount DW 0°C to +70°C
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
PACKAGE/ORDERING INFORMATION(1)
XTR110 3
SBOS141C www.ti.com
XTR110AG, KP, KU XTR110BG
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
TRANSMITTER
Transfer Function
Input Range: VIN1(5) Specified Performance 0 +10 * * V
VIN2 Specified Performance 0 +5 * * V
Current, IOSpecified Performance(1) 420* *mA
Derated Performance(1) 040* *mA
Nonlinearity 16mA/20mA Span(2) 0.01 0.025 0.002 0.005 % of Span
Offset Current, IOS IO = 4mA(1)
Initial (1) 0.2 0.4 0.02 0.1 % of Span
vs Temperature (1) 0.0003 0.005 * 0.003 % of Span/°C
vs Supply, VCC (1) 0.0005 0.005 * * % of Span/V
Span Error IO = 20mA
Initial (1) 0.3 0.6 0.05 0.2 % of Span
vs Temperature (1) 0.0025 0.005 0.0009 0.003 % of Span/°C
vs Supply, VCC (1) 0.003 0.005 * * % of Span/V
Output Resistance From Drain of FET (QEXT)(3) 10 x 109*Ω
Input Resistance VIN1 27 * kΩ
VIN2 22 * kΩ
VREF In 19 * kΩ
Dynamic Response
Settling Time To 0.1% of Span 15 * µs
To 0.01% of Span 20 * µs
Slew Rate 1.3 * mA/µs
VOLTAGE REFERENCE
Output Voltage +9.95 +10 +10.05 +9.98 * +10.02 V
vs Temperature 35 50 15 30 ppm/°C
vs Supply, VCC Line Regulation 0.0002 0.005 * * %/V
vs Output Current Load Regulation 0.0005 0.01 * * %/mA
vs Time 100 * ppm/1k hrs
Trim Range –0.100 +0.25 * * V
Output Current Specified Performance 10 * mA
POWER SUPPLY
Input Voltage, VCC +13.5 +40 * * V
Quiescent Current Excluding IO3 4.5 * * mA
TEMPERATURE RANGE
Specification:AG, BG –40 +85 * * °C
KP, KU 0 +70 °C
Operating:AG, BG –55 +125 * * °C
KP, KU –25 +85 °C
ELECTRICAL CHARACTERISTICS
At TA = +25°C and VCC = +24V and RL = 250Ω**, unless otherwise specified.
IO = 10 [(VREFIn/16) + (VIN1/4) + (VIN2/2)] /RSPAN
* Specifications same as AG/KP grades. ** Specifications apply to the range of RL shown in Typical Performance Curves.
NOTES: (1) Including internal reference. (2) Span is the change in output current resulting from a full-scale change in input voltage. (3) Within compliance range limited
by (+VCC – 2V) +VDS required for linear operation of the FET. (4) For VREF adjustment circuit see Figure 3. (5) For extended IREF drive circuit see Figure 4. (5) Unit may
be damaged. See
Input Voltage Range
section.
XTR110
4SBOS141C
www.ti.com
0
Temperature (°C)
I
CC
vs TEMPERATURE
–40
5
4
3
2
1
–200 20406080
I
CC
(mA) (excluding I
O
)
I
O
= 20mA
I
O
= 4mA
0
+V
CC
(V)
MAXIMUM R
L
vs V
CC
R
L
(Ω)
2500
2000
1500
1000
500
20 3515 4025 30
I
O MAX
= 20mA
I
O MAX
= 40mA
TYPICAL PERFORMANCE CURVES
TA = +25°C, VCC = 24VDC, RL = 250Ω, unless otherwise noted.
0.001
V
REF
LINE REGULATION vs FREQUENCY
∆ V
REF
/∆ V
CC
(%/V)
10
1
0.1
0.01
1 10 100 1k 10k 100k
Ripple Frequency (Hz)
0.001
IO POWER SUPPLY REGULATION vs FREQUENCY
∆ IO/∆ VCC (% of span/V)
10
1
0.1
0.01
1 10 100 1k 10k 100k
Ripple Frequency (Hz)
Temperature (°C)
TOTAL OUTPUT ERROR vs TEMPERATURE
–40 –200 20406080
Error (% of span)
–2
2
1
0
–1
BG
AG
AG
0
V
REF
Output Current (mA)
(I
OUT
has minimal effect on T
J
)
JUNCTION TEMPERATURE RISE
vs V
REF
OUTPUT CURRENT
Junction Temperature Rise
Above Ambient (°C)
100
80
60
40
20
2801046
V
CC
= +40V
V
CC
= +15V
V
CC
= +24V
Max. T
J
= +175°C
Max. Temp. Rise
for +85°C Ambient
θ
JA
= 70°C/W
XTR110 5
SBOS141C www.ti.com
TYPICAL PERFORMANCE CURVES (Continued)
At TA = +25°C, VCC = 24VDC, RL = 250Ω, unless otherwise noted.
SETTLING TIME WITH POS VIN STEP
VIN
0V
0V
IO Error
(0.01% of
Span/Box)
SETTLING TIME WITH NEG VIN STEP
VIN
0V
0V
IO Error
(0.01% of
Span/Box)
PULSE RESPONSE
VIN
0V
IO
into
500Ω
0V
XTR110
6SBOS141C
www.ti.com
APPLICATIONS INFORMATION
Figure 1 shows the basic connections required for 0V to 10V
input and 4ma to 20mA output. Other input voltage and
output current ranges require changes in connections of pins
3, 4, 5, 9 and 10 as shown in the table of Figure 1.
The complete transfer function of the XTR110 is:
IO =(1)
RSPAN is the total impedance seen at the emitter of the
internal NPN transistor. This impedance varies depending
on how pins 8, 9 and 10 are configured. Typical operating
region configurations are shown in Figure 1. An external
RSPAN can be connected for different output current ranges
as described later.
EXTERNAL TRANSISTOR
An external pass transistor, QEXT, is required as shown in
Figure 1. This transistor conducts the output signal current.
A P-channel MOSFET transistor is recommended. It must
(VREF IN)
16
(VIN1)
4
10 + + (VIN2)
2
RSPAN
FIGURE 1. Basic Circuit Connection.
INPUT OUTPUT
RANGE (V) RANGE (mA) PIN 3 PIN 4 PIN 5 PIN 9 PIN 10
0-10 0-20 Com Input Com Com Com
2-10 4-20 Com Input Com Com Com
0-10 4-20 +10V Ref Input Com Com Open
0-10 5-25 +10V Ref Input Com Com Com
0-5 0-20 Com Com Input Com Com
1-5 4-20 Com Com Input Com Com
0-5 4-20 +10V Ref Com Input Com Open
0-5 5-25 +10V Ref Com Input Com Com
MANUFACTURER PART NO. BVDSS(1) BVGS(1) PACKAGE
Ferranti ZVP1304A 40V 20V TO-92
ZVP1304B 40V 20V TO-39
ZVP1306A 60V 20V TO-92
ZVP1306B 60V 20V TO-39
International
Rectifier IRF9513 60V 20V TO-220
Motorola MTP8P08 80V 20V TO-220
RCA RFL1P08 80V 20V TO-39
RFT2P08 80V 20V TO-220
Siliconix VP0300B 30V 40V TO-39
(preferred) VP0300L 30V 40V TO-92
VP0300M 30V 40V TO-237
VP0808B 80V 40V TO-39
VP0808L 80V 40V TO-92
VP0808M 80V 40V TO-237
Supertex VP1304N2 40V 20V TO-220
VP1304N3 40V 20V TO-92
VP1306N2 60V 20V TO-220
VP1306N3 60V 20V TO-92
NOTE: (1) BVDSS—Drain-source breakdown voltage. BVGS—Gate-source
breakdown voltage.
TABLE I. Available P-Channel MOSFETs.
R5
16.25kΩ
16
1
13
14
7
6
8
10
9
15
12
11
4
3
5
2
R7 6250Ω
R6 1562.5Ω
R9 50Ω
R4
10kΩ
R3
20kΩ
R2
R1
R8
500Ω
+10V
Reference
Zero
Adjust
1µF
++VCC
13.5 to 40V
Span Adjust
4mA Span
RL
(250Ω typ)
IO
4 to 20mA
QEXT
P-Channel
MOSFET
(see text)
IO
IO/10
IO/10
VREF
Adj.
Force
Sense
VIN
0 to 10V
Short
Connection
(see text)
+VCC
16mA Span
5kΩ
15kΩ
have a voltage rating equal or greater than the maximum
power supply voltage. Various recommended types are shown
in Table I.
XTR110 7
SBOS141C www.ti.com
If the supply voltage, +VCC, exceeds the gate-to-source
breakdown voltage of QEXT, and the output connection
(drain of QEXT) is broken, QEXT could fail. If the gate-to-
source breakdown voltage is lower than +VCC, QEXT can be
protected with a 12V zener diode connected from gate to
source.
Two PNP discrete transistors (Darlington-connected) can be
used for QEXT—see Figure 2. Note that an additional capaci-
tor is required for stability. Integrated Darlington transistors
are not recommended because their internal base-emitter
resistors cause excessive error.
TRANSISTOR DISSIPATION
Maximum power dissipation of QEXT depends on the power
supply voltage and full-scale output current. Assuming that
the load resistance is low, the power dissipated by QEXT is:
PMAX = (+VCC) IFS (2)
The transistor type and heat sinking must be chosen accord-
ing to the maximum power dissipation to prevent overheat-
ing. See Table II for general recommendations.
PACKAGE TYPE ALLOWABLE POWER DISSIPATION
TO-92 Lowest: Use minimum supply and at +25°C.
TO-237 Acceptable: Trade-off supply and temperature.
TO-39 Good: Adequate for majority of designs.
TO-220 Excellent: For prolonged maximum stress.
TO-3 Use if hermetic package is required.
TABLE II. External Transistor Package Type and
Dissipation.
INPUT VOLTAGE RANGE
The internal op amp A1 can be damaged if its non-inverting
input (an internal node) is pulled more than 0.5V below
common (0V). This could occur if input pins 3, 4 or 5 were
driven with an op amp whose output could swing negative
under abnormal conditions. The voltage at the input of A1 is:
VA1 = + + (3)
This voltage should not be allowed to go more negative than
–0.5V. If necessary, a clamp diode can be connected from
the negative-going input to common to clamp the input
voltage.
COMMON (Ground)
Careful attention should be directed toward proper con-
nection of the common (grounds). All commons should
be joined at one point as close to pin 2 of the XTR110 as
possible. The exception is the IOUT return. It can be
returned to any point where it will not modulate the
common at pin 2.
VOLTAGE REFERENCE
The reference voltage is accurately regulated at pin 12
(VREF SENSE). To preserve accuracy, any load including pin
(VREF IN)
16
(VIN1)
4
(VIN2)
2
FIGURE 2. QEXT Using PNP Transistors.
XTR110
47nF
RL
IOUT
1
13
14
+VCC
16
22N2907
etc.
TIP30B
etc.
0.047µF
Common
3 should be connected to this point. The circuit in Figure 3
shows adjustment of the voltage reference.
The current drive capability of the XTR110’s internal refer-
ence is 10mA. This can be extended if desired by adding an
external NPN transistor shown in Figure 4.
OFFSET (ZERO) ADJUSTMENT
The offset current can be adjusted by using the potentiom-
eter, R1, shown in Figure 5. Set the input voltage to zero and
then adjust R1 to give 4mA at the output. For spans starting
FIGURE 4. Increasing Reference Current Drive.
XTR110
15
12 +VCC
16
2
Sense
Force
For 100mA with VCC up to
40V use 2N3055 for QREF.
QREF
+10VREF
FIGURE 3. Optional Adjustment of Reference Voltage.
XTR110
V
REF
Adjust
15
12
11
V
REF
Sense
V
REF
Force
+V
CC
16
Common
2
V
REF
R
20kΩR
S(1)
Adjust Range
±5% Optimum
NOTE: (1) R
S
gives higher resolution with reduced
range, set R
S
= 0Ω for larger range.
XTR110
8SBOS141C
www.ti.com
FIGURE 6. Zero and Span of 0V to +10V Input, 4mA to
20mA Output Configuration (see Figure 5).
FIGURE 7. Zero and Span of 0V to +10VIN, 0mA to 20mA
Output Configuration (see Figure 5).
at 0mA, the following special procedure is recommended:
set the input to a small nonzero value and then adjust R1 to
the proper output current. When the input is zero the output
will be zero. Figures 6 and 7 show graphically how offset is
adjusted.
SPAN ADJUSTMENT
The span is adjusted at the full-scale output current using the
potentiometer, R2, shown in Figure 5. This adjustment is
interactive with the offset adjustment, and a few iterations
may be necessary. For the circuit shown, set the input
voltage to +10V full scale and adjust R2 to give 20mA full-
scale output. Figures 6 and 7 show graphically how span is
adjusted.
The values of R2, R3, and R4 for adjusting the span are
determined as follows: choose R4 in series to slightly de-
crease the span; then choose R2 and R3 to increase the span
to be adjustable about the center value.
LOW TEMPERATURE COEFFICIENT OPERATION
Although the precision resistors in the XTR110 track within
1ppm/°C, the output current depends upon the absolute
temperature coefficient (TC) of any one of the resistors, R6,
R7, R8, and R9. Since the absolute TC of the output current
can have 20ppm/°C, maximum, the TC of the output current
can have 20ppm/°C drift. For low TC operation, zero TC
resistors can be substituted for either the span resistors (R6
or R7) or for the source resistor (R9) but not both.
EXTENDED SPAN
For spans beyond 40mA, the internal 50Ω resistor (R9) may
be replaced by an external resistor connected between pins
13 and 16.
Its value can be calculated as follows:
REXT = R9 (SpanOLD/SpanNEW)
Since the internal thin-film resistors have a 20% absolute
value tolerance, measure R9 before determining the final
value of REXT. Self-heating of REXT can cause nonlinearity.
Therefore, choose one with a low TC and adequate power
rating. See Figure 10 for application.
FIGURE 5. Offset and Span Adjustment Circuit for 0V to
+10V Input, 4mA to 20mA Output.
20
15
10
5
0246810
Input Voltage, V
IN1
(V)
Output Current, I
O
(mA)
0mA Offset
Zero Adjust
Span Adjust
20mA Span
See values in Figure 6.
In addition, connect
pins 9 and 10 together.
XTR110
15
1V
to
+5V
Out
1
13
16
2
R4
S
G
D
+
–
9
8
7
6
R1
R2
R3
Span Adjust
Offset
Adjust
0V
to
+10V 4mA to
20mA Out
RL
250Ω
24V
1µF Tantalum Third Wire
14
12
3
4
5
20
15
10
5
0246810
Input Voltage, VIN1 (V)
Output Current, IO (mA)
4mA Offset
Zero Adjust ±1.8% of Span
Span Adjust ±0.45%
as shown
16mA Span
R1 = 100kΩ
R2 = 100kΩ
R3 = 49.9kΩ
R4 = 31.6Ω
−2.5
XTR110 9
SBOS141C www.ti.com
TYPICAL APPLICATIONS
The XTR110 is ideal for a variety of applications requiring
high noise immunity current-mode signal transmission. The
precision +10V reference can be used to excite bridges and
transducers. Selectable ranges make it very useful as a
precision programmable current source. The compact design
and low price of the XTR110 allow versatility with a
minimum of external components and design engineering
expense.
Figures 8 through 10 show typical applications of the
XTR110.
FIGURE 8. ±200mA Current Pump.
16
1
13
14
7
6
8
10
9
15
12
11
4
3
5
2
+10V
Reference
+15V
A
4
A
3
R
9
15kΩ
R
10
1kΩ
Offset
Adjust
R
3
20kΩ
R
5
2MΩ
A
2
R
4
2kΩ
T
3
A
1
R
2
4.99Ω
R
7
4.75kΩ
R
6
402Ω
R
8
200Ω
Fine Trim
RH 50kΩ
Coarse Trim
R
1
2Ω
T
2
–15V
I
O
Span
Adjust
V
IN
V
IN
(V)
105
0
200
–200
I
O
(mA) R
1
, R
2
: Low TC resistors to dissipate 0.32W continuous power.
For other current ranges, scale both resistors proportionately.
R
8
, R
10
, R
11
: 10-turn trimpots for greatest sensitivity.
R
6
, R
7
: Low TC resistors.
A
1
- A
4
: 1/4 LM324 (powered by ±15V).
T
1
: International Rectifier IR9513
(1)
.
T
2
: International Rectifier IR513
(1)
.
T
3
: International Rectifier IRFF9113
(1)
.
NOTE: (1) Or other adequate power rating MOS transistor.
T
1
XTR110
10 SBOS141C
www.ti.com
FIGURE 9. Isolated 4mA to 20mA Channel.
FIGURE 10. 0A to 10A Output Voltage-to-Current Converter.
15
12
4
3
5
13
14
16
2
S
G
D
9
XTR110 0A to
10A Out
See extended span section.
0V to +10V
+24V
REXT
0.1Ω
15
12
3
4
5
1
13
14
16
2
S
G
D
9
1µF
XTR110
VL
4mA to 20mA Out
RL
ISO122
–15V +15V +15V–15V
15
8
16
7
Isolated Power
Supply (722)
Isolation Barrier +15V
0 to –10V
XTR110 11
SBOS141C www.ti.com
DATE REVISION PAGE SECTION DESCRIPTION
Front Page Changed front page to standard format.
Applications Information Changed text in third paragraph.
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
9/09 C 6
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
XTR110AD OBSOLETE DIESALE Y 0 TBD Call TI Call TI
XTR110AG NRND CDIP SB JD 16 1 Green (RoHS &
no Sb/Br) AU N / A for Pkg Type
XTR110BG NRND CDIP SB JD 16 1 Green (RoHS &
no Sb/Br) AU N / A for Pkg Type
XTR110KP ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
XTR110KPG4 ACTIVE PDIP N 16 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
XTR110KU ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR110KU/1K ACTIVE SOIC DW 16 1000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR110KU/1KG4 ACTIVE SOIC DW 16 1000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
XTR110KUG4 ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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PACKAGE OPTION ADDENDUM
www.ti.com 8-Sep-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
XTR110KU/1K SOIC DW 16 1000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
XTR110KU/1K SOIC DW 16 1000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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