MC33172 MC35172 Low power dual bipolar operational amplifiers Features Good consumption/speed ratio: only 200 A for 2.1 MHz, 2 V/s Single (or dual) supply operation from +4 V to +44 V (2 V to 22V) Wide input common mode mode voltage range including VCC- Low level output voltage close to VCC- : 100 mV typical Pin-to-pin compatible with standard dual operational amplifiers N DIP8 (Plastic package) Description The MC3x172 series are dual bipolar operational amplifiers offering both low consumption (200 A/Amp) and good speed (2.1 MHz, 2 V/s). D SO-8 (Plastic micropackage) Moreover, the input common mode range extends down to the lower supply rail, allowing single supply operation from +4 V to +44 V. Output 1 Inverting Input 1 2 - 3 + Non-inverting Input 1 VCC 8 VCC 7 Ouptut - 6 Inverting Input 2 + 5 Non-inverting Input 2 1 4 Pin connections (top view) July 2008 Rev 2 1/9 www.st.com 9 Circuit schematics 1 MC33172 MC35172 Circuit schematics Figure 1. Typical schematic diagram (1/2 MC33172/MC35172) VCC + R5 R4 T7 T8 R6 T10 T9 T1 R7 T13 T12 T11 R8 T25 R3 T16 T15 T6 Input - Input + T24 T26 T17 R13 T14 T22 R14 T13 T2 T21 T19 T28 T27 T20 T3 T29 T4 T23 R2 R1 R10 R9 VCC - 2/9 Output R12 C T5 R11 R15 T30 T31 MC33172 MC35172 2 Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings (AMR) Symbol VCC Parameter Supply voltage Value Unit 22 V (1) V Vid Differential input voltage see note Vin Input voltage see note 1 V Output short-circuit duration Indefinite s Toper Operating free-air temperature range MC33172 MC35172 -40 to 105 -55 to 125 C Rthja Thermal resistance junction to ambient(2) SO-8 DIP8 125 85 C/W Rthjc Thermal resistance junction to case(2) SO-8 DIP8 40 41 C/W Tj Junction temperature 150 C Tstg Storage temperature -65 to 150 C 2 kV 200 V 1 kV HBM: human body ESD model(3) MM: machine model (4) CDM: charged device model(5) Latch-up immunity Class A 1. Either or both input voltages must not exceed the magnitude of VCC. 2. Short-circuits can cause excessive heating and destructive dissipation. Values are typical. 3. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 k resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 4. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of connected pin combinations while the other pins are floating. 5. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins. Table 2. Operating conditions Symbol VCC Parameter Supply voltage Value Unit 2 to 22 V 3/9 Electrical characteristics MC33172 MC35172 3 Electrical characteristics Table 3. VCC+ = +15V, VCC- = -15V, RL connected to Ground, Tamb = 25C (unless otherwise specified) Symbol Parameter Vio Typ. Max. Unit Input offset voltage VCC+ = +15V, VCC- = -15V, Vic = 0V VCC+ = 5V, VCC- = 0V, Vic = 0V, Vo = 1.4V VCC+ = +15V, VCC- = -15V, Vic = 0V, Tmin Tamb Tmax 1 1 4.5 5 6.5 mV Input offset voltage drift 10 Iio Input offset current (Vic = 0V) Tmin Tamb Tmax 5 20 40 nA Iib Input bias current (Vic = 0V) Tmin Tamb Tmax 20 100 200 nA DVio Avd Large signal voltage gain (RL = 10k, Vo = 10V) Tmin Tamb Tmax VOH High level output voltage VCC+= 5V, VCC-= 0V, RL = 10k VCC+= +15V, VCC = -15V, RL= 10k VCC+= +15V, VCC-= -15V, RL= 10k, Tmin Tamb Tmax VOL Low level output voltage VCC+= 5V, VCC-= 0V, RL= 10k VCC+= +15V, VCC-= -15V, RL= 10k VCC+= +15V, VCC-= -15V, RL= 10k, Tmin Tamb Tmax Isc Output short-circuit current (Vid = 1V, Vo = 0V) Source Sink Min. 50 25 100 3.5 13.6 13.3 4.2 14.2 0.1 -14 3 15 V/C V/mV V 0.15 -13.6 -13.3 V mA 6 27 VCC- to VCC+ - 1.8) VCC- to (VCC+ - 2.2) Vicm Input common mode voltage range Tmin Tamb Tmax CMR Common-mode rejection ratio (Vic = Vicm-min) 80 100 dB SVR Supply voltage rejection ratio (VCC = 5 to 15V) 80 100 dB ICC Supply current VCC+ = 5V, VCC- = 0V, no load VCC+ = +15V, VCC- = -15V, no load VCC+ = +15V, VCC- = -15V no load, Tmin Tamb Tmax SR Slew rate (Vin = 10V, RL = 10k, CL = 100pF) 1.6 2 V/s Gain bandwidth product RL = 10k, CL = 100pF, F= 100kHz 1.4 2.1 MHz GBP 200 220 250 250 300 A m Phase margin (RL = 10k, CL = 100pF) 45 Degrees en Equivalent input noise voltage (F = 1kHz) 29 nV -----------Hz 0.05 % 120 dB THD Total harmonic distortion VO1/VO2 Channel separation 4/9 V MC33172 MC35172 4 Package information Package information In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com. 5/9 Package information 4.1 MC33172 MC35172 DIP8 package information Figure 2. DIP8 package mechanical drawing Table 4. DIP8 package mechanical data Dimensions Ref. Millimeters Min. Typ. A Max. Min. Typ. 5.33 Max. 0.210 A1 0.38 0.015 A2 2.92 3.30 4.95 0.115 0.130 0.195 b 0.36 0.46 0.56 0.014 0.018 0.022 b2 1.14 1.52 1.78 0.045 0.060 0.070 c 0.20 0.25 0.36 0.008 0.010 0.014 D 9.02 9.27 10.16 0.355 0.365 0.400 E 7.62 7.87 8.26 0.300 0.310 0.325 E1 6.10 6.35 7.11 0.240 0.250 0.280 e 2.54 0.100 eA 7.62 0.300 eB L 6/9 Inches 10.92 2.92 3.30 3.81 0.430 0.115 0.130 0.150 MC33172 MC35172 4.2 Package information SO-8 package information Figure 3. SO-8 package mechanical drawing Table 5. SO-8 package mechanical data Dimensions Ref. Millimeters Min. Typ. A Inches Max. Min. Typ. 1.75 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 D 4.80 4.90 5.00 0.189 0.193 0.197 E 5.80 6.00 6.20 0.228 0.236 0.244 E1 3.80 3.90 4.00 0.150 0.154 0.157 e 0.25 Max. 0.004 0.010 0.049 1.27 0.050 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k 1 8 1 8 ccc 0.10 0.004 7/9 Ordering information 5 MC33172 MC35172 Ordering information Table 6. Order codes Order code Temperature range MC33172N MC35172N Marking DIP8 Tape MC33172N SO-8 Tape or Tape & reel 33172 DIP8 Tape MC35172N SO-8 Tape or Tape & reel 35172 -55C, +125C MC35172D MC35172DT Revision history Table 7. 8/9 Packing -40C, +105C MC33172D MC33172DT 6 Package Document revision history Date Revision Changes 24-Nov-2001 1 Initial release. 01-Jul-2008 2 ESD values and latch-up immunity added in Table 1: Absolute maximum ratings (AMR). MC33172 MC35172 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. 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