1
Dual-In-Line and SOIC
S D
NC V–
GND IN
V+ VL
2
3
4
8
7
6
5
Top View
1
Dual-In-Line and SOIC
DS2
S1V–
GND IN
V+ VL
2
3
4
8
7
6
5
Top View
DG417
DG419
DG417/418/419
Siliconix
S-52880—Rev. D, 28-Apr-97 1
Precision CMOS Analog Switches
Features Benefits Applications
15-V Analog Signal Range
On-Resistance—rDS(on): 20
Fast Switching Action—tON: 100 ns
Ultra Low Power Requirements—PD:35 nW
TTL and CMOS Compatible
MiniDIP and SOIC Packaging
44-V Supply Max Rating
Wide Dynamic Range
Low Signal Errors and Distortion
Break-Before-Make
Switching Action
Simple Interfacing
Reduced Board Space
Improved Reliability
Precision Test Equipment
Precision Instrumentation
Battery Powered Systems
Sample-and-Hold Circuits
Military Radios
Guidance and Control
Systems
Hard Disk Drives
Description
The DG417/418/419 monolithic CMOS analog switches
were designed to provide high performance switching of
analog signals. Combining low power, low leakages, high
speed, low on-resistance and small physical size, the
DG417 series is ideally suited for portable and battery
powered industrial and military applications requiring high
performance and efficient use of board space.
To achieve high-voltage ratings and superior switching
performance, the DG417 series is built on Siliconix’s high
voltage silicon gate (HVSG) process. Break-before-make is
guaranteed for the DG419, which is an SPDT configuration.
An epitaxial layer prevents latchup.
       
          

The DG417 and DG418 respond to opposite control logic
levels as shown in the Truth Table.
Functional Block Diagram and Pin Configuration
Truth Table
Logic DG417 DG418
0 ON OFF
1 OFF ON
Logic “0” = 0.8 V, Logic “1” = 2.4 V
Truth Table—DG419
Logic SW1SW2
0 ON OFF
1 OFF ON
Logic “0” = 0.8 V, Logic “1” = 2.4 V
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70051.
DG417/418/419
2 Siliconix
S-52880—Rev. D, 28-Apr-97
Ordering Information
Temp Range Package Part Number
DG417/418
8
-
Pin Plastic MiniDIP
DG417DJ
40 to 85
_
C
8
-
Pi
n
Pl
as
ti
c
Mi
n
iDIP
DG418DJ
40
t
o
85_C
8
-
Pin Narrow SOIC
DG417DY
8
-
Pi
n
N
arrow
SOIC
DG418DY
55 to 125
_
C
8
-
Pin CerDIP
DG417AK, DG417AK/883
55
t
o
125_C
8
-
Pi
n
C
er
DIP
DG418AK, DG418AK/883
DG419
40 to 85
_
C
8-Pin Plastic MiniDIP DG419DJ
40
t
o
85_C
8-Pin Narrow SOIC DG419DY
–55 to 125_C8-Pin CerDIP DG419AK, DG419AK/883
Absolute Maximum Ratings
Voltages Referenced to V–
V+ 44 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GND 25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VL(GND –0.3 V) to (V+) + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Inputsa VS, VD (V–) –2 V to (V+) + 2 V. . . . . . . . . . . . . . . . . .
or 30 mA, whichever occurs first
Current, (Any Terminal) Continuous 30 mA. . . . . . . . . . . . . . . . . . . . . .
Current (S or D) Pulsed 1 ms, 10% duty cycle 100 mA. . . . . . . . . . . . .
Storage Temperature (AK Suffix) –65 to 150_C. . . . . . . . . . . . . .
(DJ, DY Suffix) –65 to 125_C. . . . . . . . . . .
Power Dissipation (Package)b
8-Pin Plastic MiniDIPc400 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8-Pin Narrow SOICd400 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8-Pin CerDIPe600 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V– will be clamped by
internal diodes. Limit forward diode current to maximum current
ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mW/_C above 75_C
d. Derate 6.5 mW/_C above 25_C
e. Derate 12 mW/_C above 75_C
Schematic Diagram (Typical Channel)
Figure 1.
Level
Shift/
Drive






DG417/418/419
Siliconix
S-52880—Rev. D, 28-Apr-97 3
Specificationsa
Test Conditions
Unless Otherwise Specified A Suffix
–55 to 125_CD Suffix
–40 to 85_C
Parameter Symbol V+ = 15 V, V– = –15 V
VL = 5 V, VIN = 2.4 V, 0.8 VfTempbTypcMindMaxdMindMaxdUnit
Analog Switch
Analog Signal RangeeVANALOG Full –15 15 –15 15 V
Drain-Source
On-Resistance rDS(on) IS = –10 mA, VD = 12.5 V
V+ = 13.5 V, V– = –13.5 V Room
Full 20 35
45 35
45 W
IS(off)
V+ 16 5 V V 16 5 V
Room
Full –0.1 –0.25
–20 0.25
20 –0.25
–5 0.25
5
Switch Off
Leakage Current
ID(off)
V+ = 16.5 V, V– = –16.5 V
VD = 15.5 V
VS = 15.5 V
DG417
DG418 Room
Full –0.1 –0.25
–20 0.25
20 –0.25
–5 0.25
5
I
D(off)
VS
15
.
5
V
DG419 Room
Full –0.1 –0.75
–60 0.75
60 –0.75
–12 0.75
12 nA
Channel On
Lk C
ID(on)
V+ = 16.5 V, V– = –16.5 V
VV 155V
DG417
DG418 Room
Full –0.4 –0.4
–40 0.4
40 –0.4
–10 0.4
10
Leakage Current
I
D(on)
,
VS = VD = 15.5 V DG419 Room
Full –0.4 –0.75
–60 0.75
60 –0.75
–12 0.75
12
Digital Control
Input Current
VIN Low IIL Full 0.005 –0.5 0.5 –0.5 0.5
mA
Input Current
VIN High IIH Full 0.005 –0.5 0.5 –0.5 0.5
m
A
Dynamic Characteristics
Turn-On Time tON RL = 300 W , CL = 35 pF
VS = 10 V
DG417
DG418 Room
Full 100 175
250 175
250
Turn-Off Time tOFF
S
See Switching Time
Test Circuit DG417
DG418 Room
Full 60 145
210 145
210
Transition Time tTRANS
RL = 300 W , CL = 35 pF
VS1 = 10 V
VS2 = 10 V DG419 Room
Full 175
250 175
250
ns
Break-Before-Make
Time Delay tDRL = 300 W , CL = 35 pF
VS1 = VS2 = 10 V DG419 Room 13 5 5
Charge Injection Q CL = 10 nF, Vgen = 0 V, Rgen = 0 WRoom 60 pC
Source Off
Capacitance CS(off)
f = 1 MHz VS=0V
Room 8
Drain Off Capacitance CD(off)
f
=
1
MH
z,
V
S =
0
V
DG417
DG418 Room 8 pF
Channel On
Capacitance
CD(on) f = 1 MHz, VS = 0 V
DG417
DG418 Room 30
p
Capacitance
,S
DG419 Room 35
Power Supplies
Positive Supply
Current I+ Room
Full 0.001 1
51
5
Negative Supply
Current I–
V+
=
16.5 V, V
=
16.5 V
Room
Full –0.001 –1
–5 –1
–5
A
Logic Supply Current IL
V+
=
16
.
5
V
,
V
– = –
16
.
5
V
VIN = 0 or 5 V Room
Full 0.001 1
51
5
mA
Ground Current IGND Room
Full
–0.000
1–1
–5 –1
–5
DG417/418/419
4 Siliconix
S-52880—Rev. D, 28-Apr-97
Specificationsa for Unipolar Supplies
Test Conditions
Unless Otherwise Specified
V+ 12 V V 0 V
A Suffix
–55 to 125_CD Suffix
–40 to 85_C
Parameter Symbol V+ = 12 V, V– = 0 V
VL = 5 V, VIN = 2.4 V, 0.8 VfTempbTypcMindMaxdMindMaxdUnit
Analog Switch
Analog Signal RangeeVANALOG Full 0 12 0 12 V
Drain-Source
On-Resistance rDS(on) IS = –10 mA, VD = 3.8 V
V+ = 10.8 V Room 40 W
Dynamic Characteristics
Turn-On Time tON RL = 300 W , CL = 35 pF, VS = 8 V
S Sihi Ti T Ci i
Room 110
Turn-Off Time tOFF
L,Lp, S
See Switching Time Test Circuit Room 40 ns
Break-Before-Make
Time Delay tDRL = 300 W , CL = 35 pF DG419 Room 60
ns
Charge Injection Q CL = 10 nF, Vgen = 0 V, Rgen = 0 WRoom 5 pC
Power Supplies
Positive Supply
Current I+ Room 0.001
Negative Supply
Current I– V+ = 13.2 V, VL = 5.25 V
VIN = 0 or 5 V Room –0.001 mA
Logic Supply Current IL
IN
Room 0.001
Ground Current IGND Room –0.001
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
DG417/418/419
Siliconix
S-52880—Rev. D, 28-Apr-97 5
Typical Characteristics
rDS(on)
rDS(on) vs. VD and Supply Voltage
50
40
30
0
–20 –15 20
20
10
–10 –5 5 15100
ID = –10 mA
10 V
15 V
20 V
12 V
8 V
5 V
rDS(on) ()
r
DS(on) vs. Temperature
40
30
0–15 –10 15
20
–5 0 5 10
10
25_C
–55_C
TA = 125_C
Leakage Currents vs. Analog Voltage
I (pA)
30
20
–30 –15 –10 15
10
0
–5 0 5 10
–10
–20
V+ = 15 V
V– = –15 V
VL = 5 V
DG417/418: ID(off), IS(off)
DG419: IS(off)
DG417/418: ID(on)
DG419: ID(off), ID(on)
Drain Charge Injection
Q (pC)
200
150
100
–50 –15 –10 15
50
0
–5 0 5 10
100 pF
500 pF
1 nF
V+ = 16.5 V
V– = –16.5 V
VL = 5 V
VIN = 0 V
CL = 10 nF
(V)
IN
V
Input Switching Threshold vs. Supply Voltages
3.5
3.0
2.5
0510 40
2.0
1.5
1.0
0.5
15 20 25 30 35(V+) –5 –10 0–15 –10 –5 0 0(V–)
VL = 5 V
VL = 7 V
Operating Voltage Range
Negative Supply V– (V)
V+ (V)
50
40
30
00
20
10
–10 –20 –30 –40
2
42
5 V CMOS
Compatible
TTL Compatible
VIN = 0.8 V, 2.4 V
F = Voltages Used for Production Testing
F
F
CMOS Compatible
VD – Drain Voltage (V)
VD or VS – Drain or Source Voltage (V)
VD – Drain Voltage (V)
VS – Source Voltage (V)

DG417/418/419
6 Siliconix
S-52880—Rev. D, 28-Apr-97
Typical Characteristics (Cont’d)
Switching Time vs. Temperature
Temperature (_C)
tON (ns), tOFF
120
100
80
20
0
–55 –40 –20 0 20 40 60 80 100 120
40
60
V+ = 15 V, V– = –15 V
VL = 5 V, VIN = 3 V Pulse
tOFF
tON
±10 ±11 ±12 ±13 ±14 ±15 ±16
80
70
60
50
40
V– = 0 V
VL = 5 V
VIN = 3 V
tOFF
tON
Switching Time vs. Supply Voltages
Supply Voltage (V)
tON (ns), tOFF
tON (ns), tOFF
130
120
100
50
30 10 11 12 13 14 15 16
110
90
40
60
80
70
V– = 0 V
VL = 5 V
VIN = 3 V
tOFF
tON
Switching Time vs. V+
V+ Supply Voltage (V)
Power Supply Currents vs. Switching Frequency
f – Frequency (Hz)
100 10 k 1 M 10 M
V+ = 15 V, V– = –15 V
VL = 5 V, VIN = 5 V, 50% D Cycle
I+, I–
IL
10 mA
1 mA
100 mA
10 mA
1 mA
100 nA
ISUPPLY
1 k 100 k
Crosstalk and Off Isolation vs. Frequency
f – Frequency (Hz)
(dB)
100
140
120
100
0
80
60
40
20
DG417/418/419
Source 2
DG419
Source 1
10 k 1 M 100 M
V+ = 15 V
V– = –15 V
VL = 5 V
1 k 100 k 10 M
ISUPPLY
Supply Current vs. Temperature
Temperature (_C)
–55 –40 120
100 nA
10 nA
1 nA
0.1 pA
100 pA
10 pA
1 pA
–20 0 20 40 60 80 100
I+, I–
1 mAV+ = 16.5 V, V– = –16.5 V
VL = 5 V, VIN = 0 V
IGND
DG417/418/419
Siliconix
S-52880—Rev. D, 28-Apr-97 7
Test Circuits
Figure 2. Switching Time (DG417/418)
Figure 3. Break-Before-Make (DG419)
CL (includes fixture and stray capacitance)
RL
RL + rDS(on)
VO = VS
V–
IN
SD
CL
35 pF
–15 V
VL
GND
VO
10 V
V+
RL
300
+15 V+5 V
VO is the steady state output with the switch on.
0 V
Logic
Input
Switch
Input
Switch
Output
3 V
50%
0 V
VO
VS
tr <20 ns
tf <20 ns
tOFF
tON
90%
Note: Logic input waveform is inverted for switches that have
the opposite logic sense.
IN
VL
VS1 D
V–
VS2 S2
V+
S1
–15 V
GND
+15 V+5 V
CL
35 pF
VO
RL
300
CL (includes fixture and stray capacitance)
0 V
3 V
0 V
Logic
Input
Switch
Output
VO
VS1 = VS2
tr <20 ns
tf <20 ns
90%
tDtD
Figure 4. Transition Time (DG419)
CL (includes fixture and stray capacitance)
VL
RL
RL + rDS(on)
VO = VS
V–
V+
IN
CL
35 pF
RL
300
DVO
S2
S1
VS2
VS1
–15 V
GND
+15 V+5 V
0 V
3 V
50%
Logic
Input
Switch
Output
VS1
tr <20 ns
tf <20 ns
10%
tTRANS
90%
V01
VS2 V02
tTRANS
DG417/418/419
8 Siliconix
S-52880—Rev. D, 28-Apr-97
Test Circuits (Cont’d)
Figure 5. Charge Injection
Figure 6. Crosstalk (DG419)
CL
10 nF
D
RgVO
V+
S
V–
3 V IN
VL
Vg
–15 V
GND
+15 V+5 V
OFFONOFF
VO
DVO
INX
Q = DVO x CL
Rg = 50 W
IN
0.8 V
VLV+
V–
XTALK Isolation = 20 log VS
VO
GND
S2
VS
VO
S1
RL
D
C = RF bypass
50 W
+15 V
–15 V
C
C+5 V C
V+
SVL
Rg = 50 W
D
–15 V
VS
GND V– C
RL
IN
VO
0V, 2.4 V
Off Isolation = 20 log VS
VO
+5 V
C
+15 V
C
Figure 7. Off Isolation
Figure 8. Insertion Loss
S
VSVO
0V, 2.4 V IN RL
VLD
Rg = 50 W
+5 V
–15 V
GND V– C
C+15 V
V+
C
DG417/418/419
Siliconix
S-52880—Rev. D, 28-Apr-97 9
Test Circuits (Cont’d)
Figure 9. Source/Drain Capacitances
VL
IN
S
V+
D
f = 1 MHz
–15 V
GND V– C
V, 2.4 V Meter
HP4192A
Impedance
Analyzer
or Equivalent
+5 V
C
+15 V
C
D2D1
S1
f = 1 MHz
+15 V
IN
S2
NC
–15 V
GND
V+
V– C
C
0 V, 2.4 V Meter
HP4192A
Impedance
Analyzer
or Equivalent
DG417/418 DG419
VL
IN
S
V+
D
f = 1 MHz
–15 V
GND V– C
V, 2.4 V
+5 V
C
+15 V
C
D2D1
S1
f = 1 MHz
+15 V
IN
S2
NC
–15 V
GND
V+
V– C
C
0 V, 2.4 V Meter
HP4192A
Impedance
Analyzer
or Equivalent
Applications
Switched Signal Powers Analog Switch
The analog switch in Figure 10 derives power from its input
signal, provided the input signal amplitude exceeds 4 V and
its frequency exceeds 1 kHz.
This circuit is useful when signals have to be routed to either
of two remote loads. Only three conductors are required:
one for the signal to be switched, one for the control signal
and a common return.
A positive input pulse turns on the clamping diode D1 and
charges C1. The charge stored on C1 is used to power the
chip; operation is satisfactory because the switch requires
less than 1 mA of stand-by supply current. Loading of the
signal source is imperceptible. The DG419’s on-resistance
is a low 100 W for a 5-V input signal.
Input
Control
GNDDG419V–
C1
0.01 mF
D1
S1
S2
VOUT
RL1
10 kW
RL2
10 kW
VL
D
IN
V+
Figure 10. Switched Signal Powers Remote
SPDT Analog Switch
DG417/418/419
10 Siliconix
S-52880—Rev. D, 28-Apr-97
Applications (Cont’d)
Micropower UPS Transfer Switch
When VCC drops to 3.3 V, the DG417 changes states,
closing SW1 and connecting the backup cell, as shown in
Figure 11. D1 prevents current from leaking back towards
the rest of the circuit. Current consumption by the CMOS
analog switch is around 100 pA; this ensures that most of the
power available is applied to the memory, where it is really
needed. In the stand-by mode, hundreds of mA are sufficient
to retain memory data.
When the 5-V supply comes back up, the resistor divider
senses the presence of at least 3.5 V, and causes a new
change of state in the analog switch, restoring normal
operation.
Programmable Gain Amplifier
The DG419, as shown in Figure 12, allows accurate gain
selection in a small package. Switching into virtual ground
reduces distortion caused by rDS(on) variation as a function
of analog signal amplitude.
GaAs FET Driver
The DG419, as shown in Figure 13 may be used as a GaAs
FET driver . It translates a TTL control signal into –8-V, 0-V
level outputs to drive the gate.
GND
IN
D
V–
3 V Li Cell
Memory DG417
(5 V)
V+
S
+
SW1VL
VSENSE
R1
453 kW
D1
VCC
Figure 11. Micropower UPS Circuit
R2
383 kW
DG419
+
IN
R1
R2
VIN VOUT
Figure 12. Programmable Gain Amplifier
D
S1
S2
DG419
5 V
VOUT
D
V–GND
S2
S1
VLV+
+5 V
–8 V
GaAs FET
Figure 13. GaAs FET Driver