Agilent AEAS-7000 Plug and Play Ultra-Precision Absolute Encoder 16-bit Gray Code Data Sheet Description The encoder IC consists of 13 signal photo diode channels and 1 monitor photo diode channel and is used for the optical reading of rotary or linear code carriers (i.e., discs or scales). The photodiodes are accompanied with precision amplifiers plus additional circuitry. The monitor channel is used to drive a constant current source for the highly collimated IR illumination system. Functional Description Background The 13 signal channels are set up as: 1. Two precision defining signals (A0, A09), which are two 90 electrical shifted sine, cosine signals. These signals are conditioned to be compensated for offset and gain errors. After conditioning they are on chip interpolated (4 bit) and computed to an absolute 6 bit Gray code. Additionally, these Sin/Cos signals can be tapped as two true-differential analog outputs to be used at the system designer's choice. 2. 11 analog (A1-A11) channels which are directly digitized by precison comparators with hysterisis tracking. The digitized signals are called D1-D11. 3. An internal correction and synchronization module allows the composition of a true 16 bit gray code by merging the data bits of 1) and 2) by still keeping the code monotony. 4. There is a Gray code correction feature for this encoder to counter any codewheel imperfection or misalignment. This Gray code correction can be disabled/enabled by the pin KORR. 5. The gain and offset conditioning value of the sine and cosine wave has been onchip preset by factory. This will get rid of mechanical sensor misalignment error. Features * Minumum mechanical alignment during installation * 2 Sine/Cosine true differential outputs with 1024 periods for unit alignment * Integrated highly collimated illumination system * 11 digital tracks plus 2 sin/cos tracks generate precise 16 bit Gray code, for up to 1000 RPM * Ultra fast, 1 s cycle for serial data output word equals 16 MHz * On-chip interpolation and code correction for 1 LSB compensate for mounting tolerance * The 12 bits MSB is accurate up to 12000 RPM, 16 bit up to 1000 RPM * MSB can be inverted for changing the counting direction * Monitor track for tracking the light level of the LED and to drive an external current source * Watch dog with alarm output * Hi temp plastic code disc available * -40C to +100C operating temp. Applications * Rotary application up to 16 bit/ 360 absolute position * Rotary application up to 11 bit user defined code patterns * Cost effective solution for direct integration into OEM systems Signal-Channels A1-A11 The photo current of the photo diodes is fed into a transimpedance amplifier. The analog output of the amplifier has a voltage swing of (dark/light) about 1.3 V. Every output is transformed by precision comparators into digital signals (D1-D11). The threshold is at VDD/2 (=Analog-reference), regulated by the monitor channel. Monitor Channel with LED Control at Pins LEDR and LERR The analog output signal of the monitor channel is regulated by the LED current. An internal bipolar transistor sets this level to VDD/2 (control voltage at pin LEDR). Thus the signal swing of each output is symmetrical to VDD/2 (=Analog-reference) The error bit at pin LERR is triggered if the Ve of the internal bipolar transistor is larger than VDD/2. Signals Channels A0, A09 with Signal Conditioning and Self Calibration These two channels give out a sine and cosine wave which are 90 deg phase shifted. These signals have amplitudes which are almost constant due to the LED current monitoring. Due to amplifier mismatch and mechanical misalignment the signals do have gain and offset errors. These errors are eliminated by an adaptive signal conditioning circuitry. The conditioning values are on-chip preprogrammed by factory. The analog output signals of A0 and A09 are supplied as truedifferential voltage with a peak to peak value of 2.0 V at the pins A09P_APR, A09N_AREF, A0p_A0, A0N_MON. 2 Interpolator for Channels A0,A09 The interpolator generates the digital signals D0,D09 and D-1 to D-4. The interpolated signals D-1 to D-4 extend the 12 bit Gray code of the signals D11....D0 to form a 16 bit Gray code. D0 and D09 are digitized from A0 and A09. The channels A0-A11 and A09 have very high dynamic bandwidth, which allows a real time monotone 12 bit Gray code at 12000 RPM. The interpolated 16 bit Gray code can be used up to 1000 RPM only. At more than 1000 RPM, only the 12 bit Gray code from the MSB side can be used. LSB Gray Code Correction (Pin KORR) This function block synchronizes the switching ponts for the 11 bit gray code of the digital signals D1 to D11 with D0 and D09 (digitized signal of A0 and A09). The accuracy of the complete 12 bit gray is defined by the precision of the signals D0/D09. As these two signals are generated by the gain and offset conditioned analog signals A0 and A09, the are very precise. This Gray code correction only works for the 12 bit MSB(4096 steps per revolution). It does not work for the 4 excess interpolated bits of the 16 bit Gray code. When some special applications require code patterns other than Gray code, the Gray code correction can be disabled by putting pin KORR = 0. When that happens just the 11 data bits (D1...D11) will be sent 1:1 to the DOUT serial output. Gray code correction can be switched on or off by putting the pin KORR =1 (on) or =0 (off). MSBINV and DOUT Pins The serial interface consists of a shift register. The most significant bit, MSB (D11) will always be sent first to DOUT. The MSB can be inverted (change code direction) by using pin MSBINV. DIN and NSL Pins The Serial input DIN allows the configuration as ring register for multiple transmissions or for cascading 2 or more encoders. DIN is the input of the shift register that shifts the data to DOUT. The NSL pin controls the shift register, to switch it between load (1) or shift (0) mode. Under load mode, DOUT will give the logic of the MSB, i.e., D11. Under shift mode (0), coupled with the SCL, the register will be clocked, and gives out the serial word output bit by bit. As the clock frequency can be up to 16 MHz, the transmission of the full 16 bit word can be done within 1s. Valid data of DOUT should be read when the SCL clock is low. Please refer to timing diagram on page 5, Figure 2. Pinout Description No. Pin Name Description Function Notes [1] 1 PROBE_ON Digital-Input For programming purpose only. Set to 0 CMOS, internal pu 2 KORR Digital-input 1 = Gray Code Correction Active CMOS, internal pu 3 N.C. 4 PCL Digital Input Positive Edge Probe Counter Clock, used by factory for Programming. NC. CMOS, internal pu 5 DIN Digital Input Shift Register input. Used for cascading two or more encoders. CMOS, internal pd 6 MSBINV Digital-Input 1 = MSB inverted CMOS, internal pd 7 SCL Digital-Input Positive Edge Shift-register Shift Clock CMOS, internal pu 8 NSL Digital-Input Shift-register Shift (=0) / Load (=1) Control CMOS, internal pu 9 DO Digital Output DO signal CMOS, 2 mA 10 DOUT Digital Output Shift-Register Data Out (MSB first) CMOS, 2 mA 11 VDD Supply Voltage +5 V Supply Digital 12 DPROBE Digital Output DO9 signal CMOS, 2 mA 13 A09P_APR Analog output A09 positive (+True diff.) CMOS, analog out 14 GND Gnd for supply voltage GND for 5 V supply analog/digital 15 A0P_A0 Analog Output A0 positive (+True diff.) CMOS, analog out 16 A09N_AREF Analog output A09 negative (-True diff.) CMOS, analog out 17 VA Supply Voltage +5 V Supply Analog 18 A0N_MON Analog Output A0 negative (-True diff.) CMOS, analog out 19 LERR Digital Output IR-LED Current Limit Signal CMOS, 2 mA 20 LEDR Analog Output IR-LED-Control via current Source CMOS, analog out Note: 1. Internal pu/pd = internal pull-up (typ. 50 A)/ pull-down (typ. 10 A) CMOS-transistor-Rs. Pinout Configuration 19 17 15 13 11 9 7 5 3 1 20 18 16 14 12 10 8 6 4 2 3 MIN. 22 TANTAL VDD A09P_APR A09N_AREF A0P_A0 A0N_MON VDDA VDD (Cs OPTIONAL) VCC (+5 V) VCC GND GND D09 DPROBE D0 D0 DOUT 10R MIN. 100 TANTAL 0R to 2R VDD GND DOUT SCL SCL NSL NSL DIN DIN MSBINV MSBINV LEDR PCL LERR PROBE_ON APPLICATIION-LOGIC ANALOG-OUTPUTS Using the AEAS-7000 Please use the block diagram as pictured below (Figure 1): PCL CONFIGURATION AND PROBE CONTROL PROBE_ON KORR KORR LERR Figure 1. Schematic using AEAS-7000. Note: The RC-filter combination, especially on VDDA, is used to filter spikes and transients and is strongly recommended. It is advised that the tantalum caps be put as close to the VDD and VDDA (or VA) pins as possible. PROBE_ON is used by factory for programming the encoder. It is recommended to ground the PROBE_ON pin during normal operation to prevent unwanted writing of parameters to the unit. PCL is used by factory for programming, leave unconnected. A09N_AREF and A0N_MON are the negative cosine and sine waves, the negative versions of A09P and A0P. The four pins can be used for line driver application. D0 is used to check the D0 signal. As mentioned earlier, D0 is the digitized signal of A0. Need not be used. DPROBE is used to check D09, the digitized signal of A09, and other digital signals. Need not be used. KORR is for Gray Code correction for 12 bits resolution only. 4 MSBINV is for user to change between counting up and counting down for a given rotating direction. MSB(D11) will always be sent out to DOUT first. LEDR is unconnected. LERR will be high when the light output of the emitter is low. This is an indicator when light intensity is at a critical stage affecting the performance of the encoder. It is either by contamination or LED degradation. 1) After powering up the unit using VCC =+5 V and connecting GND to ground, trigger input pins NSL and SCL using the timing diagram below (Figure 2). NSL is a control pin for the internal shift register. When triggered to low and combined with clock pulses, the serial Gray code will be shifted out to DOUT bit by bit per every clock pulse 2) The 16 bit serial gray code can then be tapped out from the pin DOUT, most significant bit (D11) first. The rate of the 16 bit Gray code serial transfer rate is dependent on the SCL clock frequency. The faster the clock, the faster the transfer rate. The maximum clock rate the AEAS-7000 can take is 16 MHz, which means the entire 16 bit Gray code can be serially transferred out in 1 s. However, due to the constraint of other interfacing IC, the user may not be able to use up to the max clock rate frequency. 3) Whenever NSL is high, the DOUT will have the logic of the MSB D11. After NSL goes low, the number of bits being transferred out will depend on the number of clock pulses given to SCL. The default is 16 clock pulses for the 16 bit Gray code. If for other application where another number other than 16 is needed, just supply the corresponding number of clock pulses to the SCL, e.g., 12 bit, 13 bit, 14 bit or 15 bit, and you will get the corresponding length of Gray code words with the corresponding resolution. LAPSE TIME BETWEEN WORDS, SET BY NSL 1 FRAME = 16 BITS NSL 1 2 14 15 16 SCL DOUT(SERIAL) D11 D10 D-3 D-4 D11 NOTE: VALID DATA IS WHEN SCL CLOCK IS LOW. Figure. 2 Timing diagram. Absolute Limits No. Parameters Symbol Min. 1 Supply Voltage VD 2 Voltages at all Input and Output Pins 3 4 Typ. Max. Units -0.3 6.0 V Vin , Vout -0.3 VD + 0.3 V Operating Temperature TA -40 +100 C Storage Temperature TS -40 150 C Operating Conditions No. Parameters Symbol Min. Typ. Max Units 1 Supply Voltage VD 4.5 5 5.5 V 2 Operating Temperature TA -40 25 +100 C 3 Input-H-Level Vih 0.7*VD VD V 4 Input-L-Level Vil 0 0.3*VD V 5 Electrical Characteristics (VD = 4.5 to 5 V, TA = -40 to +100 C) No. Parameters Symbol Conditions Min. Typ. Max. Units Operating Currents 1 Total Current I total TBD mA Digital Inputs 1 Pull Down Current Ipd -20 -5 A 2 Pull Up Current Ipu 30 160 A Digital Outputs 1 Ouput-H-Level Voh Ioh = 2 mA VD - 0.5 V VD V 2 Output-L-Level Vol Iol = -2 mA 0 0.5 V 16 MHz 0.4 0.6 ns 0 250 KHz Serial Interface 1 SCL Clock Frequency fclock 2 Duty Cycle Fclock T clock,LH Fclock = 16 MHz Analog-Signal-Conditioning - Signaltracks A0P, A0N,A09P,A09N 1. Signal Frequency A0, A09 Fsine,cos Mounting Consideration 2x10 - 1.27 mm PITCH PIN HEADER 17.2 0.35 (Z GAP) 21.4 1.5 3.1 24 55 22.1 42.2 16.7 8 H7 RADIAL TANGENTIAL Note: For mounting the code disk on the unit, please use the plug and play jig supplied by Agilent. Codewheel mounting tolerances for radial, tangential and Z gap are: Radial: 80 um Tangential: 50 um Z Gap: 80 um www.agilent.com/semiconductors For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (916) 788-6763 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6756 2394 India, Australia, New Zealand: (+65) 6755 1939 Japan: (+81 3) 3335-8152 (Domestic/International), or 0120-61-1280 (Domestic Only) Korea: (+65) 6755 1989 Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: (+65) 6755 2044 Taiwan: (+65) 6755 1843 Data subject to change. Copyright (c) 2003 Agilent Technologies, Inc. June 4, 2003 5988-9627EN