LM4864
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LM4864 725mW Audio Power Amplifier with Shutdown
Mode
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1FEATURES DESCRIPTION
The LM4864 is a bridged audio power amplifier
23• VSSOP, SOIC, PDIP(1), and WSON Packaging capable of delivering 725mW of continuous average
• No Output Coupling Capacitors, Bootstrap power into an 8Ωload with 1% THD+N from a 5V
Capacitors, or Snubber Circuits are Necessary power supply.
• Thermal Shutdown Protection Circuitry Boomer®audio power amplifiers were designed
• Unity-Gain Stable specifically to provide high quality output power from
a low supply voltage while requiring a minimal
• External Gain Configuration Capability amount of external components. Since the LM4864
does not require output coupling capacitors, bootstrap
APPLICATIONS capacitors or snubber networks, it is optimally suited
• Cellular phones for low-power portable applications.
• Personal computers The LM4864 features an externally controlled, low
• General purpose audio power consumption shutdown mode, and thermal
shutdown protection.
KEY SPECIFICATIONS The closed loop response of the unity-gain stable
• POat 1% THD+N with VDD = 5V, 1kHz LM4864 can be configured by external gain-setting
resistors. The device is available in multiple package
– LM4864LD, 4Ωload 625 mW (typ) types to suit various applications.
– LM4864LD, 8Ωload 725 mW (typ)
– LM4864M & LM4864N(1), 8Ωload 675 mW
(typ)
– LM4864MM, 8Ωload (2) 300 mW (typ)
– LM4864, 16Ωload 550 mW (typ)
– Shutdown current 0.7 µA (typ)
(1) Not recommended for new designs. Contact TI Audio
Marketing.
(2) The DGK0008BA package is thermally limited to 595 mW of
power dissipation at room temperature. Referring to Figure 21
in Typical Performance Characteristics, the power dissipation
limitation for the package occurs at 300 mW of output power.
This package limitation is based on 25°C ambient
temperature and θJA = 210°C. For higher output power
possibilities refer to POWER DISSIPATION.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Boomer is a registered trademark of Texas Instruments.
3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1999–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM4864
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Typical Application
Figure 1. Typical Audio Amplifier Application Circuit
Connection Diagram
Figure 2. VSSOP, SOIC, and PDIP Package- Top View
See Package Number DGK0008A, D0008A or P0008E(3)
Figure 3. WSON Package- Top View
See Package Number NGY0010A
(3) Not recommended for new designs. Contact TI Audio Marketing.
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Figure 4. DIE LAYOUT (B-STEP)
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)(2)
Supply Voltage 6.0V
Storage Temperature −65°C to +150°C
Input Voltage −0.3V to VDD + 0.3V
Power Dissipation (3) Internally limited
ESD Susceptibility (4) 2000V
ESD Susceptibility (5) 200V
Junction Temperature 150°C
Vapor Phase (60 sec.) 215°C
Soldering Small Outline Package
Information Infrared (15 sec.) 220°C
θJC (VSSOP) 56° C/W
θJA (VSSOP) 210°C/W
θJC (SOIC) 35°C/W
θJA (SOIC) 170°C/W
Thermal Resistance
θJC (PDIP)*37°C/W
θJA (PDIP)*107°C/W
θJA (WSON) (6) 63°C/W
θJC (WSON) (6) 12°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX,θJA, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX −TA)/θJA or the number given in the Absolute Maximum Ratings,
whichever is lower. For the LM4864, TJMAX = 150°C. The typical junction-to-ambient thermal resistance, when board mounted, is
230°C/W for package number DGK0008A, 170°C/W for package number D0008A and is 107°C/W for package number P0008E*.
(4) Human body model, 100pF discharged through a 1.5kΩresistor.
(5) Machine Model, 220pF – 240pF discharged through all pins.
(6) The NGY0010A package has its exposed-DAP soldered to an exposed 1.2in2area of 1oz printed circuit board copper.
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Operating Ratings
Temperature Range TMIN ≤TA≤TMAX −40°C ≤TA≤+85°C
Supply Voltage 2.7V ≤VDD ≤5.5V
Electrical Characteristics VDD = 5V (1) (2)
The following specifications apply for VDD = 5V, for all available packages, unless otherwise specified. Limits apply for TA=
25°C LM4864 Units
Symbol Parameter Conditions (Limits)
Typical (3) Limit (4)(5)
IDD Quiescent Power Supply Current VIN = 0V, IO= 0A (6) 3.6 6.0 mA (max)
ISD Shutdown Current VPIN1 = VDD 0.7 5 μA (max)
VOS Output Offset Voltage VIN = 0V 5 50 mV (max)
POOutput Power THD = 1% (max); f = 1 kHz; RL= 4Ω; 625 mW (min)
LM4864LD (7)
THD = 1% (max); f = 1 kHz; RL= 8Ω; 725 mW (min)
LM4864LD (7)
THD = 1% (max); f = 1 kHz; RL= 8Ω; 300 mW (min)
LM4864MM (8)
THD = 1% (max); f = 1 kHz; RL= 8Ω; 675 300 mW (min)
LM4864M and LM4864N*
THD+N = 1%; f = 1 kHz; RL= 16Ω; 550 mW
THD+N Total Harmonic Distortion+Noise PO= 300 mWrms; AVD = 2; RL= 8Ω;0.7 %
20 Hz ≤f≤20 kHz, BW < 80kHz
PSRR Power Supply Rejection Ratio VDD = 4.9V–5.1V 50 dB
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to TI's AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(6) The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier.
(7) The NGY0010A package has its exposed-DAP soldered to an exposed 1.2in2area of 1oz printed circuit board copper.
(8) The DGK0008BA package is thermally limited to 595 mW of power dissipation at room temperature. Referring to Figure 21 in Typical
Performance Characteristics, the power dissipation limitation for the package occurs at 300 mW of output power. This package limitation
is based on 25°C ambient temperature and θJA = 210°C. For higher output power possibilities refer to POWER DISSIPATION.
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Electrical Characteristics VDD = 3V (1) (2)
The following specifications apply for VDD = 3V, for all available packages, unless otherwise specified. Limits apply for TA=
25°C LM4864 Units
Symbol Parameter Conditions (Limits)
Typical (3) Limit (4)(5)
IDD Quiescent Power Supply Current VIN = 0V, IO= 0A (6) 1.0 3.0 mA (max)
ISD Shutdown Current VPIN1 = VDD 0.3 2.0 μA (max)
VOS Output Offset Voltage VIN = 0V 5 mV
POOutput Power THD = 1% (max); f = 1 kHz; RL= 8Ω200 mW
THD = 1% (max); f = 1 kHz; RL= 16Ω175 mW
THD+N Total Harmonic Distortion+Noise PO= 100 mWrms; AVD = 2; RL= 8Ω;1.5 %
20 Hz ≤f≤20 kHz, BW < 80 kHz
PSRR Power Supply Rejection Ratio VDD = 2.9V–3.1V 50 dB
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Limits are specified to TI's AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(6) The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier.
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External Components Description
(See Figure 1)
Components Functional Description
1. RiInverting input resistance which sets the closed-loop gain in conjunction with RF. This resistor also forms a high pass filter
with Ciat fc= 1/(2πRiCI).
2. CiInput coupling capacitor which blocks the DC voltage at the amplifier's input terminals. Also creates a highpass filter with Ri
at fc= 1/(2πRiCi). Refer to PROPER SELECTION OF EXTERNAL COMPONENTS for an explanation of how to determine
the value of Ci.
3. RFFeedback resistance which sets the closed-loop gain in conjunction with Ri.
4. CSSupply bypass capacitor which provides power supply filtering. Refer to POWER SUPPLY BYPASSING section for
information concerning proper placement and selection of the supply bypass capacitor.
5. CBBypass pin capacitor which provides half-supply filtering. Refer to PROPER SELECTION OF EXTERNAL COMPONENTS
for information concerning proper placement and selection of CB.
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Typical Performance Characteristics
THD+N THD+N
vs vs
Frequency Frequency
Figure 5. Figure 6.
THD+N THD+N
vs vs
Frequency Frequency
Figure 7. Figure 8.
THD+N THD+N
vs vs
Frequency Frequency
Figure 9. Figure 10.
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Typical Performance Characteristics (continued)
THD+N THD+N
vs vs
Output Power Output Power
Figure 11. Figure 12.
THD+N THD+N
vs vs
Output Power Output Power
Figure 13. Figure 14.
THD+N THD+N
vs vs
Output Power Output Power
Figure 15. Figure 16.
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Typical Performance Characteristics (continued)
Output Power vs Output Power vs
Supply Voltage Supply Voltage
Figure 17. Figure 18.
Output Power vs Output Power vs
Supply Voltage Load Resistance
Figure 19. Figure 20.
Power Dissipation vs
Output Power Power Derating Curve
Figure 21. Figure 22.
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Typical Performance Characteristics (continued)
Dropout Voltage vs
Supply Voltage Noise Floor
Figure 23. Figure 24.
Frequency Response vs Power Supply
Input Capacitor Size Rejection Ratio
Figure 25. Figure 26.
Open Loop Supply Current vs
Frequency Response Supply Voltage
Figure 27. Figure 28.
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Typical Performance Characteristics for the LM4864LD (1)
THD+N THD+N
vs vs
Frequency Frequency
Figure 29. Figure 30.
THD+N THD+N
vs vs
Power Out Power Out
Figure 31. Figure 32.
Output Power Power Dissipation
vs vs
Supply Voltage Output Power
Figure 33. Figure 34.
(1) The NGY0010A package has its exposed-DAP soldered to an exposed 1.2in2area of 1oz printed circuit board copper.
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APPLICATION INFORMATION
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4864 has two operational amplifiers internally, allowing for a few different amplifier
configurations. The first amplifier's gain is externally configurable, while the second amplifier is internally fixed in
a unity-gain, inverting configuration. The closed-loop gain of the first amplifier is set by selecting the ratio of RFto
Riwhile the second amplifier's gain is fixed by the two internal 10kΩresistors. Figure 1 shows that the output of
amplifier one serves as the input to amplifier two which results in both amplifiers producing signals identical in
magnitude, but out of phase 180°. Consequently, the differential gain for the IC is
AVD = 2*(RF/Ri) (1)
By driving the load differentially through outputs Vo1 and Vo2, an amplifier configuration commonly referred to as
“bridged mode” is established. Bridged mode operation is different from the classical single-ended amplifier
configuration where one side of its load is connected to ground.
A bridge amplifier design has a few distinct advantages over the single-ended configuration, as it provides
differential drive to the load, thus doubling output swing for a specified supply voltage. Four times the output
power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable
output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closed-
loop gain without causing excessive clipping, please refer to AUDIO POWER AMPLIFIER DESIGN section.
A bridge configuration, such as the one used in LM4864, also creates a second advantage over single-ended
amplifiers. Since the differential outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across
the load. This eliminates the need for an output coupling capacitor which is required in a single supply, single-
ended amplifier configuration. If an output coupling capacitor is not used in a single-ended configuration, the half-
supply bias across the load would result in both increased internal lC power dissipation as well as permanent
loudspeaker damage.
POWER DISSIPATION
Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or
single-ended. Equation 2 states the maximum power dissipation point for a bridge amplifier operating at a given
supply voltage and driving a specified output load.
PDMAX = (VDD)2/(2π2RL) Single-Ended (1) (2)
However, a direct consequence of the increased power delivered to the load by a bridge amplifier is an increase
in internal power dissipation point for a bridge amplifier operating at the same conditions.
PDMAX = 4(VDD)2/(2π2RL) Bridge Mode (2) (3)
Since the LM4864 has two operational amplifiers in one package, the maximum internal power dissipation is 4
times that of a single-ended amplifier. Even with this substantial increase in power dissipation, the LM4864 does
not require heatsinking. From Equation 2, assuming a 5V power supply and an 8Ωload, the maximum power
dissipation point is 633 mW. The maximum power dissipation point obtained from Equation 3 must not be greater
than the power dissipation that results from Equation 4:
PDMAX = (TJMAX −TA)/θJA (3) (4)
For package DGK0008A, θJA = 210°C/W, for package D00008A, θJA = 170°C/W, for package P0008E, θJA =
107°C/W, and for package NGY0010A, θJA = 63°C/W. TJMAX = 150°C for the LM4864. Depending on the ambient
temperature, TA, of the system surroundings, Equation 4 can be used to find the maximum internal power
dissipation supported by the IC packaging. If the result of Equation 3 is greater than that of Equation 4, then
either the supply voltage must be decreased, the load impedance increased, the ambient temperature reduced,
or the θJA reduced with heatsinking. In many cases larger traces near the output, VDD, and GND pins can be
used to lower the θJA. The larger areas of copper provide a form of heatsinking allowing a higher power
dissipation. For the typical application of a 5V power supply, with an 8Ωload, the maximum ambient temperature
possible without violating the maximum junction temperature is approximately 44°C provided that device
operation is around the maximum power dissipation point and assuming surface mount packaging. Internal
power dissipation is a function of output power. If typical operation is not around the maximum power dissipation
point, the ambient temperature can be increased. Refer to Typical Performance Characteristics for power
dissipation information for lower output powers.
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EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATION
The LM4864's exposed-dap (die attach paddle) package (NGY) provides a low thermal resistance between the
die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the
surrounding PCB copper traces, ground plane, and surrounding air.
The NGY package should have its DAP soldered to a copper pad on the PCB. The DAP's PCB copper pad may
be connected to a large plane of continuous unbroken copper. This plane forms a thermal mass, heat sink, and
radiation area.
Further detailed and specific information concerning PCB layout, fabrication, and mounting an NGY (WSON)
package is available from Texas Instruments's Package Engineering Group under application note AN1187.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. The capacitor location on both the bypass and power supply pins should be as close to the device as
possible. The effect of a larger half supply bypass capacitor is improved PSRR due to increased half-supply
stability. Typical applications employ a 5V regulator with 10 μF and a 0.1 μF bypass capacitors which aid in
supply stability, but do not eliminate the need for bypassing the supply nodes of the LM4864. The selection of
bypass capacitors, especially CB, is thus dependent upon desired PSRR requirements, click and pop
performance as explained in PROPER SELECTION OF EXTERNAL COMPONENTS, system cost, and size
constraints.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the LM4864 contains a shutdown pin to externally turn off
the amplifier's bias circuitry. This shutdown feature turns the amplifier off when a logic high is placed on the
shutdown pin. The trigger point between a logic low and logic high level is typically half supply. It is best to switch
between ground and supply to provide maximum device performance. By switching the shutdown pin to VDD, the
LM4864 supply current draw will be minimized in idle mode. While the device will be disabled with shutdown pin
voltages less than VDD, the idle current may be greater than the typical value of 0.7 μA. In either case, the
shutdown pin should be tied to a definite voltage to avoid unwanted state changes.
In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry which
provides a quick, smooth transition into shutdown. Another solution is to use a single-pole, single-throw switch in
conjunction with an external pull-up resistor. When the switch is closed, the shutdown pin is connected to ground
and enables the amplifier. If the switch is open, then the external pull-up resistor will disable the LM4864. This
scheme ensures that the shutdown pin will not float, thus preventing unwanted state changes.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical to optimize
device and system performance. While the LM4864 is tolerant to a variety of external component combinations,
consideration to component values must be used to maximize overall system quality.
The LM4864 is unity-gain stable, giving a designer maximum system flexibility. The LM4864 should be used in
low gain configurations to minimize THD+N values, and maximize the signal to noise ratio. Low gain
configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1
Vrms are available from sources such as audio codecs. Please refer toAUDIO POWER AMPLIFIER DESIGN, for
a more complete explanation of proper gain selection.
Besides gain, one of the major considerations is the closed-loop bandwidth of the amplifier. To a large extent, the
bandwidth is dictated by the choice of external components shown in Figure 1. The input coupling capacitor, Ci,
forms a first order high pass filter which limits low frequency response. This value should be chosen based on
needed frequency response for a few distinct reasons.
Selection of Input Capacitor Size
Large input capacitors are both expensive and space hungry for portable designs. Clearly, a certain sized
capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers
used in portable systems, whether internal or external, have little ability to reproduce signals below 150 Hz. In
this case using a large input capacitor may not increase system performance.
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In addition to system cost and size, click and pop performance is effected by the size of the input coupling
capacitor, Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally
½ VDD). This charge comes from the output via the feedback and is apt to create pops upon device enable. Thus,
by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be minimized.
Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value.
Bypass capacitor, CB, is the most critical component to minimize turn-on pops since it determines how fast the
LM4864 turns on. The slower the LM4864's outputs ramp to their quiescent DC voltage (nominally ½ VDD), the
smaller the turn-on pop. Choosing CBequal to 1.0 μF along with a small value of Ci(in the range of 0.1 μF to
0.39 μF), should produce a clickless and popless shutdown function. While the device will function properly, (no
oscillations or motorboating), with CBequal to 0.1 μF, the device will be much more susceptible to turn-on clicks
and pops. Thus, a value of CBequal to 1.0 μF or larger is recommended in all but the most cost sensitive
designs.
AUDIO POWER AMPLIFIER DESIGN
Design a 300 mW/8ΩAudio Amplifier
Given:
Power Output 300 mWrms
Load Impedance 8Ω
Input Level 1 Vrms
Input Impedance 20 kΩ
Bandwidth 100 Hz–20 kHz ± 0.25 dB
A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating
fromFigure 18 and Figure 19 in Typical Performance Characteristics, the supply rail can be easily found. A
second way to determine the minimum supply rail is to calculate the required Vopeak using Equation 5 and add
the dropout voltage. Using this method, the minimum supply voltage would be (Vopeak + (2*VOD)), where VOD is
extrapolated from Figure 23 in Typical Performance Characteristics.
(5)
Using Figure 17 for an 8Ωload, the minimum supply rail is 3.5V. But since 5V is a standard supply voltage in
most applications, it is chosen for the supply rail. Extra supply voltage creates headroom that allows the LM4864
to reproduce peaks in excess of 500 mW without producing audible distortion. At this time, the designer must
make sure that the power supply choice along with the output impedance does not violate the conditions
explained in POWER DISSIPATION.
Once the power dissipation equations have been addressed, the required differential gain can be determined
from Equation 6.
(6)
RF/Ri= AVD/2 (7)
From Equation 6, the minimum AVD is 1.55; use AVD = 2.
Since the desired input impedance was 20 kΩ, and with a AVD of 2, a ratio of 1:1 of RFto Riresults in an
allocation of Ri= RF= 20 kΩ. The final design step is to address the bandwidth requirements which must be
stated as a pair of −3 dB frequency points. Five times away from a pole gives 0.17 dB down from passband
response which is better than the required ±0.25 dB specified.
fL= 100 Hz/5 = 20 Hz (8)
fH= 20 kHz × 5 = 100 kHz (9)
As stated in External Components Description , Riin conjunction with Cicreate a highpass filter.
(10)
Ci≥1/(2π*20 kΩ*20 Hz) = 0.397 μF; use 0.39 μF (11)
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The high frequency pole is determined by the product of the desired high frequency pole, fH, and the differential
gain, AVD. With a AVD = 2 and fH= 100 kHz, the resulting GBWP = 100 kHz which is much smaller than the
LM4864 GBWP of 18 MHz. This figure displays that if a designer has a need to design an amplifier with a higher
differential gain, the LM4864 can still be used without running into bandwidth problems.
LM4864LD DEMO BOARD ARTWORK
Figure 35. Silk Screen View of LM4864LD Figure 36. Top Layer of LM4864LD
Figure 37. Bottom Layer of LM4864LD
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LM4864 MDC MWC
725MW Audio Power Amplifier With Shutdown Mode
Figure 38. Die Layout (B - Step)
Table 1. DIE/WAFER CHARACTERISTICS
Fabrication Attributes General Die Information
Physical Die Identification LM4862B Bond Pad Opening Size (min) 86µm x 86µm
Die Step B Bond Pad Metalization ALUMINUM
Physical Attributes Passivation NITRIDE
Wafer Diameter 150mm Back Side Metal Bare Back
Dise Size (Drawn) 1283µm x 952µm Back Side Connection GND
51mils x 37mils
Thickness 406µm Nominal
Min Pitch 117µm Nominal
Special Assembly Requirements:
Note: Actual die size is rounded to the nearest micron.
Die Bond Pad Coordinate Locations (B - Step)
(Referenced to die center, coordinates in µm) NC = No Connection
X/Y COORDINATES PAD SIZE
SIGNAL NAME PAD# NUMBER X Y X Y
BYPASS 1 -322 523 86 x 86
GND 2 -359 259 86 x 188
INPUT + 3 -359 5 86 x 86
GND 4 -359 -259 86 x 188
NC 5 -323 -523 86 x 86
INPUT - 6 -109 -523 86 x 86
VOUT 1 7 8 -523 86 x 86
VDD 8 358 -78 86 x 188
GND 9 358 141 86 x 188
NC 10 359 406 86 x 86
NC 11 323 523 86 x 86
VOUT 2 12 8 523 86 x 86
SHUTDOWN 13 -109 523 86 x 86
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REVISION HISTORY
Changes from Revision E (May 2013) to Revision F Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 16
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PACKAGE OPTION ADDENDUM
www.ti.com 18-Oct-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM4864M/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LM48
64M
LM4864MM ACTIVE VSSOP DGK 8 1000 TBD Call TI Call TI -40 to 85 Z64
LM4864MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 Z64
LM4864MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 Z64
LM4864MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 LM48
64M
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Oct-2013
Addendum-Page 2
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM4864MM VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LM4864MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LM4864MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
LM4864MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 8-May-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM4864MM VSSOP DGK 8 1000 210.0 185.0 35.0
LM4864MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0
LM4864MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0
LM4864MX/NOPB SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 8-May-2013
Pack Materials-Page 2
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