Data Sheet No. PD60043 Rev.O
Typical Connection
Features
•Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
•Gate drive supply range from 10 to 20V
•Undervoltage lockout
•3.3V, 5V, and 15V logic input compatible
•Matched propagation delay for both channels
•Outputs in phase with inputs (IR2101) or out of
phase with inputs (IR2102)
•Also available LEAD-FREE
HIGH AND LOW SIDE DRIVER
Product Summary
VOFFSET 600V max.
IO+/- 130 mA / 270 mA
VOUT 10 - 20V
ton/off (typ.) 160 & 150 ns
Delay Matching 50 ns
IR2101(S)/IR2102(S) & (PbF)
Description
The IR2101(S)/IR2102(S) are high voltage, high speed
power MOSFET and IGBT drivers with independent
high and low side referenced output channels. Pro-
prietary HVIC and latch immune CMOS technologies
enable ruggedized monolithic construction. The logic
input is compatible with standard CMOS or LSTTL
output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum
driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in
the high side configuration which operates up to 600 volts.
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(Refer to Lead Assignments for correct pin
configuration). This/These diagram(s) show
electrical connections only . Please refer to
our Application Notes and DesignT ips for
proper circuit board layout. IR2102
VCC VB
VS
HO
LOCOM
HIN
LIN
LIN
HIN
up to 600V
TO
LOAD
VCC
IR2101
VCC VB
VS
HO
LOCOM
HIN
LIN
LIN
HIN
up to 600V
TO
LOAD
VCC
Packages
8-Lead SOIC
IR2101S/IR2102S 8-Lead PDIP
IR2101/IR2102
IR2101(S)/IR2102(S) & (PbF)
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Symbol Definition Min. Max. Units
VBHigh side floating supply voltage -0.3 625
VSHigh side floating supply offset voltage VB - 25 VB + 0.3
VHO High side floating output voltage VS - 0.3 VB + 0.3
VCC Low side and logic fixed supply voltage -0.3 25
VLO Low side output voltage -0.3 VCC + 0.3
VIN Logic input voltage (HIN & LIN) -0.3 VCC + 0.3
dVS/dt Allowable offset supply voltage transient — 50 V/ns
PDPackage power dissipation @ TA ≤ +25°C (8 lead PDIP) — 1.0
(8 lead SOIC) — 0.625
RthJA Thermal resistance, junction to ambient (8 lead PDIP) — 125
(8 lead SOIC) — 200
TJJunction temperature — 150
TSStorage temperature -55 150
TLLead temperature (soldering, 10 seconds) — 300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
W
°C/W
V
°C
Symbol Definition Min. Max. Units
VBHigh side floating supply absolute voltage VS + 10 VS + 20
VSHigh side floating supply offset voltage Note 1 600
VHO High side floating output voltage VSVB
VCC Low side and logic fixed supply voltage 10 20
VLO Low side output voltage 0 VCC
VIN Logic input voltage (HIN & LIN) (IR2101) & (HIN & LIN) (IR2102) 0 VCC
TAAmbient temperature -40 125
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
°C
V
IR2101(S)/IR2102(S) & (PbF)
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Symbol Definition Min. Typ. Max. Units Test Conditions
VIH Logic “1” input voltage (IR2101)
Logic “0” input voltage (IR2102)
VIL Logic “0” input voltage (IR2101)
Logic “1”input voltage (IR2102)
VOH High level output voltage, VBIAS - VO— — 100 IO = 0A
VOL Low level output voltage, VO— — 100 IO = 0A
ILK Offset supply leakage current — — 50 VB = VS = 600V
IQBS Quiescent VBS supply current — 30 55 VIN = 0V or 5V
IQCC Quiescent VCC supply current — 150 270 VIN = 0V or 5V
IIN+ Logic “1” input bias current
IIN- Logic “0” input bias current
VCCUV+ VCC supply undervoltage positive going 8 8.9 9.8
threshold
VCCUV- VCC supply undervoltage negative going 7.4 8.2 9
threshold
IO+ Output high short circuit pulsed current 130 210 — VO = 0V
VIN = Logic “1”
PW ≤ 10 µs
IO- Output low short circuit pulsed current 270 360 — VO = 15V
VIN = Logic “0”
PW ≤ 10 µs
Symbol Definition Min. Typ. Max. Units Test Conditions
ton T urn-on propagation delay — 160 220 VS = 0V
toff Turn-off propagation delay — 150 220 VS = 600V
trTurn-on rise time — 100 170
tfTurn-off fall time — 50 90
MT Delay matching, HS & LS turn-on/off — — 50
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified.
V
mA
3 — — VCC = 10V to 20V
V
— — 0.8 VCC = 10V to 20V
mV
µA
— 3 10
— — 1
VIN = 5V (IR2101)
VIN = 5V (IR2102)
VIN = 0V (IR2101)
VIN = 0V (IR2102)
ns
IR2101(S)/IR2102(S) & (PbF)
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Functional Block Diagram
PULSE
GEN
HIN
UV
DETECT
LIN
COM
HO
VS
VCC
LO
VB
RQ
S
PULSE
FILTER
HV
LEVEL
SHIFT
IR2101
IR2102
PULSE
GEN
HIN
UV
DETECT
LIN
COM
HO
VS
VCC
LO
VB
RQ
S
PULSE
FILTER
HV
LEVEL
SHIFT
Vcc
Vcc
IR2101(S)/IR2102(S) & (PbF)
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Lead Definitions
Symbol Description
HIN Logic input for high side gate driver output (HO), in phase (IR2101)
HIN Logic input for high side gate driver output (HO), out of phase (IR2102)
LIN Logic input for low side gate driver output (LO), in phase (IR2101)
LIN Logic input for low side gate driver output (LO), out of phase (IR2102)
VBHigh side floating supply
HO High side gate drive output
VSHigh side floating supply return
VCC Low side and logic fixed supply
LO Low side gate drive output
COM Low side return
Lead Assignments
8 Lead PDIP 8 Lead SOIC
IR2101 IR2101S
8 Lead PDIP 8 Lead SOIC
IR2102 IR2102S
IR2101(S)/IR2102(S) & (PbF)
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Figure 2. Switching Time Waveform Definitions
HIN
LIN
tr
ton tf
toff
HO
LO
50% 50%
90% 90%
10% 10%
HIN
LIN 50% 50%
Figure 1. Input/Output Timing Diagram
HIN
LIN
HO
LO
HIN
LIN
Figure 3. Delay Matching Waveform Definitions
HIN
LIN
HO
50% 50%
10%
LO
90%
MT
HOLO
MT
HIN
LIN 50% 50%
IR2101(S)/IR2102(S) & (PbF)
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Figure 6A. Turn-On Time vs Temperature Figure 6B. Turn-On Time vs Supply Voltage
Figure 7A. Turn-Off Time vs Temperature
Figure 7B. Turn-Off Time vs Supply Voltage
Temperature (°C) VBIAS Supply Voltage (V)
Temperature (°C)
VBIAS Supply Voltage (V)
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Turn-On Del ay Time (ns)
Max.
T
y
p.
0
100
200
300
400
500
10 12 14 16 18 20
Turn-On Delay Time (ns)
Max.
Typ.
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Max.
Typ.
Turn-Of f Delay T ime (ns)
0
100
200
300
400
500
10 12 14 16 18 20
Max.
Typ.
Turn-Of f Delay T ime (ns)
0
100
200
300
400
500
02468101214161820
Turn-On Dela
y
Time
(
ns
Input Voltage (V)
Figure 6C. Turn-On Time vs Input Voltage
Figure 7C. Turn-Off Time vs Input Voltage
0
100
200
300
400
500
0 2 4 6 8 10 12 14 16 18 20
Turn-Off Delay Time (ns
Input V ol t age (V)
Max.
Typ.
IR2101(S)/IR2102(S) & (PbF)
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Figure 10A. Turn-Off Fall Time vs Temperature
Temperature (°C) VBIAS Supply Voltage (V)
Figure 10B. Turn-Off Fall Time vs Voltage
Temperature (°C)
Figure 12A. Logic "1" Input Voltage (IR2101)
Logic "0" Input Voltage (IR2102)
vs Temperature
Figure 12B. Logic "1" Input Voltage (IR2101)
Logic "0" Input Voltage (IR2102)
vs Voltage
0
1
2
3
4
5
6
7
8
-50 -25 0 25 50 75 100 125
Input V oltage ( V )
Min.
T urn-Off Fall Time (ns)
0
50
100
150
200
-50-25 0 25 50 75100125
Max
.
Typ.
0
50
100
150
200
10 12 14 16 18 20
Max.
Typ.
T urn-Off Fall Time (ns)
0
1
2
3
4
5
6
7
8
10 12 14 16 18 20
Input V oltage (V )
Min.
Vcc Supply V oltage (V)
Figure 9A. Turn-On Rise Time vs Temperature Figure 9B. Turn-On Rise Time vs Voltage
Temperature (°C) VBIAS Supply V oltage (V)
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Max
.
Typ.
T urn-On Rise Time (ns)
0
100
200
300
400
500
10 12 14 16 18 20
Max.
Typ.
T urn-On Rise Time (ns)
IR2101(S)/IR2102(S) & (PbF)
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Temperature (°C) Vcc Supply V oltage (V)
Figure 14A. High Level Output
vs Temperature Figure 14B. High Level Output vs Voltage
0
0.2
0.4
0.6
0.8
1
10 12 14 16 18 20
M ax.
High Level Output V oltage (V)
Figure 15A. Low Level Output
vs Temperature
Temperature (°C) Vcc Supply V oltage (V)
Figure 15B. Low level Output vs Voltage
Low Level Output V oltage (V)
0
0.2
0.4
0.6
0.8
1
10 12 14 16 18 20
M ax.
0
0.2
0.4
0.6
0.8
1
-50 -25 0 25 50 75 100 125
Max.
High Level Output V oltage (V)
0
0.2
0.4
0.6
0.8
1
-50-250 255075100125
Max.
Low Level Output V oltage (V)
Figure 13A. Logic "0" Input Voltage (IR2101)
Logic "1" Input Voltage (IR2102)
vs Temperature
Temperature (°C) Vcc Supply V oltage (V)
Figure 13B. Logic "0" Input Voltage (IR2101)
Logic "1" Input Voltage (IR2102)
vs Voltage
0
0.8
1.6
2.4
3.2
4
10 12 14 16 18 20
Input V olta g e (V )
Max
.
0
0.8
1.6
2.4
3.2
4
-50-250 255075100125
Input V olta g e (V )
Max
.
IR2101(S)/IR2102(S) & (PbF)
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Figure 17A. VBS Supply Current
vs Temperature Figure 17B. VBS Supply Current
vs Voltage
VBS Floating Supply Voltage (V)
Figure 18A. Vcc Supply Current
vs Temperature
Vcc Supply Current (µA)
Temperature (°C)
Temperature (°C)
Vcc Supply Current (µA)
Figure 18B. Vcc Supply Current
vs Voltage
Vcc Supply Voltage (V)
VBS Supply Current (µA)
0
100
200
300
400
500
600
700
-50-250 255075100125
Max.
Typ.
0
100
200
300
400
500
600
700
10 12 14 16 18 20
Max.
Typ.
0
30
60
90
120
150
10 12 14 16 18 20
Max.
Typ.
VBS Supply Current (µA)
0
30
60
90
120
150
-50 -25 0 25 50 75 100 125
Max.
Typ.
Figure 16A. Offset Supply Current
vs Temperature
Offset Supply Leakage Current (µA)
0
100
200
300
400
500
0 100 200 300 400 500 600
Max.
Figure 16B. Offset Supply Current
vs Voltage
VB Boost Voltage (V)
Offset Supply Leakage Current (µA)
Temperature (°C)
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Max.
IR2101(S)/IR2102(S) & (PbF)
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Logic “0” Input Current (µA)
Figure 20A. Logic "0" Input Current
vs Temperature
Temperature (°C) VCC Supply V oltage (V)
Figure 20B. Logic "0" Input Current
vs Voltage
0
1
2
3
4
5
10 12 14 16 18 20
Logic "0" I nput Current (uA)
Max.
VCC UVLO Threshold +(V)
Figure 21A. Vcc Undervoltage Threshold(+)
vs Temperature
Temperature (°C)
Figure 21B. Vcc Undervoltage Threshold(-)
vs Temperature
VCC UVLO Threshold - (V)
6
7
8
9
10
11
-50 -25 0 25 50 75 100 125
Max.
Min.
Typ.
6
7
8
9
10
11
-50 -25 0 25 50 75 100 125
Max.
Min.
Typ.
Temperature (°C)
0
1
2
3
4
5
-50 -25 0 25 50 75 100 125
Max.
Figure 19A. Logic"1" Input Current
vs Temperature
Temperature (°C)
Logic 1” Input Current (µA)
Logic 1” Input Current (µA)
Figure 19B. Logic"1" Input Current
vs Voltage
0
5
10
15
20
25
30
-50 -25 0 25 50 75 100 125
Max.
Typ.
0
5
10
15
20
25
30
10 12 14 16 18 20
Max.
Typ.
Vcc Supply V oltage (V)
IR2101(S)/IR2102(S) & (PbF)
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Output Sink Current (mA)
Temperature (°C)
Figure 23A. Output Sink Current
vs Temperature Figure 23B. Output Sink Current
vs Voltage
Output Sink Current (mA)
0
100
200
300
400
500
600
700
-50 -25 0 25 50 75 100 125
Typ.
Min.
0
100
200
300
400
500
600
700
10 12 14 16 18 20
Typ.
Min.
VBIAS Supply V oltage (V)
Output Source Current (mA)
Figure 22A. Output Source Current
vs Temperature
Temperature (°C)
Figure 22B. Output Source Current
vs Voltage
Output Source Current (mA)
0
100
200
300
400
500
10 12 14 16 18 20
Typ.
Min.
VBIAS Supply Voltage (V)
0
100
200
300
400
500
-50 -25 0 25 50 75 100 125
Typ.
Min.
IR2101(S)/IR2102(S) & (PbF)
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01-6014
01-3003 01 (MS-001AB)
8 Lead PDIP
Case outlines
01-6027
01-0021 11 (MS-012AA)
8 Lead SOIC
87
5
65
D B
E
A
e
6X
H
0. 25 [.010 ] A
6
4312
4 . OUT L INE CONFORMS T O JEDE C OUTLINE MS-012 AA .
NOTES:
1. DI MENSI ONING & TOLERANCI NG PER ASME Y14.5M-1994.
2 . CONT ROLL ING DIMENSION: MILLIMETER
3 . D IMENSIONS ARE SH OW N IN MILLIMET ERS [INCHES] .
7
K x 4 5°
8X L 8X c
y
FOOTPRINT
8X 0.72 [ . 02 8]
6. 46 [ . 2 55]
3X 1.27 [ . 05 0] 8X 1.78 [ . 07 0]
5 D IMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
6 D IMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSI ONS NOT TO EXCEED 0.25 [.010].
7 D IMENSION IS T HE LENGTH OF LEAD FOR SOLD ERING T O
A SUBSTRATE.
MOLD PROTRUSI ONS NOT TO EXCEED 0.15 [.006].
0. 25 [.010 ] CAB
e1 A
A1
8X b
C
0. 10 [.004 ]
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASIC
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BASIC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX MILLIMETERSINC HE S MIN MAX
DIM
8°
e
c .0075 .0098 0.19 0.25
.025 BASI C 0.635 BASIC
IR2101(S)/IR2102(S) & (PbF)
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IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
This product has been qualified per industrial level
Data and specifications subject to change without notice. 4/2/2004
LEADFREE PART MARKING INFORMATION
ORDER INFORMATION
Basic Part (Non-Lead Free)
8-Lead PDIP IR2101 order IR2101
8-Lead SOIC IR2101S order IR2101S
8-Lead PDIP IR2102 order IR2102
8-Lead SOIC IR2102S order IR2102S
Leadfree Part
8-Lead PDIP IR2101 order IR2101PbF
8-Lead SOIC IR2101S order IR2101SPbF
8-Lead PDIP IR2102 order IR2102PbF
8-Lead SOIC IR2102S order IR2102SPbF
Lead Free Released
Non-Lead Free
Released
Part number
Date code
IRxxxxxx
YWW?
?XXXX
Pin 1
Identifier
IR logo
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
P
?MARKING CODE
