Charge Pump Regulator for Color TFT Panels ADM8839 FEATURES 3 Voltages (+5 V, +15 V, -15 V) from a Single 3 V Supply Power Efficiency Optimized for Use with TFT in Mobile Phones Low Quiescent Current Low Shutdown Current (<5 A) Shutdown Function Option to Use External LDO APPLICATIONS Hand-held Instruments TFT LCD Panels Cellular Phones FUNCTIONAL BLOCK DIAGRAM C5, 2.2F VCC C1+ ADM8839 VOLTAGE DOUBLER C1- C1, 2.2F VOUT LDO_IN OSCILLATOR LDO_ON/OFF LDO VOLTAGE REGULATOR CONTROL LOGIC DOUBLE VOLTAGE TRIPLER TRIPLE TIMING GENERATOR C6, 2.2F +5VOUT +5VIN C2- C2, 0.22F C3+ C3- C3, 0.22F +15VOUT SHUTDOWN CONTROL DISCHARGE VOLTAGE INVERTER C4- C4, 0.22F -15VOUT GND GENERAL DESCRIPTION The ADM8839 is a charge pump regulator used for color thin film transistor (TFT) liquid crystal displays (LCDs). Using charge pump technology, the device can be used to generate three voltages (+5 V 2%, +15 V, -15 V) from a single 3 V supply. These voltages are then used to provide supplies for the LCD controller (5 V) and the gate drives for the transistors in the panel (+15 V and -15 V). Only a few external capacitors are needed for the charge pumps. An efficient low dropout (LDO) voltage regulator ensures that the power efficiency is high and provides a low ripple 5 V output. This LDO can be shut down and an external LDO can be used to regulate the 5 V doubler output and drive the input to the charge pump section that generates the +15 V and -15 V outputs, if required by the user. +15V C8, 0.22F C4+ SHDN +5V C7, 2.2F C2+ -15V C9, 0.22F The ADM8839 has a power save shutdown feature. The 5 V output consumes the most power, so power efficiency is also maximized on this output with an oscillator enabling scheme (Green IdleTM). This effectively senses the load current that is flowing and turns on the charge pump only when charge needs to be delivered to the 5 V pump doubler output. The ADM8839 is fabricated using CMOS technology for minimal power consumption. The part is packaged in a 20-lead LFCSP (lead frame chip scale package). REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) 2003 Analog Devices, Inc. All rights reserved. ADM8839-SPECIFICATIONS Parameter (VCC = 3 V - 10%, 40%; TA = -40C to +85C; C1, C5, C6, C7 = 2.2 F; C2, C3, C4, C8, C9 = 0.22 F; unless otherwise noted.) Test Conditions Min INPUT VOLTAGE, VCC SUPPLY CURRENT, ICC +5 V OUTPUT Output Voltage Output Current Output Ripple Transient Response +15 V OUTPUT Output Voltage Output Current Output Ripple -15 V OUTPUT Output Voltage Output Current Output Ripple POWER EFFICIENCY Max Unit 4.2 V 250 500 5 A A 4.9 5.0 5 10 5 5.1 8 V mA mV p-p s 14.0 15.0 1 50 16.0 150 V A mV p-p -16.0 -150 -15.0 -1 50 -14.0 V A mV p-p 2.7 Unloaded Shutdown Mode, TA = 25C IL = 10 A to 8 mA 8 mA Load IL Stepped from 10 A to 8 mA IL = 1 A to 150 A IL = 100 A IL = -1 A to -150 A IL = -100 A R5VOUT Load = 5 mA, 15 V Load = 150 A, VCC = 3.0 V CHARGE PUMP FREQUENCY CONTROL PINS, SHDN Input Voltage, VSHDN Typ 82 60 SHDN Low = Shutdown Mode SHDN High = Normal Mode 100 0.7 VCC Low = External LDO High = Internal LDO 140 kHz 0.3 VCC V V A pF 1 10 Digital Input Current Digital Input Capacitance* LDO_ON/OFF Input Voltage % 0.3 VCC 0.7 VCC 1 10 Digital Input Current Digital Input Capacitance* V V A pF *Guaranteed by design. Not 100% production tested. Specifications are target values and are subject to change without notice. TIMING SPECIFICATIONS Parameter POWER-UP SEQUENCE +5 V Rise Time, tR5V +15 V Rise Time, tR15V -15 V Fall Time, tFM15V Delay between -15 V Fall and +15 V, tDELAY POWER-DOWN SEQUENCE +5 V Fall Time, tF5V +15 V Fall Time, tF15V -15 V Rise Time, tRM15V (VCC = 3 V, TA = 25C; C1, C5, C6, C7 = 2.2 F; C2, C3, C4, C8, C9 = 0.22 F.) Test Conditions/Comments Min Typ Max Unit 10% to 90%, Figure 1 10% to 90%, Figure 1 90% to 10%, Figure 1 250 3 3 s ms ms Figure 1 600 s 90% to 10%, Figure 1 90% to 10%, Figure 1 10% to 90%, Figure 1 35 10 20 ms ms ms Specifications are subject to change without notice. -2- REV. A ADM8839 ABSOLUTE MAXIMUM RATINGS* THERMAL CHARACTERISTICS (TA = 25C, unless otherwise noted.) 20-Lead LFCSP Package: JA = 31C/W Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6.0 V Input Voltage on Digital Inputs . . . . . . . . . . . -0.3 V to +6.0 V Output Short-Circuit Duration to GND . . . . . . . . . . . . . 10 sec Output Voltage +5 V Output . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 7.0 V -15 V Output . . . . . . . . . . . . . . . . . . . . . . . . -17 V to +0.3 V +15 V Output . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +17 V Operating Temperature Range . . . . . . . . . . . . -40C to +85C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mW Storage Temperature Range . . . . . . . . . . . . . -65C to +150C ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class I ORDERING GUIDE Model Temperature Range Package Option ADM8839ACP -40C to +85C CP-20 *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADM8839 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. A -3- ADM8839 20 C1 19 C1 18 GND 17 15VOUT 16 C4 PIN CONFIGURATION PIN 1 INDICATOR ADM8839 TOP VIEW 15 C4 14 C2 13 C2 12 C3 11 C3 LDO_ON/OFF 6 SHDN 7 VCC 8 GND 9 15VOUT 10 VCC 1 VOUT 2 LDO_IN 3 5VOUT 4 5VIN 5 PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Function 1 VCC Positive Supply Voltage Input. Connect this pin to the 3 V supply with a 2.2 F decoupling capacitor. 2 VOUT Voltage Doubler Output. This was derived by doubling the 3 V supply. A 2.2 F capacitor to ground is required on this pin. 3 LDO_IN Voltage Regulator Input. The user may bypass this circuit by using the LDO_ON/OFF pin. 4 +5VOUT 5 V Output. This was derived by doubling and regulating the 3 V supply. A 2.2 F capacitor to ground is required on this pin to stabilize the regulator. 5 +5VIN 5 V Input. This is the input to the voltage tripler and inverter charge pump circuits. 6 LDO_ON/OFF Control Logic Input. 3 V CMOS logic. A logic high selects the internal LDO for regulation of the 5 V voltage doubler output. A logic low isolates the internal LDO from the rest of the charge pump circuits. This allows the use of an external LDO to regulate the 5 V voltage doubler output. The output of this LDO is then fed back into the voltage tripler and inverter circuits of the ADM8839. 7 SHDN Digital Input. 3 V CMOS logic. Active low shutdown control. This shuts down the timing generator and enables the discharge circuit to dissipate the charge on the voltage outputs, thus driving them to 0 V. 8 VCC Connect this pin to VCC. 9 GND Connect this pin to GND. 10 +15VOUT 15 V Output. This was derived by tripling the 5 V regulated output. A 0.22 F capacitor is required on this pin. 11, 12 C3-, C3+ External capacitor C3 is connected between these pins. A 0.22 F capacitor is recommended. 13, 14 C2-, C2+ External capacitor C2 is connected between these pins. A 0.22 F capacitor is recommended. 15, 16 C4-, C4+ External capacitor C4 is connected between these pins. A 0.22 F capacitor is recommended. 17 -15VOUT -15 V Output. This was derived by tripling and inverting the 5 V regulated output. A 0.22 F capacitor is required on this pin. 18 GND Device Ground. 19, 20 C1-, C1+ External capacitor C1 is connected between these pins. A 2.2 F capacitor is recommended. -4- REV. A Typical Performance Characteristics-ADM8839 5.10 84 DEVICE AT +25C 83 LDO POWER EFFICIENCY - % 5.05 DEVICE AT +85C LDO O/P VOLTAGE - V 5.00 4.95 DEVICE AT -40C 4.90 4.85 4.80 4.75 81 80 79 78 77 76 4.70 2.7 75 2.9 3.1 3.3 3.5 3.7 SUPPLY VOLTAGE - V 3.9 1 4.1 4.2 2 3 4 5 6 7 8 LOAD CURRENT - mA TPC 1. LDO O/P Voltage Variation over Temperature and Supply TPC 4. LDO Power Efficiency vs. Load Current, VCC = 3 V 5.020 400 5.015 350 SUPPLY CURRENT - A LDO O/P VOLTAGE - V 82 5.010 5.005 5.000 300 250 200 4.995 0 1 2 3 4 5 6 7 150 2.7 8 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.2 ILOAD - mA SUPPLY VOLTAGE - V TPC 2. LDO O/P Voltage vs. Load Current TPC 5. Supply Current vs. Supply Voltage 100 15.1 14.9 80 OUTPUT VOLTAGE - V +15V/-15V POWER EFFICIENCY - % 15.0 90 70 60 50 14.8 +15V AT 25C 14.7 14.6 -15V AT 25C 14.5 14.4 14.3 40 14.2 30 14.1 10 20 30 40 50 60 70 80 90 0 100 TPC 3. +15 V/-15 V Power Efficiency vs. Load Current REV. A 50 100 150 200 ILOAD - A ILOAD - A TPC 6. +15 V/-15 V Output Voltage vs. Load Current, Typical Configuration -5- ADM8839 LOAD ENABLE +15V OUTPUT 5V OUTPUT -15V OUTPUT 5VOUT TPC 10. Output Transient Response for Maximum Load Current TPC 7. +15 V and -15 V Outputs at Power-Up VOUT RIPPLE (DOUBLER OUTPUT RIPPLE) +15V OUTPUT LDO OUTPUT RIPPLE VCC RIPPLE -15V OUTPUT 5VOUT TPC 8. Output Ripple on LDO (5 V Output) TPC 11. +15 V and -15 V Outputs at Power-Down LOAD DISABLE 5V OUTPUT TPC 9. 5 V Output Transient Response, Load Disconnected -6- REV. A ADM8839 POWER SEQUENCING In order for the TFT panel to power up correctly, the gate drive supplies must be sequenced such that the -15 V supply is up before the +15 V supply. The ADM8839 controls this sequence. When the device is turned on (a logic high on SHDN), the ADM8839 allows the -15 V output to ramp immediately but holds off the +15 V output. It continues to do this until the negative output has reached -3 V. At this point, the positive output is enabled and allowed to ramp to +15 V. This sequence is highlighted in Figure 1. C5, 2.2F VCC C1+ ADM8839 VOLTAGE DOUBLER C1, 2.2F VOUT LDO_IN OSCILLATOR LDO_ON/OFF LDO VOLTAGE REGULATOR CONTROL LOGIC DOUBLE VOLTAGE TRIPLER +5VOUT TIMING GENERATOR +5V C7, 2.2F C2+ C2- TRIPLE SHDN C6, 2.2F +5VIN VCC C2, 0.22F C3+ C3- C3, 0.22F +15VOUT tR5V +15V C8, 0.22F 90% +5V C1- C4+ tF5V 10% SHDN SHUTDOWN CONTROL DISCHARGE VOLTAGE INVERTER tR15V C4- C4, 0.22F -15VOUT -15V 90% +15V tF15V 10% C9, 0.22F GND tDELAY Figure 2. Typical Configuration -15V -3V 90% 15.1 tRM15V 10% 15.0 tFM15V 14.9 OUTPUT VOLTAGE - V Figure 1. Power Sequence TRANSIENT RESPONSE The ADM8839 features extremely fast transient response, making it very suitable for fast image updates on TFT LCD panels. This means that even under changing load conditions, there is still very effective regulation of the 5 V output. TPCs 9 and 10 show how the 5 V output responds when a maximum load is dynamically connected and disconnected. Note that the output settles within 5 s to less than 1% of the output level. 14.8 +15V AT 25C 14.7 14.6 -15V AT 25C 14.5 14.4 14.3 14.2 14.1 0 BOOSTING THE CURRENT DRIVE OF THE 15 V SUPPLY 100 150 200 ILOAD - A The ADM8839 15 V output can deliver 150 A of current in the typical configuration, as shown in Figure 2. It is also possible to draw 100 A from the +15 V output and 200 A from the -15 V output, or vice versa. It is possible to draw only a maximum of 300 A combined from both the +15 V and the -15 V outputs at any time (see Figure 3). In this configuration, +5VOUT (Pin 4) is connected to +5VIN (Pin 5), as shown in the Functional Block Diagram. REV. A 50 Figure 3. +15 V/-15 V Output Voltage vs. Load Current, Typical Configuration -7- ADM8839 It is possible to configure the ADM8839 to supply up to 400 A on the 15 V outputs by changing its configuration slightly, as shown in Figure 4. The configuration in Figure 4 can supply up to 400 A of current on both the +15 V and the -15 V outputs. If the load on the 15 V does not draw any current, the voltage on the 15 V outputs can rise up to 16.5 V (see Figure 5). In this configuration, VOUT (Pin 2) is connected to +5VIN (Pin 5). C5, 2.2F VCC C1- C1, 2.2F OSCILLATOR LDO VOLTAGE REGULATOR CONTROL LOGIC 16.5 CURRENT BOOST CONFIGURATION CONNECTION OUTPUT VOLTAGE - V VOLTAGE DOUBLER VOUT LDO_IN C6, 2.2F +5VOUT +5V +5VIN LDO_ON/OFF C7, 2.2F C2+ DOUBLE VOLTAGE TRIPLER C2- TIMING GENERATOR C3- +15V AT 25C 16.0 -15V AT 25C 15.5 15.0 C2, 0.22F 14.5 C3+ TRIPLE C3, 0.22F 14.0 +15VOUT 0 +15V 100 200 C8, 0.22F SHDN DISCHARGE VOLTAGE INVERTER C4- C4, 0.22F -15VOUT 300 400 500 ILOAD - A C4+ SHUTDOWN CONTROL C03075-0-2/03(A) 17.0 C1+ ADM8839 Figure 5. +15 V/-15 V Output Voltage vs. Load Current, Current Boost Configuration -15V C9, 0.22F GND Figure 4. Current Boost Configuration OUTLINE DIMENSIONS 20-Lead Leadframe Chip Scale Package [LFCSP] 4 4 mm Body (CP-20) Dimensions shown in millimeters 0.60 MAX 0.60 MAX PIN 1 INDICATOR TOP VIEW 12 MAX 1.00 0.90 0.80 SEATING PLANE 0.50 BSC 16 15 3.75 BSC SQ 1 2.25 2.10 SQ 1.95 BOTTOM VIEW 0.75 0.55 0.35 1.00 MAX 0.65 NOM 0.20 REF 20 0.05 0.02 0.00 11 10 6 5 0.30 0.23 0.18 COPLANARITY 0.08 COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-1 Revision History 2/03 - Data Sheet Changed from Rev. 0 to Rev. A Changed SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 -8- PRINTED IN U.S.A. 4.0 BSC SQ