REV. A
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ADM8839
Charge Pump Regulator
for Color TFT Panels
FUNCTIONAL BLOCK DIAGRAM
OSCILLATOR
CONTROL
LOGIC
TIMING
GENERATOR
SHUTDOWN
CONTROL DISCHARGE
VOLTAGE
INVERTER
VOLTAGE
TRIPLER
LDO
VOLTAGE
REGULATOR
VOLTAGE
DOUBLER
C1+
C1–
LDO_IN
VOUT
+5VOUT
C2+
C2–
C3+
C3–
+15VOUT
C4+
C4–
–15VOUT –15V
+15V
+5V
GND
SHDN
LDO_ON/OFF
VCC
DOUBLE
TRIPLE
C5, 2.2␮F
C1, 2.2␮F
C6, 2.2␮F
C7, 2.2␮F
C8, 0.22␮F
C9, 0.22␮F
C2, 0.22␮F
C3, 0.22␮F
C4, 0.22␮F
ADM8839
+5VIN
GENERAL DESCRIPTION
The ADM8839 is a charge pump regulator used for color thin film
transistor (TFT) liquid crystal displays (LCDs). Using charge
pump technology, the device can be used to generate three
voltages (+5 V ±2%, +15 V, –15 V) from a single 3 V supply.
These voltages are then used to provide supplies for the LCD
controller (5 V) and the gate drives for the transistors in the
panel (+15 V and –15 V). Only a few external capacitors are
needed for the charge pumps. An efficient low dropout (LDO)
voltage regulator ensures that the power efficiency is high and
provides a low ripple 5 V output. This LDO can be shut down
and an external LDO can be used to regulate the 5 V doubler
output and drive the input to the charge pump section that
generates the +15 V and –15 V outputs, if required by the user.
FEATURES
3 Voltages (+5 V, +15 V, –15 V) from
a Single 3 V Supply
Power Efficiency Optimized for Use
with TFT in Mobile Phones
Low Quiescent Current
Low Shutdown Current (<5 A)
Shutdown Function
Option to Use External LDO
APPLICATIONS
Hand-held Instruments
TFT LCD Panels
Cellular Phones
The ADM8839 has a power save shutdown feature. The 5 V
output consumes the most power, so power efficiency is also
maximized on this output with an oscillator enabling scheme
(Green Idle™). This effectively senses the load current that is
flowing and turns on the charge pump only when charge needs
to be delivered to the 5 V pump doubler output.
The ADM8839 is fabricated using CMOS technology for minimal
power consumption. The part is packaged in a 20-lead LFCSP
(lead frame chip scale package).
REV. A–2–
ADM8839–SPECIFICATIONS
(VCC = 3 V – 10%, 40%; TA = –40C to +85C; C1, C5, C6, C7 = 2.2 F; C2, C3,
C4, C8, C9 = 0.22 F; unless otherwise noted.)
TIMING SPECIFICATIONS
Parameter Test Conditions/Comments Min Typ Max Unit
POWER-UP SEQUENCE
+5 V Rise Time, t
R5V
10% to 90%, Figure 1 250 ␮s
+15 V Rise Time, t
R15V
10% to 90%, Figure 1 3 ms
–15 V Fall Time, t
FM15V
90% to 10%, Figure 1 3 ms
Delay between –15 V Fall
and +15 V, t
DELAY
Figure 1 600 ␮s
POWER-DOWN SEQUENCE
+5 V Fall Time, t
F5V
90% to 10%, Figure 1 35 ms
+15 V Fall Time, t
F15V
90% to 10%, Figure 1 10 ms
–15 V Rise Time, t
RM15V
10% to 90%, Figure 1 20 ms
Specifications are subject to change without notice.
(VCC = 3 V, TA = 25C; C1, C5, C6, C7 = 2.2 F; C2, C3, C4, C8, C9 = 0.22 F.)
Parameter Test Conditions Min Typ Max Unit
INPUT VOLTAGE, V
CC
2.7 4.2 V
SUPPLY CURRENT, I
CC
Unloaded 250 500 ␮A
Shutdown Mode, T
A
= 25°C 5 ␮A
+5 V OUTPUT
Output Voltage I
L
= 10 ␮A to 8 mA 4.9 5.0 5.1 V
Output Current 58 mA
Output Ripple 8 mA Load 10 mV p-p
Transient Response I
L
Stepped from 10 ␮A to 8 mA 5 ␮s
+15 V OUTPUT
Output Voltage I
L
= 1 ␮A to 150 ␮A14.0 15.0 16.0 V
Output Current 1150 ␮A
Output Ripple I
L
= 100 ␮A50mV p-p
–15 V OUTPUT
Output Voltage I
L
= –1 ␮A to –150 ␮A–16.0 –15.0 –14.0 V
Output Current –150 –1 ␮A
Output Ripple I
L
= –100 ␮A50mV p-p
POWER EFFICIENCY R5V
OUT
Load = 5 mA, 82 %
⫾15 V Load = ⫾150 ␮A,
V
CC
= 3.0 V
CHARGE PUMP FREQUENCY 60 100 140 kHz
CONTROL PINS, SHDN
Input Voltage, V
SHDN
SHDN Low = Shutdown Mode 0.3 ⫻ V
CC
V
SHDN High = Normal Mode 0.7 ⫻ V
CC
V
Digital Input Current ⫾1␮A
Digital Input Capacitance*10 pF
LDO_ON/OFF
Input Voltage Low = External LDO 0.3 ⫻ V
CC
V
High = Internal LDO 0.7 ⫻ V
CC
V
Digital Input Current ⫾1␮A
Digital Input Capacitance*10 pF
*Guaranteed by design. Not 100% production tested.
Specifications are target values and are subject to change without notice.
REV. A
ADM8839
–3–
ABSOLUTE MAXIMUM RATINGS*
(T
A
= 25°C, unless otherwise noted.)
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6.0 V
Input Voltage on Digital Inputs . . . . . . . . . . . –0.3 V to +6.0 V
Output Short-Circuit Duration to GND . . . . . . . . . . . . . 10 sec
Output Voltage
+5 V Output . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 7.0 V
–15 V Output . . . . . . . . . . . . . . . . . . . . . . . . –17 V to +0.3 V
+15 V Output . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +17 V
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mW
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class I
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model Temperature Range Package Option
ADM8839ACP –40°C to +85°C CP-20
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADM8839 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
THERMAL CHARACTERISTICS
20-Lead LFCSP Package:
␪
JA
= 31°C/W
REV. A–4–
ADM8839
PIN FUNCTION DESCRIPTIONS
Pin No. Mnemonic Function
1V
CC
Positive Supply Voltage Input. Connect this pin to the 3 V supply with a 2.2 µF decoupling capacitor.
2VOUT Voltage Doubler Output. This was derived by doubling the 3 V supply. A 2.2 µF capacitor to
ground is required on this pin.
3LDO_IN Voltage Regulator Input. The user may bypass this circuit by using the LDO_ON/OFF pin.
4+5VOUT 5 V Output. This was derived by doubling and regulating the 3 V supply. A 2.2 µF capacitor
to ground is required on this pin to stabilize the regulator.
5+5VIN 5 V Input. This is the input to the voltage tripler and inverter charge pump circuits.
6LDO_ON/OFF Control Logic Input. 3 V CMOS logic. A logic high selects the internal LDO for regulation of
the 5 V voltage doubler output. A logic low isolates the internal LDO from the rest of the charge
pump circuits. This allows the use of an external LDO to regulate the 5 V voltage doubler
output. The output of this LDO is then fed back into the voltage tripler and inverter circuits of
the ADM8839.
7SHDN Digital Input. 3 V CMOS logic. Active low shutdown control. This shuts down the timing
generator and enables the discharge circuit to dissipate the charge on the voltage outputs, thus
driving them to 0 V.
8V
CC
Connect this pin to V
CC
.
9GND Connect this pin to GND.
10 +15VOUT 15 V Output. This was derived by tripling the 5 V regulated output. A 0.22 µF capacitor
is required on this pin.
11, 12 C3–, C3+ External capacitor C3 is connected between these pins. A 0.22 µF capacitor is recommended.
13, 14 C2–, C2+ External capacitor C2 is connected between these pins. A 0.22 µF capacitor is recommended.
15, 16 C4–, C4+ External capacitor C4 is connected between these pins. A 0.22 µF capacitor is recommended.
17 –15VOUT –15 V Output. This was derived by tripling and inverting the 5 V regulated output. A 0.22 µF
capacitor is required on this pin.
18 GND Device Ground.
19, 20 C1–, C1+ External capacitor C1 is connected between these pins. A 2.2 µF capacitor is recommended.
PIN CONFIGURATION
VCC 1
VOUT 2
LDO_IN 3
11 C3
LDO_ON/OFF 6
SHDN 7
VCC 8
GND 9
15VOUT 10
5VOUT 4
5VIN 5
17 15VOUT
16 C4
PIN 1
INDICATOR
TOP VIEW
ADM8839
12 C3
13 C2
14 C2
15 C4
18 GND
19 C1
20 C1
REV. A
Typical Performance Characteristics–ADM8839
–5–
SUPPLY VOLTAGE – V
LDO O/P VOLTAGE – V
4.70
4.75
4.80
4.85
4.90
4.95
5.00
5.05
5.10
3.12.7 3.5 3.92.9 3.3 3.7 4.1 4.2
DEVICE AT –40C
DEVICE AT +85C
DEVICE AT +25C
TPC 1. LDO O/P Voltage Variation
over Temperature and Supply
I
LOAD
– mA
LDO O/P VOLTAGE – V
4.995
5.000
5.005
5.010
5.015
5.020
20 4681357
TPC 2. LDO O/P Voltage vs. Load Current
ILOAD – A
+15V/–15V POWER EFFICIENCY – %
30
40
50
60
70
80
90
100
3010 50 70 1009020 40 60 80
TPC 3. +15 V/–15 V Power Efficiency vs. Load Current
LOAD CURRENT – mA
LDO POWER EFFICIENCY – %
75
76
77
78
79
80
81
84
82
31578246
83
TPC 4. LDO Power Efficiency vs. Load Current,
V
CC
= 3 V
SUPPLY VOLTAGE – V
SUPPLY CURRENT – A
150
200
250
300
350
400
3.12.7 3.5 3.92.9 3.3 3.7 4.1 4.2
TPC 5. Supply Current vs. Supply Voltage
I
LOAD
– A
OUTPUT VOLTAGE – V
14.1
14.2
14.3
14.4
14.5
14.6
14.7
14.8
14.9
15.0
15.1
500 100 150 200
–15V AT 25C
+15V AT 25C
TPC 6. +15 V/–15 V Output Voltage vs. Load
Current, Typical Configuration
REV. A–6–
ADM8839
+15V OUTPUT
–15V OUTPUT
5VOUT
TPC 7. +15 V and –15 V Outputs at Power-Up
VOUT RIPPLE (DOUBLER OUTPUT RIPPLE)
LDO OUTPUT RIPPLE
VCC RIPPLE
TPC 8. Output Ripple on LDO (5 V Output)
LOAD DISABLE
5V OUTPUT
TPC 9. 5 V Output Transient Response,
Load Disconnected
LOAD ENABLE
5V OUTPUT
TPC 10. Output Transient Response for
Maximum Load Current
+15V OUTPUT
–15V OUTPUT
5VOUT
TPC 11. +15 V and –15 V Outputs at Power-Down
REV. A
ADM8839
–7–
POWER SEQUENCING
In order for the TFT panel to power up correctly, the gate drive
supplies must be sequenced such that the –15 V supply is up
before the +15 V supply. The ADM8839 controls this sequence.
When the device is turned on (a logic high on SHDN), the
ADM8839 allows the –15 V output to ramp immediately but
holds off the +15 V output. It continues to do this until the
negative output has reached –3 V. At this point, the positive
output is enabled and allowed to ramp to +15 V. This sequence
is highlighted in Figure 1.
VCC
SHDN
+5V
+15V
–15V
tRM15V
tFM15V
tDELAY
10%
10%
10%
90%
90%
90%
tF15V
tR15V
tF5V
tR5V
–3V
Figure 1. Power Sequence
TRANSIENT RESPONSE
The ADM8839 features extremely fast transient response, mak-
ing it very suitable for fast image updates on TFT LCD panels.
This means that even under changing load conditions, there is
still very effective regulation of the 5 V output. TPCs 9 and 10
show how the 5 V output responds when a maximum load is
dynamically connected and disconnected. Note that the output
settles within 5 µs to less than 1% of the output level.
BOOSTING THE CURRENT DRIVE OF THE 15 V SUPPLY
The ADM8839 ⫾15 V output can deliver 150 µA of current in
the typical configuration, as shown in Figure 2. It is also pos-
sible to draw 100 µA from the +15 V output and 200 µA from
the –15 V output, or vice versa. It is possible to draw only a
maximum of 300 µA combined from both the +15 V and the
–15 V outputs at any time (see Figure 3). In this configuration,
+5VOUT (Pin 4) is connected to +5VIN (Pin 5), as shown in
the Functional Block Diagram.
OSCILLATOR
CONTROL
LOGIC
TIMING
GENERATOR
SHUTDOWN
CONTROL DISCHARGE
VOLTAGE
INVERTER
VOLTAGE
TRIPLER
LDO
VOLTAGE
REGULATOR
VOLTAGE
DOUBLER
C1+
C1–
LDO_IN
VOUT
+5VOUT
C2+
C2–
C3+
C3–
+15VOUT
C4+
C4–
–15VOUT –15V
+15V
+5V
GND
SHDN
LDO_ON/OFF
V
CC
DOUBLE
TRIPLE
C5, 2.2F
C1, 2.2F
C6, 2.2F
C7, 2.2F
C8, 0.22F
C9, 0.22F
C2, 0.22F
C3, 0.22F
C4, 0.22F
ADM8839
+5VIN
Figure 2. Typical Configuration
I
LOAD
– A
OUTPUT VOLTAGE – V
14.1
14.2
14.3
14.4
14.5
14.6
14.7
14.8
14.9
15.0
15.1
500 100 150 200
–15V AT 25C
+15V AT 25C
Figure 3. +15 V/–15 V Output Voltage vs. Load
Current, Typical Configuration
C03075–0–2/03(A)
PRINTED IN U.S.A.
–8–
ADM8839
It is possible to configure the ADM8839 to supply up to 400 µA
on the ±15 V outputs by changing its configuration slightly, as
shown in Figure 4.
OSCILLATOR
CONTROL
LOGIC
TIMING
GENERATOR
SHUTDOWN
CONTROL DISCHARGE
VOLTAGE
INVERTER
VOLTAGE
TRIPLER
LDO
VOLTAGE
REGULATOR
VOLTAGE
DOUBLER
CURRENT BOOST
CONFIGURATION
CONNECTION
C1+
C1–
LDO_IN
VOUT
+5VOUT
C2+
C2–
C3+
C3–
+15VOUT
C4+
C4–
–15VOUT –15V
+15V
+5V
GND
S
HDN
V
CC
DOUBLE
TRIPLE
C5, 2.2␮F
C1, 2.2␮F
C7, 2.2␮F
C8, 0.22␮F
C9, 0.22␮F
C2, 0.22␮F
C3, 0.22␮F
C4, 0.22␮F
ADM8839
+5VIN
C6, 2.2␮F
LDO_ON/OFF
Figure 4. Current Boost Configuration
The configuration in Figure 4 can supply up to 400 µA of current
on both the +15 V and the –15 V outputs. If the load on the
±15 V does not draw any current, the voltage on the ±15 V out-
puts can rise up to ±16.5 V (see Figure 5). In this configuration,
VOUT (Pin 2) is connected to +5VIN (Pin 5).
14.0
14.5
15.0
15.5
16.0
16.5
17.0
0 100 200 300 400 500
ILOAD – ␮A
OUTPUT VOLTAGE – V
+15V AT 25ⴗC
–15V AT 25ⴗC
Figure 5. +15 V/–15 V Output Voltage vs. Load
Current, Current Boost Configuration
OUTLINE DIMENSIONS
20-Lead Leadframe Chip Scale Package [LFCSP]
4 ⫻ 4 mm Body
(CP-20)
Dimensions shown in millimeters
1
20
5
6
11
16
15
BOTTOM
VIEW
10
2.25
2.10 SQ
1.95
0.75
0.55
0.35
0.30
0.23
0.18
0.50
BSC
12MAX
0.20
REF
1.00 MAX
0.65 NOM
0.05
0.02
0.00
1.00
0.90
0.80
SEATING
PLANE
PIN 1
INDICATOR
TOP
VIEW
3.75
BSC SQ
4.0
BSC SQ
COPLANARITY
0.08
COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-1
0.60
MAX
0.60
MAX
Revision History
2/03 – Data Sheet Changed from Rev. 0 to Rev. A
Changed SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8